Journal of Cryptographic Engineering

Papers
(The median citation count of Journal of Cryptographic Engineering is 1. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2020-03-01 to 2024-03-01.)
ArticleCitations
Review of error correction for PUFs and evaluation on state-of-the-art FPGAs28
The SQALE of CSIDH: sublinear Vélu quantum-resistant isogeny action with low exponents24
A survey of algorithmic methods in IC reverse engineering17
Residue arithmetic systems in cryptography: a survey on modern security applications16
A large-scale comprehensive evaluation of single-slice ring oscillator and PicoPUF bit cells on 28-nm Xilinx FPGAs14
Towards efficient and automated side-channel evaluations at design time12
Low-cost distance-spoofing attack on FMCW radar and its feasibility study on countermeasure11
x-only point addition formula and faster compressed SIKE10
A differential fault attack on the WG family of stream ciphers10
Physical security in the post-quantum era9
To infect or not to infect: a critical analysis of infective countermeasures in fault attacks8
Faster unbalanced Private Set Intersection in the semi-honest setting8
On the power of template attacks in highly multivariate context7
Rock’n’roll PUFs: crafting provably secure pufs from less secure ones (extended version)7
Electromagnetic fault injection against a complex CPU, toward new micro-architectural fault models7
End-to-end automated cache-timing attack driven by machine learning7
A new read–write collision-based SRAM PUF implemented on Xilinx FPGAs6
Melting SNOW-V: improved lightweight architectures6
Survey on performance and security problems of countermeasures for passive side-channel attacks on ECC6
Montgomery-friendly primes and applications to cryptography6
Exploring Parallelism to Improve the Performance of FrodoKEM in Hardware5
Improved algebraic attacks on lightweight block ciphers4
Karatsuba-based square-root Vélu’s formulas applied to two isogeny-based protocols4
In-depth energy analysis of security algorithms and protocols for the Internet of Things4
Secret-free security: a survey and tutorial4
Improved fault analysis on SIMECK ciphers4
Post-quantum hybrid key exchange: a systematic mapping study4
A novel non-profiled side channel attack based on multi-output regression neural network4
Breaking TrustZone memory isolation and secure boot through malicious hardware on a modern FPGA-SoC4
Streamlined NTRU Prime on FPGA3
Side-channel analysis against ANSSI’s protected AES implementation on ARM: end-to-end attacks with multi-task learning3
A novel topology-guided attack and its countermeasure towards secure logic locking3
Sycon: a new milestone in designing ASCON-like permutations3
Detecting faults in inner product masking scheme3
Faster characteristic three polynomial multiplication and its application to NTRU Prime decapsulation3
A remark on a success rate model for side-channel attack analysis3
High-speed SABER key encapsulation mechanism in 65nm CMOS3
Modelling cryptographic distinguishers using machine learning3
Improving accuracy of HPC-based malware classification for embedded platforms using gradient descent optimization2
SCA secure and updatable crypto engines for FPGA SoC bitstream decryption: extended version2
Six shades lighter: a bit-serial implementation of the AES family2
Development of the RISC-V entropy source interface2
Adaptive caches as a defense mechanism against cache side-channel attacks2
Improved constant-sum encodings for hash-based signatures2
Low area-time complexity point multiplication architecture for ECC over GF($$2^{\textrm{m}}$$) using polynomial basis2
Optimized threshold implementations: securing cryptographic accelerators for low-energy and low-latency applications2
A critical view on the real-world security of logic locking2
Security and efficiency trade-offs for elliptic curve Diffie–Hellman at the 128-bit and 224-bit security levels2
Rank estimation with bounded error via exponential sampling2
Isadora: automated information-flow property generation for hardware security verification2
Spectral approach to process the (multivariate) high-order template attack against any masking scheme2
No (good) loss no gain: systematic evaluation of loss functions in deep learning-based side-channel analysis2
Fast verification and public key storage optimization for unstructured lattice-based signatures2
Programmable access-controlled and generic erasable PUF design and its applications2
A comprehensive survey of physical and logic testing techniques for Hardware Trojan detection and prevention1
MaskSIMD-lib: on the performance gap of a generic C optimized assembly and wide vector extensions for masked software with an Ascon-p test case1
A comprehensive tolerant algebraic side-channel attack over modern ciphers using constraint programming1
Parallel modular multiplication using 512-bit advanced vector instructions1
Spatial dependency analysis to extract information from side-channel mixtures: extended version1
Subgroup membership testing on elliptic curves via the Tate pairing1
Spoofing attacks against vehicular FMCW radar1
Combining static analysis and dynamic symbolic execution in a toolchain to detect fault injection vulnerabilities1
Performance of hierarchical transforms in homomorphic encryption: a case study on logistic regression inference1
Fault intensity map analysis with neural network key distinguisher1
Side-channel analysis of a learning parity with physical noise processor1
Reducing risks through simplicity: high side-channel security for lazy engineers1
Improving recent side-channel attacks against the DES key schedule1
An end-to-end approach to identify and exploit multi-fault injection vulnerabilities on microcontrollers1
Rethinking modular multi-exponentiation in real-world applications1
SPSA: Semi-Permanent Stuck-At fault analysis of AES Rijndael SBox1
A method for constructing sliding windows leak from noisy cache timing information1
AutoPOI: automated points of interest selection for side-channel analysis1
IPM-RED: combining higher-order masking with robust error detection1
Trojan awakener: detecting dormant malicious hardware using laser logic state imaging (extended version)1
Error control scheme for malicious and natural faults in cryptographic modules1
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