OOIR: Observatory of International Research

Papers

(The TQCC of IEEE Design & Test is 2. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2020-04-01 to 2024-04-01.)

Article	Citations
Robust Machine Learning Systems: Challenges,Current Trends, Perspectives, and the Road Ahead	80
A Survey on Energy Management for Mobile and IoT Devices	47
Neural Network Inference on Mobile SoCs	46
A Survey of Silicon Photonics for Energy-Efficient Manycore Computing	38
Dynamic Energy and Thermal Management of Multi-core Mobile Platforms: A Survey	33
Are CNNs Reliable Enough for Critical Applications? An Exploratory Study	31
ALIGN: A System for Automating Analog Layout	29
A Survey of Neuromorphic Computing-in-Memory: Architectures, Simulators, and Security	25
Interconnect-Aware Area and Energy Optimization for In-Memory Acceleration of DNNs	25
MAGICAL: An Open- Source Fully Automated Analog IC Layout System from Netlist to GDSII	24
GLU3.0: Fast GPU-based Parallel Sparse LU Factorization for Circuit Simulation	23
An Inside Job: Remote Power Analysis Attacks on FPGAs	22
Enabling Design Methodologies and Future Trends for Edge AI: Specialization and Codesign	22
From Less Batteries to Battery-Less Alert Systems with Wide Power Adaptation down to nWs—Toward a Smarter, Greener World	20
Analog-to-Digital Converter Design Exploration for Compute-in-Memory Accelerators	19
A Survey on Machine Learning Accelerators and Evolutionary Hardware Platforms	18
Fair and Comprehensive Benchmarking of Machine Learning Processing Chips	16
Survey on Education for Cyber-Physical Systems	16
Secure Interposer-Based Heterogeneous Integration	15
Spectre Returns! Speculation Attacks Using the Return Stack Buffer	13
Discovering CAN Specification Using On-Board Diagnostics	12
Real Silicon Using Open-Source EDA	12
SIT: Stochastic Input Transformation to Defend Against Adversarial Attacks on Deep Neural Networks	11
EM Side Channels in Hardware Security: Attacks and Defenses	11
Automatic Detection of Respiratory Symptoms Using a Low-Power Multi-Input CNN Processor	11

Semantic Adversarial Deep Learning	10
An Energy-Aware Nanoscale Design of Reversible Atomic Silicon Based on Miller Algorithm	10
Backdoor Suppression in Neural Networks using Input Fuzzing and Majority Voting	10
Enabling Timing Error Resilience for Low-Power Systolic-Array Based Deep Learning Accelerators	10
An Open-Source EDA Flow for Asynchronous Logic	10
Merged Logic and Memory Fabrics for Accelerating Machine Learning Workloads	10
Cyber-Physical Systems Security Education Through Hands-on Lab Exercises	10
Exact Stochastic Computing Multiplication in Memristive Memory	10
Verification Approaches for Learning-Enabled Autonomous Cyber–Physical Systems	10
EdgeAl: A Vision for Deep Learning in the IoT Era	9
The Role of Competence Networks in the Era of Cyber-Physical Systems — Promoting Knowledge Sharing and Knowledge Exchange	9
OpenTimer v2: A Parallel Incremental Timing Analysis Engine	9
Training Large-scale Artificial Neural Networks on Simulated Resistive Crossbar Arrays	9
FPGA-Chain: Enabling Holistic Protection of FPGA Supply Chain With Blockchain Technology	9
Testability and Dependability of AI Hardware: Survey, Trends, Challenges, and Perspectives	9
Impact of Memory Voltage Scaling on Accuracy and Resilience of Deep Learning Based Edge Devices	9
Breaking Silos to Guarantee Control Stability with Communication over Ethernet TSN	9
EM/Power Side-Channel Attack: White-Box Modeling and Signature Attenuation Countermeasures	9
Three-Input NPN Class Gate Library for Atomic Silicon Quantum Dots	9
SSCNets: Robustifying DNNs using Secure Selective Convolutional Filters	9
Machine Learning for CAD/EDA: The Road Ahead	9
A Cautionary Tale About Detecting Malware Using Hardware Performance Counters and Machine Learning	8
Introducing IoT Subjects to an Existing Curriculum	8
Self-Aware Machine Learning for Multimodal Workload Monitoring during Manual Labor on Edge Wearable Sensors	8
Hardware Obfuscation and Logic Locking: A Tutorial Introduction	8
On Backside Probing Techniques and Their Emerging Security Threats	8
Cross-Layer Design of Automotive Systems	7
A Data-Based Detection Method Against False Data Injection Attacks	7
Fault: Open-Source EDA’s Missing DFT Toolchain	7
Hardware Virtualization and Task Allocation for Plug-and-Play Automotive Systems	7
FaCT-LSTM: Fast and Compact Ternary Architecture for LSTM Recurrent Neural Networks	7
Ladder Scaling Fracmemristor: A Second Emerging Circuit Structure of Fractional-Order Memristor	7
Time-to-Digital Converter Compiler for On-Chip Instrumentation	6
Advances in Design and Test of Monolithic 3-D ICs	6
Remote Electrical-level Security Threats to Multi-Tenant FPGAs	6
Project-Based CPS Education: A Case Study of an Autonomous Driving Student Project	6
SCA Strikes Back: Reverse-Engineering Neural Network Architectures Using Side Channels	6
Intelligent Chargers Will Make Mobile Devices Live Longer	6
EDLAB: A Benchmark for Edge Deep Learning Accelerators	6
On the Mitigation of Read Disturbances in Neuromorphic Inference Hardware	6
In-Stream Correlation-Based Division and Bit-Inserting Square Root in Stochastic Computing	6
A Novel Method for Scalable VLSI Implementation of Hyperbolic Tangent Function	5
Design and Test of Crab-Shaped Negative Group Delay Circuit	5
Fault-Tolerant Neural Network Accelerators With Selective TMR	5
Estimating Code Vulnerability to Timing Errors Via Microarchitecture-Aware Machine Learning	5
Design Challenges of Intrachiplet and Interchiplet Interconnection	5
Eavesdropping Attack Detection Using Machine Learning in Network-on-Chip Architectures	5
Improving DNN Hardware Accuracy by In-Memory Computing Noise Injection	5
Defeating Cache Timing Channels with Hardware Prefetchers	5
Computing-In-Memory Using Ferroelectrics: From Single- to Multi-Input Logic	5

Framework for Load Power Consumption in HANs Using Machine Learning and IoT Assistance	5
A Hardware Accelerator for Language-Guided Reinforcement Learning	5
Split-Chip Design to Prevent IP Reverse Engineering	5
The AXIOM Project: IoT on Heterogeneous Embedded Platforms	5
Machine Learning and Algorithms: Let Us Team Up for EDA	5
Security Vulnerabilities and Countermeasures in MPSoCs	4
Using STLs for Effective In-Field Test of GPUs	4
Hardware Penetration Testing Knocks Your SoCs Off	4
The Emerging Majority: Technology and Design for Superconducting Electronics	4
Event-Triggered Sensing for High-Quality and Low-Power Cardiovascular Monitoring Systems	4
Deadlock-Freedom in Computational Neuroscience Simulators	4
Know Your Channel First, then Calibrate Your mmWave Phased Array	4
Enabling Security of Heterogeneous Integration: From Supply Chain to In-Field Operations	4
EDA and Quantum Computing: a symbiotic relationship?	4
Design of Single-Bit Fault-Tolerant Reversible Circuits	4
Multisensing System for Parkinson’s Disease Stage Assessment Based on FPGA-Embedded Serial SVM Classifier	4
Automotive Virtual In-sensor Analytics for Securing Vehicular Communication	4
Electronic, Wireless, and Photonic Network-on-Chip Security: Challenges and Countermeasures	3
PyH2: Using PyMTL3 to Create Productive and Open-Source Hardware Testing Methodologies	3
Broadcast-TDMA: A Cost-Effective Fault-Tolerance Method for TSV Lifetime Reliability Enhancement	3
Guest Editorial: Robust Resource-Constrained Systems for Machine Learning	3
Design and Test of Innovative Three-Couplers-Based Bandpass Negative Group Delay Active Circuit	3
Furthering Moore’s Law Integration Benefits in the Chiplet Era	3
Topology-Aided Multicorner Timing Predictor for Wide Voltage Design	3
Deep Reinforcement Learning for Optimization at Early Design Stages	3
Executing Data Integration Effectively and Efficiently Near the Memory	3
Machine Learning in Advanced IC Design: A Methodological Survey	3
Recycling Test Methods to Improve Test Capacity and Increase Chip Shipments	3
SoC Security Evaluation: Reflections on Methodology and Tooling	3
Integrating Interobject Scenarios with Intraobject Statecharts for Developing Reactive Systems	3
Runtime Protection of Real-time Critical Control Applications against Known Threats	3
Coordinated Self-Tuning Thermal Management Controller for Mobile Devices	3
BHT-NoC: Blaming Hardware Trojans in NoC Routers	3
Autonomous Systems Design: Charting a New Discipline	3
Shape Engineering for Custom Nanomagnetic Logic Circuits in NMLSim 2.0	3
An Area- and Power-Efficient Stochastic Number Generator for Bayesian Sensor Fusion Circuits	3
A Novel Graph-Coloring-Based Solution for Low-Power Scan Shift	3
Embracing Stochasticity to Enable Neuromorphic Computing at the Edge	3
Hunting Security Bugs in SoC Designs: Lessons Learned	3
Remote Fault Attacks in Multitenant Cloud FPGAs	3
Bandpass NGD Time- Domain Experimental Test of Double-Li Microstrip Circuit	3
A Conceptual Framework for Stochastic Neuromorphic Computing	3
Exact Benchmark Circuits for Logic Synthesis	3
A Programmable Open Architecture Testbed for CPS Education	3
High-Performance Deterministic Stochastic Computing Using Residue Number System	3
Vulnerability of Hardware Neural Networks to Dynamic Operation Point Variations	2
Real-Time Requirements for ADAS Platforms Featuring Shared Memory Hierarchies	2
Cloud-Ready Acceleration of Formal Method Techniques for Cyber–Physical Systems	2
A Systematic Design Methodology of Formally Proven Side-Channel-Resistant Cryptographic Hardware	2
Reverse-Engineering CNN Models Using Side-Channel Attacks	2
High-Throughput Hardware for 3D-HEVC Depth-Map Intra Prediction	2
Future Engineering Curricula: Balancing Domain Competence with CPS Readiness	2
Creating a Foundation for Next-Generation Autonomous Systems	2
Guest Editors’ Introduction: Stochastic Computing for Neuromorphic Applications	2
Detecting Pediatric Foot Deformities Using Plantar Pressure Measurements: A Semisupervised Approach	2
Power-Quality Configurable Hardware Design for AV1 Directional Intraframe Prediction	2
Hardware-Based Real-Time Workload Forensics	2
Datapath Extension of NPUs to Support Nonconvolutional Layers Efficiently	2
Design of ₌׀₌ Shape Stub-Based Negative Group Delay Circuit	2
API-Based Hardware Fault Simulation for DNN Accelerators	2
Testing of Prebond Through Silicon Vias	2
Real-time Hardware Implementation of ARM CoreSight Trace Decoder	2
Automated Probe-Mark Analysis for Advanced Probe Technology Characterization	2
RosettaStone: Connecting the Past, Present, and Future of Physical Design Research	2
Flexible and Scalable BLAKE/BLAKE2 Coprocessor for Blockchain-Based IoT Applications	2
A Many-Ported and Shared Memory Architecture for High-Performance ADAS SoCs	2
Lifelong Exploratory Navigation: An Architecture for Safer Mobile Robots	2
An Attachable Battery–Supercapacitor Hybrid for Large Pulsed Load	2
Autonomous Systems, Trust, and Guarantees	2
Hardware Accelerators for Digital Signature Algorithms Dilithium and FALCON	2
On the Impact of Uncertainties in Silicon-Photonic Neural Networks	2
Training Binarized Neural Networks Using Ternary Multipliers	2
On the Implementation of Fixed-Point Exponential Function for Machine Learning and Signal- Processing Accelerators	2
Self-Healing of Redundant FLASH ADCs	2