IEEE Design & Test

Papers
(The TQCC of IEEE Design & Test is 2. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2021-05-01 to 2025-05-01.)
ArticleCitations
Join IEEE47
ISLPED 2021: The 25th Anniversary!40
On Backside Probing Techniques and Their Emerging Security Threats39
BHT-NoC: Blaming Hardware Trojans in NoC Routers37
Top Picks in Hardware and Embedded Security 202228
SPOCK: Reverse Packet Traversal for Deadlock Recovery27
IEEE Foundation26
Flexible and Portable Management of Secure Scan Implementations Exploiting P1687.1 Extensions26
An Energy-Aware Nanoscale Design of Reversible Atomic Silicon Based on Miller Algorithm25
Guest Editors’ Introduction: Machine Intelligence at the Edge19
Being Learned17
IEEE Connects You to a Universe of Information!16
Proceedings of the IEEE16
ISCA: Intelligent Sense-Compute Adaptive Co-Optimization of Multimodal Machine Learning Kernels for Resilient mHealth Services on Wearables16
IEEE.tv16
Improvement of Functional Safety of the Level-Crossing Barrier Machine by a Noninvasive Angle-Detection Method15
Guest Editors’ Introduction: Special Issue on Top Picks in Hardware and Embedded Security15
Statistical Methods for Detecting Recycled Electronics: From ICs to PCBs and Beyond14
Tipping the Balance: Imbalanced Classes in Deep-Learning Side-Channel Analysis14
An Open-Source 12-bit 10-kS/s Incremental ADC in 130-nm CMOS14
Report on the 28th Asia and South Pacific Design Automation Conference13
Hardware/Algorithm Codesign for Adversarially Robust Deep Learning12
The 2022 International Conference on Computer-Aided Design (ICCAD)12
On the Impact of Uncertainties in Silicon-Photonic Neural Networks12
Provably Secure Sequential Obfuscation for IC Metering and Piracy Avoidance12
FlooNoC: A Multi-Tb/s Wide NoC for Heterogeneous AXI4 Traffic11
Soft and Hard Error-Correction Techniques in STT-MRAM11
IC Phone Home!11
edAttack: Hardware Trojan Attack on On-Chip Packet Compression11
IEEE.tv10
Special Issue on Wearable IoT Devices for Reliable Mobile Health Applications10
IEEE Membership9
Table of Contents9
IEEE Design & Test Publication Information9
IEEE Design&Test Publication Information9
Energy-Efficient and Error-Resilient Cognitive I/O for 3-D-Integrated Manycore Microprocessors8
IEEE Women in Engineering8
The Memory Shuffle8
Hardware/Software Coexploration for Hyperdimensional Computing on Network-on-Chip Architecture8
Datapath Extension of NPUs to Support Nonconvolutional Layers Efficiently8
Eavesdropping Attack Detection Using Machine Learning in Network-on-Chip Architectures8
Table of Contents7
Blank Page7
IEEE Design & Test Publication Information7
IEEE Design&Test publication information7
IEEE Women in Engineering7
Discovering CAN Specification Using On-Board Diagnostics7
A Survey on Machine Learning Accelerators and Evolutionary Hardware Platforms6
Fault-Tolerant Neuromorphic Computing With Memristors Using Functional ATPG for Efficient Recalibration6
Remembering Arvind6
On the Relation Between Reliability and Entropy in Physical Unclonable Functions6
EM/Power Side-Channel Attack: White-Box Modeling and Signature Attenuation Countermeasures6
TTTC News6
BiomedBench: A benchmark suite of TinyML biomedical applications for low-power wearables6
FPGA-Chain: Enabling Holistic Protection of FPGA Supply Chain With Blockchain Technology6
Stochastic Computing for Neuromorphic Applications6
Special Issue on the 2021 Workshop on Top Picks in Hardware and Embedded Security6
Analog-to-Digital Converter Design Exploration for Compute-in-Memory Accelerators6
Voltage–Resistance-Adaptive MPPT Circuit for Energy Harvesting5
Table of Contents5
Design and Test of Digital Logic DNA Systems5
Traversal Packets: Opportunistic Bypass Packets for Deadlock Recovery5
Accuracy-Configurable 2-D Gaussian Filter Architecture for Energy-Efficient Image Processing5
Verification Approaches for Learning-Enabled Autonomous Cyber–Physical Systems5
IEEE Membership5
Table of Contents5
Dynamically Reconfigurable Network Protocol for Shape-Changeable Computer System5
Power-Quality Configurable Hardware Design for AV1 Directional Intraframe Prediction5
CaSA: End-to-End Quantitative Security Analysis of Randomly Mapped Caches5
IEEE Design & Test Publication Information5
Special Issue on Approximate Computing: Challenges, Methodologies, Algorithms, and Architectures for Dependable and Secure Systems5
Embracing Stochasticity to Enable Neuromorphic Computing at the Edge4
IEEE Foundation4
Binary Forward-Only Algorithms4
A BIST Approach to Approximate Co-Testing of Embedded Data Converters4
Recap of the 61st ACM/IEEE Design Automation Conference (DAC61): The “Chips to Systems Conference”4
Attack of the AI Papers4
Table of Contents4
Table of Contents4
Computing-In-Memory Using Ferroelectrics: From Single- to Multi-Input Logic4
Front Cover4
Robust and Secure Systems4
IEEE Design & Test Publication Information4
End-to-End Automated Exploit Generation for Processor Security Validation4
Front Cover4
Guest Editors’ Introduction: SBCCI 20203
Special Issue on Design and Test of Multidie Packages3
ISLPED 2023: International Symposium on Low-Power Electronics and Design3
CAFEEN: A Cooperative Approach for Energy-Efficient NoCs With Multiagent Reinforcement Learning3
The Future of Design for Test and Silicon Lifecycle Management3
Design for Test With Unreliable Memories by Restoring the Beauty of Randomness3
Novel Technique for Manufacturing, System-Level, and In-System Testing of Large SoC Using Functional Protocol-Based High-Speed I/O3
IEEE Membership3
Using STLs for Effective In-Field Test of GPUs3
TTTC News3
Estimating Code Vulnerability to Timing Errors Via Microarchitecture-Aware Machine Learning3
A Global Self-Repair Method for TSV Arrays With Adaptive FNS-CAC Codec3
The 28th IEEE European Test Symposium3
Long-Wire Leakage: The Threat of Crosstalk3
Functional Verification of a RISC-V Vector Accelerator3
Shaping Resilient AI Hardware Through DNN Computational Feature Exploitation2
Front Cover2
SeMAP—A Method to Secure the Communication in NoC-Based Many-Cores2
Ethical Design of Computers: From Semiconductors to IoT and Artificial Intelligence2
Heuristic-Based Algorithms for Low-Complexity AV1 Intraprediction2
Front Cover2
Is There an Answer?2
A Case for PIM Support in General-Purpose Compilers2
SoCProbe: Compositional Post-Silicon Validation of Heterogeneous NoC-Based SoCs2
Table of Contents2
GlucoseHD: Predicting Glucose Levels Using Hyperdimensional Computing2
Cloud-Ready Acceleration of Formal Method Techniques for Cyber–Physical Systems2
Table of Contents2
Testing for Electromigration in Sub-5-nm FinFET Memories2
Learning Your Lock: Exploiting Structural Vulnerabilities in Logic Locking2
IEEE Design & Test Publication Information2
SAFER: Safety Assurances for Emergent Behavior2
Special Issue on NOCS 20222
Real-Time Requirements for ADAS Platforms Featuring Shared Memory Hierarchies2
Recap of the 29th ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED’24)2
Silicon Lifecycle Management (SLM): Requirements, Trends, and Opportunities2
Table of Contents2
IEEE Design&Test Is Going Paperless in 2022!2
Table of Contents2
Strange Loops in Design and Technology: 59th DAC Keynote Speech2
Seamless Thermal Optimization of Parallel Workloads2
Majority-Logic-Based Self-Checking Adder in Quantum-Dot Cellular Automata2
Building an Open-Source DNA Assembler Device2
A Cautionary Tale About Detecting Malware Using Hardware Performance Counters and Machine Learning2
Rethinking System-on-Chip Verification for Secure Cross-layer Interactions2
Special Issue on the 2023 International Symposium on Networks-on-Chip (NOCS 2023)2
Virtualizing USB Kernel Mode Debug (KMD) Class to Guest OS for Native OS-Like Debug Experience2
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