IEEE Design & Test

Papers
(The TQCC of IEEE Design & Test is 2. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2021-02-01 to 2025-02-01.)
ArticleCitations
On Backside Probing Techniques and Their Emerging Security Threats39
Toward Agile Hardware Designs With Chisel: A Network Use Case32
Top Picks in Hardware and Embedded Security 202231
Adaptive Integer Linear Programming Model for Optimal Qubit Permutation30
The 2020 Embedded Systems Week (ESWEEK): A Virtual Event During a Pandemic29
IEEE Women in Engineering25
IEEE Membership24
TTTC Newsletter24
Front Cover23
Reconfigurable Pipelined Control Systems21
Design of Single-Bit Fault-Tolerant Reversible Circuits19
Flexible and Portable Management of Secure Scan Implementations Exploiting P1687.1 Extensions18
Special Issue on Testability and Dependability of Artificial Intelligence Hardware15
Low-Power High-Throughput Architecture for AV1 Arithmetic Decoder14
Front Cover14
40th IEEE VLSI Test Symposium 202213
IEEE Design & Test Publication Information13
Fair and Comprehensive Benchmarking of Machine Learning Processing Chips13
Table of Contents13
Exact Stochastic Computing Multiplication in Memristive Memory12
Hardware Penetration Testing Knocks Your SoCs Off11
IEEE Design&Test Publication Information11
ISLPED 2021: The 25th Anniversary!11
PiN: Processing in Network-on-Chip11
Front Cover11
TechRxiv: Share Your Preprint Research with the World!10
IEEE Women in Engineering10
Report on the 2021 Embedded Systems Week (ESWEEK)10
Enabling Design Methodologies and Future Trends for Edge AI: Specialization and Codesign10
TTTC News10
On the Implementation of Fixed-Point Exponential Function for Machine Learning and Signal- Processing Accelerators10
Autonomous Systems Design: Charting a New Discipline9
A Reinforcement Learning Framework With Region-Awareness and Shared Path Experience for Efficient Routing in Networks-on-Chip9
Shape Engineering for Custom Nanomagnetic Logic Circuits in NMLSim 2.08
Breaking Silos to Guarantee Control Stability with Communication over Ethernet TSN8
Update Your IEEE Profile8
Front Cover8
IEEE Foundation8
Deep Reinforcement Learning for Optimization at Early Design Stages8
BHT-NoC: Blaming Hardware Trojans in NoC Routers8
Front Cover7
Self-Healing of Redundant FLASH ADCs7
An Energy-Aware Nanoscale Design of Reversible Atomic Silicon Based on Miller Algorithm7
Losing My Memory7
Product Health Insights Using Telemetry7
IEEE Design & Test Publication Information7
RosettaStone: Connecting the Past, Present, and Future of Physical Design Research7
Machine Learning for CAD/EDA: The Road Ahead7
Guest Editors’ Introduction: Stochastic Computing for Neuromorphic Applications6
Special Issue on Postquantum Cryptography for Internet of Things6
IEEE Foundation6
Machine Learning and Algorithms: Let Us Team Up for EDA6
Table of Contents6
Side Channel and Fault Analyses on Memristor-Based Logic In-Memory6
Join IEEE6
IEEE Design & Test Publication Information6
Robust and Secure Systems6
Computing-In-Memory Using Ferroelectrics: From Single- to Multi-Input Logic5
Fast Analysis Using Finite Queuing Model for Multilayer NoCs5
Topology-Aided Multicorner Timing Predictor for Wide Voltage Design5
On the Mitigation of Read Disturbances in Neuromorphic Inference Hardware5
Attack of the AI Papers5
Furthering Moore’s Law Integration Benefits in the Chiplet Era5
A Survey of High-Level Synthesis-Based Hardware (IP) Watermarking Approaches4
Compact and High-performing Five-stage Pipeline RISC-V Microprocessor Designed for IoT Applications4
SCA Strikes Back: Reverse-Engineering Neural Network Architectures Using Side Channels4
STLs for GPUs: Using High-Level Language Approaches4
Background Receiver IQ Imbalance Correction for In-Field Testing4
Front Cover4
Automated Probe-Mark Analysis for Advanced Probe Technology Characterization4
The 41st IEEE VLSI Test Symposium4
HPC-Based Malware Detectors Actually Work: Transition to Practice After a Decade of Research4
Open-Source Multilevel Converter Power IC Design and Test4
A NoC-Based Spatial DNN Inference Accelerator With Memory-Friendly Dataflow4
Table of Contents4
IEEE Design&Test EIC Call for Nominations4
Front Cover4
Active and Passive Physical Attacks on Neural Network Accelerators4
Binary Forward-Only Algorithms4
TechRxiv: Share Your Preprint Research With the World!4
SPOCK: Reverse Packet Traversal for Deadlock Recovery4
Report on the 2024 Embedded Systems Week (ESWEEK)4
Guest Editors’ Introduction: Machine Intelligence at the Edge4
Linear Algorithmic Checksums for Deep Neural Network Error Detection: Fundamentals & Recent Advancements4
The AXIOM Project: IoT on Heterogeneous Embedded Platforms4
Real-time Hardware Implementation of ARM CoreSight Trace Decoder3
Report on the 28th Asia and South Pacific Design Automation Conference3
IEEE Foundation3
Front Cover3
The 2021 Asia and South Pacific Design Automation Conference (ASPDAC)3
An Open-Source EDA Flow for Asynchronous Logic3
DRAM PUFs in Commodity Devices3
Deadlock-Freedom in Computational Neuroscience Simulators3
Training Binarized Neural Networks Using Ternary Multipliers3
Detecting and Scoring Equipment Faults in Real Time During Semiconductor Test Processes3
Special Issue on Ethics in Computing3
Fully Microstrip Three-Port Circuit Bandpass NGD Design and Test3
ISLPED 2022: An Experience of a Hybrid Conference in the Time of COVID-193
Being Learned3
IEEE Design&Test publication information3
Guest Editors’ Introduction: Special Issue on Top Picks in Hardware and Embedded Security2
Front Cover2
Improvement of Functional Safety of the Level-Crossing Barrier Machine by a Noninvasive Angle-Detection Method2
On the Impact of Uncertainties in Silicon-Photonic Neural Networks2
Table of Contents2
ISLPED 2023: International Symposium on Low-Power Electronics and Design2
Multiplication Circuit Architecture for Error- Tolerant CNN-Based Keywords Speech Recognition2
IEEE.tv2
IEEE Design&Test publication information2
Recap of the 39th Edition of the International Conference on Computer-Aided Design (ICCAD 2020)2
Table of Contents2
Special Issue on Design and Test of Multidie Packages2
A BIST Approach to Approximate Co-Testing of Embedded Data Converters2
Expanding Column Line Code Adaptive (CLC-A) for Protecting 32-and 64-Bit Data2
Front Cover2
A Mixture of Experts Approach for Low-Cost DNN Customization2
Machine Learning for CAD/EDA2
[Front cover]2
IEEE Foundation2
Guest Editors’ Introduction: Competing to Secure SoCs2
Report on First and Second ACM/IEEE Workshop on Machine Learning for CAD (MLCAD)2
Design for Test With Unreliable Memories by Restoring the Beauty of Randomness2
Testing Embedded Toggle Generation Through On-Chip IR-Drop Measurements2
Design and Test of Innovative Three-Couplers-Based Bandpass Negative Group Delay Active Circuit2
Front Cover2
Using STLs for Effective In-Field Test of GPUs2
The Future of Design for Test and Silicon Lifecycle Management2
Proceedings of the IEEE2
Open-Source Electronic Design Automation (EDA) Tools2
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