IEEE Design & Test

Article	Citations
Join IEEE	47
ISLPED 2021: The 25th Anniversary!	40
On Backside Probing Techniques and Their Emerging Security Threats	39
BHT-NoC: Blaming Hardware Trojans in NoC Routers	37
Top Picks in Hardware and Embedded Security 2022	28
SPOCK: Reverse Packet Traversal for Deadlock Recovery	27
IEEE Foundation	26
Flexible and Portable Management of Secure Scan Implementations Exploiting P1687.1 Extensions	26
An Energy-Aware Nanoscale Design of Reversible Atomic Silicon Based on Miller Algorithm	25
Guest Editors’ Introduction: Machine Intelligence at the Edge	19
Being Learned	17
ISCA: Intelligent Sense-Compute Adaptive Co-Optimization of Multimodal Machine Learning Kernels for Resilient mHealth Services on Wearables	16
IEEE.tv	16
IEEE Connects You to a Universe of Information!	16
Proceedings of the IEEE	16
Improvement of Functional Safety of the Level-Crossing Barrier Machine by a Noninvasive Angle-Detection Method	15
Guest Editors’ Introduction: Special Issue on Top Picks in Hardware and Embedded Security	15
Statistical Methods for Detecting Recycled Electronics: From ICs to PCBs and Beyond	14
Tipping the Balance: Imbalanced Classes in Deep-Learning Side-Channel Analysis	14
An Open-Source 12-bit 10-kS/s Incremental ADC in 130-nm CMOS	14
Report on the 28th Asia and South Pacific Design Automation Conference	13
Hardware/Algorithm Codesign for Adversarially Robust Deep Learning	12
The 2022 International Conference on Computer-Aided Design (ICCAD)	12
On the Impact of Uncertainties in Silicon-Photonic Neural Networks	12
Provably Secure Sequential Obfuscation for IC Metering and Piracy Avoidance	12

FlooNoC: A Multi-Tb/s Wide NoC for Heterogeneous AXI4 Traffic	11
Soft and Hard Error-Correction Techniques in STT-MRAM	11
IC Phone Home!	11
edAttack: Hardware Trojan Attack on On-Chip Packet Compression	11
IEEE.tv	10
Special Issue on Wearable IoT Devices for Reliable Mobile Health Applications	10
IEEE Design & Test Publication Information	9
IEEE Design&Test Publication Information	9
IEEE Membership	9
Table of Contents	9
Datapath Extension of NPUs to Support Nonconvolutional Layers Efficiently	8
Eavesdropping Attack Detection Using Machine Learning in Network-on-Chip Architectures	8
Energy-Efficient and Error-Resilient Cognitive I/O for 3-D-Integrated Manycore Microprocessors	8
IEEE Women in Engineering	8
The Memory Shuffle	8
Hardware/Software Coexploration for Hyperdimensional Computing on Network-on-Chip Architecture	8
IEEE Women in Engineering	7
Discovering CAN Specification Using On-Board Diagnostics	7
Table of Contents	7
Blank Page	7
IEEE Design & Test Publication Information	7
IEEE Design&Test publication information	7
A Survey on Machine Learning Accelerators and Evolutionary Hardware Platforms	6
Fault-Tolerant Neuromorphic Computing With Memristors Using Functional ATPG for Efficient Recalibration	6
Remembering Arvind	6
On the Relation Between Reliability and Entropy in Physical Unclonable Functions	6
EM/Power Side-Channel Attack: White-Box Modeling and Signature Attenuation Countermeasures	6
TTTC News	6
BiomedBench: A benchmark suite of TinyML biomedical applications for low-power wearables	6
FPGA-Chain: Enabling Holistic Protection of FPGA Supply Chain With Blockchain Technology	6
Stochastic Computing for Neuromorphic Applications	6
Special Issue on the 2021 Workshop on Top Picks in Hardware and Embedded Security	6
Analog-to-Digital Converter Design Exploration for Compute-in-Memory Accelerators	6
CaSA: End-to-End Quantitative Security Analysis of Randomly Mapped Caches	5
IEEE Design & Test Publication Information	5
Special Issue on Approximate Computing: Challenges, Methodologies, Algorithms, and Architectures for Dependable and Secure Systems	5
Voltage–Resistance-Adaptive MPPT Circuit for Energy Harvesting	5
Table of Contents	5
Design and Test of Digital Logic DNA Systems	5
Traversal Packets: Opportunistic Bypass Packets for Deadlock Recovery	5
Accuracy-Configurable 2-D Gaussian Filter Architecture for Energy-Efficient Image Processing	5
Verification Approaches for Learning-Enabled Autonomous Cyber–Physical Systems	5
IEEE Membership	5
Table of Contents	5
Dynamically Reconfigurable Network Protocol for Shape-Changeable Computer System	5
Power-Quality Configurable Hardware Design for AV1 Directional Intraframe Prediction	5
IEEE Design & Test Publication Information	4
End-to-End Automated Exploit Generation for Processor Security Validation	4
Front Cover	4
Embracing Stochasticity to Enable Neuromorphic Computing at the Edge	4

IEEE Foundation	4
Binary Forward-Only Algorithms	4
A BIST Approach to Approximate Co-Testing of Embedded Data Converters	4
Recap of the 61st ACM/IEEE Design Automation Conference (DAC61): The “Chips to Systems Conference”	4
Attack of the AI Papers	4
Table of Contents	4
Table of Contents	4
Computing-In-Memory Using Ferroelectrics: From Single- to Multi-Input Logic	4
Front Cover	4
Robust and Secure Systems	4
ISLPED 2023: International Symposium on Low-Power Electronics and Design	3
The Future of Design for Test and Silicon Lifecycle Management	3
CAFEEN: A Cooperative Approach for Energy-Efficient NoCs With Multiagent Reinforcement Learning	3
Design for Test With Unreliable Memories by Restoring the Beauty of Randomness	3
Novel Technique for Manufacturing, System-Level, and In-System Testing of Large SoC Using Functional Protocol-Based High-Speed I/O	3
IEEE Membership	3
TTTC News	3
Estimating Code Vulnerability to Timing Errors Via Microarchitecture-Aware Machine Learning	3
Using STLs for Effective In-Field Test of GPUs	3
A Global Self-Repair Method for TSV Arrays With Adaptive FNS-CAC Codec	3
The 28th IEEE European Test Symposium	3
Functional Verification of a RISC-V Vector Accelerator	3
Long-Wire Leakage: The Threat of Crosstalk	3
Guest Editors’ Introduction: SBCCI 2020	3
Special Issue on Design and Test of Multidie Packages	3
SeMAP—A Method to Secure the Communication in NoC-Based Many-Cores	2
Ethical Design of Computers: From Semiconductors to IoT and Artificial Intelligence	2
Heuristic-Based Algorithms for Low-Complexity AV1 Intraprediction	2
Front Cover	2
Is There an Answer?	2
A Case for PIM Support in General-Purpose Compilers	2
SoCProbe: Compositional Post-Silicon Validation of Heterogeneous NoC-Based SoCs	2
Table of Contents	2
GlucoseHD: Predicting Glucose Levels Using Hyperdimensional Computing	2
Cloud-Ready Acceleration of Formal Method Techniques for Cyber–Physical Systems	2
Table of Contents	2
Testing for Electromigration in Sub-5-nm FinFET Memories	2
Learning Your Lock: Exploiting Structural Vulnerabilities in Logic Locking	2
IEEE Design & Test Publication Information	2
SAFER: Safety Assurances for Emergent Behavior	2
Special Issue on NOCS 2022	2
Real-Time Requirements for ADAS Platforms Featuring Shared Memory Hierarchies	2
Recap of the 29th ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED’24)	2
Silicon Lifecycle Management (SLM): Requirements, Trends, and Opportunities	2
Table of Contents	2
IEEE Design&Test Is Going Paperless in 2022!	2
Table of Contents	2
Strange Loops in Design and Technology: 59th DAC Keynote Speech	2
Seamless Thermal Optimization of Parallel Workloads	2
Majority-Logic-Based Self-Checking Adder in Quantum-Dot Cellular Automata	2
Building an Open-Source DNA Assembler Device	2
A Cautionary Tale About Detecting Malware Using Hardware Performance Counters and Machine Learning	2
Rethinking System-on-Chip Verification for Secure Cross-layer Interactions	2
Special Issue on the 2023 International Symposium on Networks-on-Chip (NOCS 2023)	2
Virtualizing USB Kernel Mode Debug (KMD) Class to Guest OS for Native OS-Like Debug Experience	2
Shaping Resilient AI Hardware Through DNN Computational Feature Exploitation	2
Front Cover	2
Front Cover	1
Reverse-Engineering CNN Models Using Side-Channel Attacks	1
A Graduate Curriculum in Cyber-Physical Systems	1
The 41st IEEE VLSI Test Symposium	1
Fully Microstrip Three-Port Circuit Bandpass NGD Design and Test	1
25 Years (and a Bit More) of The Last Byte	1
Product Health Insights Using Telemetry	1
Furthering Moore’s Law Integration Benefits in the Chiplet Era	1
A Coding Efficiency-Aware Hardware Design for VVC Affine Motion Estimation Reconstructor	1
VioNet: A Hierarchical Detailed Routing Wire-Short Violation Predictor Based on a Convolutional Neural Network	1
An EMG Denoising Method Based on Flexible Wearable Sensors	1
Machine Learning for CAD/EDA	1
Report on the 2024 Embedded Systems Week (ESWEEK)	1
IEEE App	1
Get in the Conversation!	1
Guest Editors’ Introduction: Stochastic Computing for Neuromorphic Applications	1
Postquantum Cryptography for Internet of Things	1
Background Receiver IQ Imbalance Correction for In-Field Testing	1
Special Issue on Benchmarking Machine Learning Systems and Applications	1
Cross-Layer Design of Automotive Systems	1
Analytical Model for Performance Evaluation of Token-Passing-Based WiNoCs	1
ISLPED 2022: An Experience of a Hybrid Conference in the Time of COVID-19	1
40th IEEE VLSI Test Symposium 2022	1

Analysis and Mitigation of DRAM Faults in Sparse-DNN Accelerators	1
Table of Contents	1
TTTC News	1
Machine Learning in Advanced IC Design: A Methodological Survey	1
Front Cover	1
Table of Contents	1
SBCCI 2022	1
Automated Probe-Mark Analysis for Advanced Probe Technology Characterization	1
Breaking Silos to Guarantee Control Stability with Communication over Ethernet TSN	1
This Stuff Is Great—Am I Right?	1
Report on the 2021 Embedded Systems Week (ESWEEK)	1
Detecting and Scoring Equipment Faults in Real Time During Semiconductor Test Processes	1
Guest Editors’ Introduction: Special Issue on Autonomous Systems Design	1
Autonomous Systems, Trust, and Guarantees	1
Spectre Returns! Speculation Attacks Using the Return Stack Buffer	1
Deadlock-Freedom in Computational Neuroscience Simulators	1
Bandpass NGD Time- Domain Experimental Test of Double-Li Microstrip Circuit	1
TTTC News	1
IEEE Design & Test Publication Information	1
Site-to-Site Variation in Analog Multisite Testing: A Survey on Its Detection and Correction	1
Framework for Load Power Consumption in HANs Using Machine Learning and IoT Assistance	1
IEEE Membership	1
IEEE Design&Test Is Going Paperless in 2022!	1
IEEE Design & Test Publication Information	1
Special Issue on Wearable IoT Devices for Reliable Mobile Health Applications	1
Training Binarized Neural Networks Using Ternary Multipliers	1
Fair and Comprehensive Benchmarking of Machine Learning Processing Chips	1
IEEE.tv	1
Special Issue on Near-Memory and In-Memory Processing	1
Mitigating Speculative Execution Attacks via Context-Sensitive Fencing	0
Secure Interposer-Based Heterogeneous Integration	0
API-Based Hardware Fault Simulation for DNN Accelerators	0
Special Issue on 2021 Top Picks in Hardware and Embedded Security	0
Interview With Janet Olson	0
IEEE Women in Engineering	0
Table of Contents	0
IEEE Foundation	0
IEEE Design & Test Publication Information	0
Report on the Design Automation Conference (DAC 2021)	0
Table of Contents	0
Front Cover	0
Dependable STT-MRAM With Emerging Approximation and Speculation Paradigms	0
Front Cover	0
TTTC News	0
A Hardware Accelerator for Language-Guided Reinforcement Learning	0
Cross-Layer Design of Cyber–Physical Systems	0
Tree-Based Unidirectional Neural Networks for Low-Power Computer Vision	0
FALCON: An FPGA Emulation Platform for Domain-Specific SoCs (DSSoCs)	0
A 703.4-GOPs/W Binary SegNet Processor With Computing-Near-Memory Architecture for Road Detection	0
On the Implementation of Fixed-Point Exponential Function for Machine Learning and Signal- Processing Accelerators	0
Report on the 2023 Embedded Systems Week (ESWEEK)	0
Front Cover	0
Split-Chip Design to Prevent IP Reverse Engineering	0
Testing for Multiple Faults in Deep Neural Networks	0
Affordable and Comprehensive Testing of 3-D Stacked Die Devices	0
Efficient Aspect Verification and Debugging of High-Performance Microprocessor Designs	0
ViT-Reg: Regression-Focused Hardware-Aware Fine-Tuning for ViT on tinyML Platforms	0
TTTC News	0
ELEMENT: Energy-Efficient Multi-NoP Architecture for IMC-Based 2.5-D Accelerator for DNN Training	0
Recap of the 29th Edition of the Asia and South Pacific Design Automation Conference (ASPDAC 2024)	0
Indirect Test Pattern Generation for Mixed-Signal Circuits Using Machine Learning	0
STAR: A Mixed Analog Stochastic In-DRAM Convolutional Neural Network Accelerator	0
EM Side Channels in Hardware Security: Attacks and Defenses	0
Our Gated Community	0
Top Picks in Hardware and Embedded Security	0
Postpandemic Conferences: The DATE 2023 Experience	0
Table of Contents	0
Erratum to “Ethical Design of Computers: From Semiconductors to IoT and Artificial Intelligence”	0
Holding Conferences Online in Pandemic Times: The DATE Experience	0
Lifelong Exploratory Navigation: An Architecture for Safer Mobile Robots	0
Hard-Sign: A Hardware Watermarking Scheme Using Dated Handwritten Signature	0
SIT: Stochastic Input Transformation to Defend Against Adversarial Attacks on Deep Neural Networks	0
PiN: Processing in Network-on-Chip	0
Secure FFT IP Using C-Way Partitioning-Based Obfuscation and Fingerprint	0
Design Challenges of Intrachiplet and Interchiplet Interconnection	0
Graph-Based Circuit Simulator for Switched Capacitor Circuits	0
Memory Usage Estimation for Dataflow-Model-Based Software Development Methodology	0
Testability and Dependability of AI Hardware: Survey, Trends, Challenges, and Perspectives	0
Workload-Aware Periodic Interconnect BIST	0
IEEE Design & Test Publication Information	0
Small Is Good	0
Toward Attention-based TinyML: A Heterogeneous Accelerated Architecture and Automated Deployment Flow	0
IEEE Design & Test Publication Information	0
Using Approximate Circuits Against Hardware Trojans	0
In-Stream Correlation-Based Division and Bit-Inserting Square Root in Stochastic Computing	0
Fuzzing for Automated SoC Security Verification: Challenges and Solution	0
IEEE Design&Test publication information	0
Remote Power Side- Channel Attacks on FPGAs	0
IEEE Membership	0
IEEE Design & Test Publication Information	0
Self-Sustainable Wearable and Internet of Things (IoT) Devices for Health Monitoring: Opportunities and Challenges	0
Lynn Conway: Two Remembrances	0
Migortho: A Design Automation Flow for QCA Circuits	0
Front Cover	0
A NoC-Based Spatial DNN Inference Accelerator With Memory-Friendly Dataflow	0