OOIR: Observatory of International Research

Papers

(The median citation count of IEEE Design & Test is 0. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2022-06-01 to 2026-06-01.)

Article	Citations
IEEE Foundation	70
Top Picks in Hardware and Embedded Security 2022	42
Flexible and Portable Management of Secure Scan Implementations Exploiting P1687.1 Extensions	36
Special Issue on the 2023 Symposium on Integrated Circuits and Systems Design	31
On Backside Probing Techniques and Their Emerging Security Threats	28
Celebrating 20 Years of EDA: Milestones, Challenges, and Future Directions	26
SPOCK: Reverse Packet Traversal for Deadlock Recovery	25
Special Issue on Emerging Challenges With 3-D NAND Flash Storage	22
BHT-NoC: Blaming Hardware Trojans in NoC Routers	22
An Energy-Aware Nanoscale Design of Reversible Atomic Silicon Based on Miller Algorithm	21
Tipping the Balance: Imbalanced Classes in Deep-Learning Side-Channel Analysis	20
Improvement of Functional Safety of the Level-Crossing Barrier Machine by a Noninvasive Angle-Detection Method	20
Report on the 28th Asia and South Pacific Design Automation Conference	19
Statistical Methods for Detecting Recycled Electronics: From ICs to PCBs and Beyond	18
IEEE Connects You to a Universe of Information!	18
Front Cover	16
Celebrating Three Decades of IEEE/ACM International Symposium on Low Power Electronics and Design	15
On the Impact of Uncertainties in Silicon-Photonic Neural Networks	15
ISCA: Intelligent Sense-Compute Adaptive Co-Optimization of Multimodal Machine Learning Kernels for Resilient mHealth Services on Wearables	14
An Open-Source 12-bit 10-kS/s Incremental ADC in 130-nm CMOS	13
The 2022 International Conference on Computer-Aided Design (ICCAD)	13
FlooNoC: A Multi-Tb/s Wide NoC for Heterogeneous AXI4 Traffic	12
IC Phone Home!	12
Special Issue on Wearable IoT Devices for Reliable Mobile Health Applications	11
edAttack: Hardware Trojan Attack on On-Chip Packet Compression	11

IEEE App	11
Table of Contents	10
IEEE Design & Test Publication Information	10
IEEE Design&Test Publication Information	10
Soft and Hard Error-Correction Techniques in STT-MRAM	10
Blank Page	10
Hardware/Software Coexploration for Hyperdimensional Computing on Network-on-Chip Architecture	9
Eavesdropping Attack Detection Using Machine Learning in Network-on-Chip Architectures	9
Datapath Extension of NPUs to Support Nonconvolutional Layers Efficiently	9
Get in the Conversation!	9
IEEE Foundation	8
IEEE Design & Test Publication Information	8
Special Issue on the 2021 Workshop on Top Picks in Hardware and Embedded Security	8
Table of Contents	8
CLEAR Cross-Layer Resilience: A Retrospective	7
FPGA-Chain: Enabling Holistic Protection of FPGA Supply Chain With Blockchain Technology	7
SoC-GPIO-Based Dynamic Power Noise Control for Video Sensor Applications	7
Remembering Arvind	7
Fault-Tolerant Neuromorphic Computing With Memristors Using Functional ATPG for Efficient Recalibration	7
IEEE App	7
A Survey on Machine Learning Accelerators and Evolutionary Hardware Platforms	6
BiomedBench: A Benchmark Suite of TinyML Biomedical Applications for Low-Power Wearables	6
Voltage–Resistance-Adaptive MPPT Circuit for Energy Harvesting	6
On the Relation Between Reliability and Entropy in Physical Unclonable Functions	6
CaSA: End-to-End Quantitative Security Analysis of Randomly Mapped Caches	6
Special Issue on Approximate Computing: Challenges, Methodologies, Algorithms, and Architectures for Dependable and Secure Systems	6
Evaluating 3-D Flash Memory Retention Reliability Under Temperature Elevation	6
Traversal Packets: Opportunistic Bypass Packets for Deadlock Recovery	6
IEEE Design & Test Publication Information	5
Circuits to Systems: Codesigning Efficient AI Hardware	5
A Brief 20-Year History and Future Perspectives on Sizing and Layout Synthesis of Analog/RF ICs	5
Special Issue Dedicated to the 2024 Symposium on Integrated Circuits and Systems Design (SBCCI)	5
Special Issue on TinyML	5
IEEE Membership	5
Robust and Secure Systems	5
Front Cover	5
A Tutorial on Secure and Efficient Firmware Delivery	5
Recap of the 62nd ACM/IEEE Design Automation Conference (DAC62): The “Chips to Systems Conference”	5
Estimating Code Vulnerability to Timing Errors Via Microarchitecture-Aware Machine Learning	5
IEEE Design & Test Publication Information	5
Dynamically Reconfigurable Network Protocol for Shape-Changeable Computer System	5
Table of Contents	5
20 Years of IEEE CEDA and More of EDA	5
Physical Design for Heterogeneous Integration: Challenges and Opportunities	5
TechRxiv	5
Binary Forward-Only Algorithms	5
Get in the Conversation!	5
Attack of the AI Papers	5
Special Issue on Design and Test of Multidie Packages	4
Front Cover	4

Functional Verification of a RISC-V Vector Accelerator	4
Table of Contents	4
The 28th IEEE European Test Symposium	4
IEEE Connects You to a Universe of Information!	4
A BIST Approach to Approximate Co-Testing of Embedded Data Converters	4
Novel Technique for Manufacturing, System-Level, and In-System Testing of Large SoC Using Functional Protocol-Based High-Speed I/O	4
ISLPED 2023: International Symposium on Low-Power Electronics and Design	4
IEEE Membership	4
Recap of the 61st ACM/IEEE Design Automation Conference (DAC61): The “Chips to Systems Conference”	4
Heuristic-Based Algorithms for Low-Complexity AV1 Intraprediction	3
Special Issue on Emerging Challenges With 3-D NAND Flash Storage	3
Special Issue on Top Picks in Test and Reliability	3
IEEE Design & Test Publication Information	3
Residual Structural Traces in Logic Locking: Insights from Redundancy Analysis and Beyond	3
Table of Contents	3
Learning Your Lock: Exploiting Structural Vulnerabilities in Logic Locking	3
Strange Loops in Design and Technology: 59th DAC Keynote Speech	3
Report on the 2025 Embedded Systems Week (ESWEEK)	3
Table of Contents	3
The Future of Design for Test and Silicon Lifecycle Management	3
CAFEEN: A Cooperative Approach for Energy-Efficient NoCs With Multiagent Reinforcement Learning	3
Edge AI—An Industry View	3
Seamless Thermal Optimization of Parallel Workloads	3
Testing for Electromigration in Sub-5-nm FinFET Memories	3
EAVREF: An Evolutionary-Algorithm-Based Tool for Low-Power CMOS Voltage Reference Designs	3
Table of Contents	3
A Global Self-Repair Method for TSV Arrays With Adaptive FNS-CAC Codec	3
Using STLs for Effective In-Field Test of GPUs	3
IEEE Design & Test Publication Information	3
Long-Wire Leakage: The Threat of Crosstalk	3
A Coding Efficiency-Aware Hardware Design for VVC Affine Motion Estimation Reconstructor	2
VioNet: A Hierarchical Detailed Routing Wire-Short Violation Predictor Based on a Convolutional Neural Network	2
Analysis and Mitigation of DRAM Faults in Sparse-DNN Accelerators	2
Virtualizing USB Kernel Mode Debug (KMD) Class to Guest OS for Native OS-Like Debug Experience	2
Front Cover	2
Is There an Answer?	2
Postquantum Cryptography for Internet of Things	2
Rethinking SoC Verification for Secure Cross-Layer Interactions	2
Guest Editors’ Introduction: SBCCI 2023	2
SoCProbe: Compositional Post-Silicon Validation of Heterogeneous NoC-Based SoCs	2
SAFER: Safety Assurances for Emergent Behavior	2
This Stuff Is Great—Am I Right?	2
Special Issue on NOCS 2022	2
IEEE Design & Test Publication Information	2
Machine Learning in Advanced IC Design: A Methodological Survey	2
IEEE Membership	2
GlucoseHD: Predicting Glucose Levels Using Hyperdimensional Computing	2
On the Origin of AI Species	2
Front Cover	2
3-D Ferroelectric NAND In-Storage Processing Architecture for Mass Spectrometry	2
Silicon Lifecycle Management (SLM): Requirements, Trends, and Opportunities	2
Special Issue on Wearable IoT Devices for Reliable Mobile Health Applications	2
SeMAP—A Method to Secure the Communication in NoC-Based Many-Cores	2
Majority-Logic-Based Self-Checking Adder in Quantum-Dot Cellular Automata	2
Special Issue on the 2023 International Symposium on Networks-on-Chip (NOCS 2023)	2
Shaping Resilient AI Hardware Through DNN Computational Feature Exploitation	2
IEEE App	2
Report on the 2024 Embedded Systems Week (ESWEEK)	2
Site-to-Site Variation in Analog Multisite Testing: A Survey on Its Detection and Correction	2
Special Issue on the First IEEE Top Picks in VLSI Test and Reliability Workshop	2
Leveraging RISC-V for HW/SW Codesign of Flexible and Efficient TinyML SoCs	2
IEEE Design & Test Publication Information	2
SBCCI 2022	2
IEEE Foundation	2
Safe from Prying Eyes	2
An EMG Denoising Method Based on Flexible Wearable Sensors	2
Recap of the 29th ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED’24)	2
Ethical Design of Computers: From Semiconductors to IoT and Artificial Intelligence	2
Front Cover	2
Building an Open-Source DNA Assembler Device	2
IEEE Membership	2
Reverse-Engineering CNN Models Using Side-Channel Attacks	1
The VCR Effect in Active-RC Continuous-Time Sigma–Delta Modulators	1
Crypto-DSEDA: A Domain-Specific EDA Flow for CiM-Based Cryptographic Accelerators	1
IEEE Design & Test Publication Information	1
Exploring Asymmetric Autoencoder Architectures for Computationally Efficient Neural Image Compression	1
Background Receiver IQ Imbalance Correction for In-Field Testing	1
Impact of Partial TMR on RISC-V Processor Reliability	1
The 41st IEEE VLSI Test Symposium	1
Table of Contents	1

A Growing and Thriving Electronic Design, Automation, and Test Community: A DATE 2025 Perspective	1
IEEE App	1
Quantum-Safe Internet of Things	1
IEEE Membership	1
Get in the Conversation!	1
Analytical Model for Performance Evaluation of Token-Passing-Based WiNoCs	1
Spectre Returns! Speculation Attacks Using the Return Stack Buffer	1
IEEE App	1
Product Health Insights Using Telemetry	1
ISLPED 2022: An Experience of a Hybrid Conference in the Time of COVID-19	1
Table of Contents	1
Machine Learning for CAD/EDA	1
Fully Microstrip Three-Port Circuit Bandpass NGD Design and Test	1
ICCAD 2025: First Time Outside the United States and a Record-Breaking Edition	1
TechRxiv: Share Your Preprint Research With the World!	1
Understanding Error Propagation in Deep-Learning Neural Networks’ Accelerators and Applications	1
IEEE Connects You to a Universe of Information!	1
Special Issue on Benchmarking Machine Learning Systems and Applications	1
ASP-DAC 2026: Strengthening Asia’s Expanding Role in Design Automation Research	1
Special Issue on 20 Years of IEEE CEDA	1
Fair and Comprehensive Benchmarking of Machine Learning Processing Chips	1
40th IEEE VLSI Test Symposium 2022	1
Silent Data Corruption by 10× Test Escapes Threatens Reliable Computing	1
IEEE Membership	1
Get in the Conversation!	1
Furthering Moore’s Law Integration Benefits in the Chiplet Era	1
Deadlock-Freedom in Computational Neuroscience Simulators	1
Full Key Extraction of SNOW-V Using ML-Assisted Power SCA	1
Table of Contents	1
IEEE Design & Test Publication Information	1
API-Based Hardware Fault Simulation for DNN Accelerators	0
Memory Usage Estimation for Dataflow-Model-Based Software Development Methodology	0
IEEE Design & Test Publication Information	0
Using Approximate Circuits Against Hardware Trojans	0
Get in the Conversation!	0
Toward Attention-Based TinyML: A Heterogeneous Accelerated Architecture and Automated Deployment Flow	0
Approximate Computing in Memristive Processing-In-Array (PIA)	0
Self-Sustainable Wearable and Internet of Things (IoT) Devices for Health Monitoring: Opportunities and Challenges	0
Special Issue on 2021 Top Picks in Hardware and Embedded Security	0
Secure Interposer-Based Heterogeneous Integration	0
Design Challenges of Intrachiplet and Interchiplet Interconnection	0
Our Gated Community	0
Low-Power High-Throughput Architecture for AV1 Arithmetic Decoder	0
Lynn Conway: Two Remembrances	0
A Hardware Accelerator for Language-Guided Reinforcement Learning	0
FALCON: An FPGA Emulation Platform for Domain-Specific SoCs (DSSoCs)	0
LATTE: Library Attack for Evaluating Hardware IP Protections Against Reverse Engineering	0
Linear Algorithmic Checksums for Deep-Neural-Network Error Detection: Fundamentals and Recent Advancements	0
Erratum to “Ethical Design of Computers: From Semiconductors to IoT and Artificial Intelligence”	0
HPC-Based Malware Detectors Actually Work: Transition to Practice After a Decade of Research	0
Recap of the 29th Edition of the Asia and South Pacific Design Automation Conference (ASPDAC 2024)	0
SBCCI 2024	0
Graph-Based Circuit Simulator for Switched Capacitor Circuits	0
Efficient Aspect Verification and Debugging of High-Performance Microprocessor Designs	0
Interview With Yao-Wen Chang	0
ELEMENT: Energy-Efficient Multi-NoP Architecture for IMC-Based 2.5-D Accelerator for DNN Training	0
Table of Contents	0
IEEE Design & Test Publication Information	0
SIT: Stochastic Input Transformation to Defend Against Adversarial Attacks on Deep Neural Networks	0
Addressing the Cross-Temperature Issue in 3-D NAND Flash Memories: Characterization and Mitigation for Solid-State Drives	0
Tree-Based Unidirectional Neural Networks for Low-Power Computer Vision	0
Table of Contents	0
Front Cover	0
Front Cover	0
Postpandemic Conferences: The DATE 2023 Experience	0
IEEE Membership	0
Efficient Privacy-Aware Federated Learning by Elimination of Downstream Redundancy	0
Can Model-Level Fault Tolerance be Enough for DNN Hardware Accelerators? A Study	0
PiN: Processing in Network-on-Chip	0
Testing Embedded Toggle Generation Through On-Chip IR-Drop Measurements	0
On the Implementation of Fixed-Point Exponential Function for Machine Learning and Signal- Processing Accelerators	0
Testability and Dependability of AI Hardware: Survey, Trends, Challenges, and Perspectives	0
Machine Learning for CAD/EDA: The Road Ahead	0
Front Cover	0
A NoC-Based Spatial DNN Inference Accelerator With Memory-Friendly Dataflow	0
Front Cover	0
Indirect Test Pattern Generation for Mixed-Signal Circuits Using Machine Learning	0
Threat Detection in NoC-Based Manycores Using Lightweight Machine-Learning Models	0
Get in the Conversation!	0
ViT-Reg: Regression-Focused Hardware-Aware Fine-Tuning for ViT on TinyML Platforms	0
Testing for Multiple Faults in Deep Neural Networks	0
Affordable and Comprehensive Testing of 3-D Stacked Die Devices	0
Hard-Sign: A Hardware Watermarking Scheme Using Dated Handwritten Signature	0
Table of Contents	0
Front Cover	0
Front Cover	0
Fuzzing for Automated SoC Security Verification: Challenges and Solution	0
TechRxiv: Share Your Preprint Research With the World!	0
IEEE Membership	0
Time-Bomb HLS Trojan for Performance Degradation Payload	0
TechRxiv: Share Your Preprint Research With the World!	0
Workload-Aware Periodic Interconnect BIST	0
Open-Source Multilevel Converter Power IC Design and Test	0
IEEE Foundation	0
IEEE Design & Test Publication Information	0