IEEE Design & Test

Article	Citations
ISLPED 2021: The 25th Anniversary!	57
BHT-NoC: Blaming Hardware Trojans in NoC Routers	52
Top Picks in Hardware and Embedded Security 2022	43
Flexible and Portable Management of Secure Scan Implementations Exploiting P1687.1 Extensions	35
IEEE Foundation	31
On Backside Probing Techniques and Their Emerging Security Threats	30
Special Issue on the 2023 Symposium on Integrated Circuits and Systems Design	28
SPOCK: Reverse Packet Traversal for Deadlock Recovery	21
An Energy-Aware Nanoscale Design of Reversible Atomic Silicon Based on Miller Algorithm	20
IEEE.tv	19
Proceedings of the IEEE	18
Front Cover	17
IEEE Connects You to a Universe of Information!	17
An Open-Source 12-bit 10-kS/s Incremental ADC in 130-nm CMOS	17
Improvement of Functional Safety of the Level-Crossing Barrier Machine by a Noninvasive Angle-Detection Method	16
ISCA: Intelligent Sense-Compute Adaptive Co-Optimization of Multimodal Machine Learning Kernels for Resilient mHealth Services on Wearables	16
Tipping the Balance: Imbalanced Classes in Deep-Learning Side-Channel Analysis	15
On the Impact of Uncertainties in Silicon-Photonic Neural Networks	14
The 2022 International Conference on Computer-Aided Design (ICCAD)	14
Report on the 28th Asia and South Pacific Design Automation Conference	14
IC Phone Home!	14
Statistical Methods for Detecting Recycled Electronics: From ICs to PCBs and Beyond	14
edAttack: Hardware Trojan Attack on On-Chip Packet Compression	13
Soft and Hard Error-Correction Techniques in STT-MRAM	13
Special Issue on Wearable IoT Devices for Reliable Mobile Health Applications	13

FlooNoC: A Multi-Tb/s Wide NoC for Heterogeneous AXI4 Traffic	13
IEEE Design&Test Publication Information	10
IEEE Design & Test Publication Information	10
IEEE.tv	10
Table of Contents	10
Hardware/Software Coexploration for Hyperdimensional Computing on Network-on-Chip Architecture	9
Energy-Efficient and Error-Resilient Cognitive I/O for 3-D-Integrated Manycore Microprocessors	9
Datapath Extension of NPUs to Support Nonconvolutional Layers Efficiently	9
Blank Page	9
The Memory Shuffle	9
Eavesdropping Attack Detection Using Machine Learning in Network-on-Chip Architectures	8
IEEE Design & Test Publication Information	8
Table of Contents	8
Get in the Conversation!	8
Special Issue on the 2021 Workshop on Top Picks in Hardware and Embedded Security	7
Fault-Tolerant Neuromorphic Computing With Memristors Using Functional ATPG for Efficient Recalibration	7
On the Relation Between Reliability and Entropy in Physical Unclonable Functions	7
TTTC News	7
Remembering Arvind	7
Stochastic Computing for Neuromorphic Applications	7
CLEAR Cross-Layer Resilience: A Retrospective	6
CaSA: End-to-End Quantitative Security Analysis of Randomly Mapped Caches	6
IEEE Design & Test Publication Information	6
A Survey on Machine Learning Accelerators and Evolutionary Hardware Platforms	6
Verification Approaches for Learning-Enabled Autonomous Cyber–Physical Systems	6
Special Issue on Approximate Computing: Challenges, Methodologies, Algorithms, and Architectures for Dependable and Secure Systems	6
Power-Quality Configurable Hardware Design for AV1 Directional Intraframe Prediction	6
FPGA-Chain: Enabling Holistic Protection of FPGA Supply Chain With Blockchain Technology	6
Analog-to-Digital Converter Design Exploration for Compute-in-Memory Accelerators	6
IEEE Membership	6
Table of Contents	6
Traversal Packets: Opportunistic Bypass Packets for Deadlock Recovery	5
IEEE Membership	5
Accuracy-Configurable 2-D Gaussian Filter Architecture for Energy-Efficient Image Processing	5
IEEE Design & Test Publication Information	5
Attack of the AI Papers	5
Dynamically Reconfigurable Network Protocol for Shape-Changeable Computer System	5
Embracing Stochasticity to Enable Neuromorphic Computing at the Edge	5
Robust and Secure Systems	5
Front Cover	5
Voltage–Resistance-Adaptive MPPT Circuit for Energy Harvesting	5
Get in the Conversation!	5
Table of Contents	5
Computing-In-Memory Using Ferroelectrics: From Single- to Multi-Input Logic	5
Estimating Code Vulnerability to Timing Errors Via Microarchitecture-Aware Machine Learning	4
A Global Self-Repair Method for TSV Arrays With Adaptive FNS-CAC Codec	4
Recap of the 61st ACM/IEEE Design Automation Conference (DAC61): The “Chips to Systems Conference”	4
Table of Contents	4
Novel Technique for Manufacturing, System-Level, and In-System Testing of Large SoC Using Functional Protocol-Based High-Speed I/O	4
Special Issue on Design and Test of Multidie Packages	4

Circuits to Systems: Co-Designing Efficient AI Hardware	4
Front Cover	4
Design for Test With Unreliable Memories by Restoring the Beauty of Randomness	4
Guest Editors’ Introduction: SBCCI 2020	4
A brief history and future perspectives on sizing and layout synthesis of analog/RF integrated circuits	4
Special Issue on Top Picks in Test and Reliability	3
Long-Wire Leakage: The Threat of Crosstalk	3
Using STLs for Effective In-Field Test of GPUs	3
Testing for Electromigration in Sub-5-nm FinFET Memories	3
IEEE Connects You to a Universe of Information!	3
ISLPED 2023: International Symposium on Low-Power Electronics and Design	3
Functional Verification of a RISC-V Vector Accelerator	3
Table of Contents	3
Table of Contents	3
Strange Loops in Design and Technology: 59th DAC Keynote Speech	3
A BIST Approach to Approximate Co-Testing of Embedded Data Converters	3
Heuristic-Based Algorithms for Low-Complexity AV1 Intraprediction	3
IEEE Membership	3
The 28th IEEE European Test Symposium	3
SeMAP—A Method to Secure the Communication in NoC-Based Many-Cores	3
Table of Contents	3
IEEE Design & Test Publication Information	3
TTTC News	3
Learning Your Lock: Exploiting Structural Vulnerabilities in Logic Locking	3
The Future of Design for Test and Silicon Lifecycle Management	3
IEEE Design & Test Publication Information	3
CAFEEN: A Cooperative Approach for Energy-Efficient NoCs With Multiagent Reinforcement Learning	3
Seamless Thermal Optimization of Parallel Workloads	3
Virtualizing USB Kernel Mode Debug (KMD) Class to Guest OS for Native OS-Like Debug Experience	2
Postquantum Cryptography for Internet of Things	2
Site-to-Site Variation in Analog Multisite Testing: A Survey on Its Detection and Correction	2
VioNet: A Hierarchical Detailed Routing Wire-Short Violation Predictor Based on a Convolutional Neural Network	2
Analysis and Mitigation of DRAM Faults in Sparse-DNN Accelerators	2
IEEE App	2
Real-Time Requirements for ADAS Platforms Featuring Shared Memory Hierarchies	2
Guest Editors’ Introduction: SBCCI 2023	2
Recap of the 29th ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED’24)	2
Ethical Design of Computers: From Semiconductors to IoT and Artificial Intelligence	2
Cloud-Ready Acceleration of Formal Method Techniques for Cyber–Physical Systems	2
EAVREF: An Evolutionary Algorithm Based Tool for Low-Power CMOS Voltage Reference Designs	2
Is There an Answer?	2
SBCCI 2022	2
TTTC News	2
Front Cover	2
Building an Open-Source DNA Assembler Device	2
3D Ferroelectric NAND In-Storage Processing Architecture for Mass Spectrometry	2
A Case for PIM Support in General-Purpose Compilers	2
Shaping Resilient AI Hardware Through DNN Computational Feature Exploitation	2
This Stuff Is Great—Am I Right?	2
Special Issue on the 2023 International Symposium on Networks-on-Chip (NOCS 2023)	2
SAFER: Safety Assurances for Emergent Behavior	2
IEEE Design&Test Is Going Paperless in 2022!	2
Special Issue on NOCS 2022	2
SoCProbe: Compositional Post-Silicon Validation of Heterogeneous NoC-Based SoCs	2
A Coding Efficiency-Aware Hardware Design for VVC Affine Motion Estimation Reconstructor	2
Special Issue on Near-Memory and In-Memory Processing	2
IEEE Design&Test Is Going Paperless in 2022!	2
IEEE Membership	2
Table of Contents	2
Special Issue on Wearable IoT Devices for Reliable Mobile Health Applications	2
GlucoseHD: Predicting Glucose Levels Using Hyperdimensional Computing	2
Silicon Lifecycle Management (SLM): Requirements, Trends, and Opportunities	2
Majority-Logic-Based Self-Checking Adder in Quantum-Dot Cellular Automata	2
Front Cover	2
Crypto-DSEDA: A Domain-Specific EDA Flow for CiM-Based Cryptographic Accelerators	1
Table of Contents	1
Reverse-Engineering CNN Models Using Side-Channel Attacks	1
Full Key Extraction of SNOW-V Using ML-Assisted Power SCA	1
Fully Microstrip Three-Port Circuit Bandpass NGD Design and Test	1
IEEE Design & Test Publication Information	1
25 Years (and a Bit More) of The Last Byte	1
Background Receiver IQ Imbalance Correction for In-Field Testing	1
The 41st IEEE VLSI Test Symposium	1
Guest Editors’ Introduction: Stochastic Computing for Neuromorphic Applications	1
Report on the 2024 Embedded Systems Week (ESWEEK)	1
Machine Learning in Advanced IC Design: A Methodological Survey	1
Training Binarized Neural Networks Using Ternary Multipliers	1
Get in the Conversation!	1
40th IEEE VLSI Test Symposium 2022	1
Special Issue on Benchmarking Machine Learning Systems and Applications	1

Silent Data Corruption by 10× Test Escapes Threatens Reliable Computing	1
Cross-Layer Design of Automotive Systems	1
Spectre Returns! Speculation Attacks Using the Return Stack Buffer	1
Deadlock-Freedom in Computational Neuroscience Simulators	1
Table of Contents	1
The VCR Effect in Active-RC Continuous-Time Sigma-Delta Modulators	1
Fair and Comprehensive Benchmarking of Machine Learning Processing Chips	1
Breaking Silos to Guarantee Control Stability with Communication over Ethernet TSN	1
Special Issue on the First IEEE Top Picks in VLSI Test and Reliability Workshop	1
Report on the 2021 Embedded Systems Week (ESWEEK)	1
Bandpass NGD Time- Domain Experimental Test of Double-Li Microstrip Circuit	1
IEEE Design & Test Publication Information	1
Get in the Conversation!	1
Guest Editors’ Introduction: Special Issue on Autonomous Systems Design	1
Furthering Moore’s Law Integration Benefits in the Chiplet Era	1
Autonomous Systems, Trust, and Guarantees	1
Analytical Model for Performance Evaluation of Token-Passing-Based WiNoCs	1
IEEE Design & Test Publication Information	1
ISLPED 2022: An Experience of a Hybrid Conference in the Time of COVID-19	1
Front Cover	1
IEEE App	1
TTTC News	1
Product Health Insights Using Telemetry	1
An EMG Denoising Method Based on Flexible Wearable Sensors	1
Machine Learning for CAD/EDA	1
Automated Probe-Mark Analysis for Advanced Probe Technology Characterization	1
Front Cover	0
Design Challenges of Intrachiplet and Interchiplet Interconnection	0
IEEE Design & Test Publication Information	0
PiN: Processing in Network-on-Chip	0
LATTE: Library Attack for Evaluating Hardware IP Protections against Reverse Engineering	0
Front Cover	0
A 703.4-GOPs/W Binary SegNet Processor With Computing-Near-Memory Architecture for Road Detection	0
IEEE Membership	0
Interview With Janet Olson	0
Special Issue on 2021 Top Picks in Hardware and Embedded Security	0
IEEE Foundation	0
Table of Contents	0
Threat Detection in NoC-based Manycores using Lightweight Machine Learning Models	0
Table of Contents	0
SIT: Stochastic Input Transformation to Defend Against Adversarial Attacks on Deep Neural Networks	0
IEEE Design & Test Publication Information	0
API-Based Hardware Fault Simulation for DNN Accelerators	0
EM Side Channels in Hardware Security: Attacks and Defenses	0
Migortho: A Design Automation Flow for QCA Circuits	0
Self-Sustainable Wearable and Internet of Things (IoT) Devices for Health Monitoring: Opportunities and Challenges	0
Our Gated Community	0
Remote Power Side- Channel Attacks on FPGAs	0
Testing for Multiple Faults in Deep Neural Networks	0
Machine Learning for CAD/EDA: The Road Ahead	0
Hard-Sign: A Hardware Watermarking Scheme Using Dated Handwritten Signature	0
Fuzzing for Automated SoC Security Verification: Challenges and Solution	0
FALCON: An FPGA Emulation Platform for Domain-Specific SoCs (DSSoCs)	0
Lifelong Exploratory Navigation: An Architecture for Safer Mobile Robots	0
Low-Power High-Throughput Architecture for AV1 Arithmetic Decoder	0
Front Cover	0
Exact Stochastic Computing Multiplication in Memristive Memory	0
STAR: A Mixed Analog Stochastic In-DRAM Convolutional Neural Network Accelerator	0
Cross-Layer Design of Cyber–Physical Systems	0
Recap of the 29th Edition of the Asia and South Pacific Design Automation Conference (ASPDAC 2024)	0
Workload-Aware Periodic Interconnect BIST	0
Report on the Design Automation Conference (DAC 2021)	0
Table of Contents	0
Front Cover	0
Using Approximate Circuits Against Hardware Trojans	0
Graph-Based Circuit Simulator for Switched Capacitor Circuits	0
ELEMENT: Energy-Efficient Multi-NoP Architecture for IMC-Based 2.5-D Accelerator for DNN Training	0
Open-Source Multilevel Converter Power IC Design and Test	0
IEEE Design&Test publication information	0
Postpandemic Conferences: The DATE 2023 Experience	0
A Hardware Accelerator for Language-Guided Reinforcement Learning	0
Dependable STT-MRAM With Emerging Approximation and Speculation Paradigms	0
Secure Interposer-Based Heterogeneous Integration	0
Erratum to “Ethical Design of Computers: From Semiconductors to IoT and Artificial Intelligence”	0
On the Implementation of Fixed-Point Exponential Function for Machine Learning and Signal- Processing Accelerators	0
IEEE Design & Test Publication Information	0
Front Cover	0
Tree-Based Unidirectional Neural Networks for Low-Power Computer Vision	0
TechRxiv: Share Your Preprint Research With the World!	0
Testability and Dependability of AI Hardware: Survey, Trends, Challenges, and Perspectives	0
Linear Algorithmic Checksums for Deep-Neural-Network Error Detection: Fundamentals and Recent Advancements	0
Small Is Good	0
IEEE Women in Engineering	0
IEEE Design & Test Publication Information	0
IEEE Women in Engineering	0
Interview With Yao-Wen Chang	0
In-Stream Correlation-Based Division and Bit-Inserting Square Root in Stochastic Computing	0
Affordable and Comprehensive Testing of 3-D Stacked Die Devices	0
IEEE Design & Test Publication Information	0
Front Cover	0
Indirect Test Pattern Generation for Mixed-Signal Circuits Using Machine Learning	0
Efficient Privacy-Aware Federated Learning by Elimination of Downstream Redundancy	0
Memory Usage Estimation for Dataflow-Model-Based Software Development Methodology	0
Lynn Conway: Two Remembrances	0
Efficient Aspect Verification and Debugging of High-Performance Microprocessor Designs	0