IEEE Journal on Emerging and Selected Topics in Circuits and Systems

Papers
(The median citation count of IEEE Journal on Emerging and Selected Topics in Circuits and Systems is 2. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2022-08-01 to 2026-08-01.)
ArticleCitations
Table of Contents70
IEEE Journal on Emerging and Selected Topics in Circuits and Systems information for authors53
IEEE Circuits and Systems Society Information51
WHYPE: A Scale-Out Architecture With Wireless Over-the-Air Majority for Scalable In-Memory Hyperdimensional Computing47
Time-Based 8TD SRAM CIM Macro With Low PVT Sensitivity for Edge Devices44
System-Technology Co-Optimization Methodology for LLM Accelerators With Advanced Packaging43
Do We Need 10 bits? Assessing HEVC Encoders for Energy-Efficient HDR Video Streaming43
Guest Editorial Unconventional Computing Techniques for Emerging Technology Applications41
Introducing IEEE Collabratec35
A Predictive Approach for Conditional Execution of Memristive Material Implication Stateful Logic Operations35
Generative Refinement for Low Bitrate Image Coding Using Vector Quantized Residual34
Design and Automation for Quantum Computation and Quantum Technologies33
Table of Contents32
Programming Weights to Analog In-Memory Computing Cores by Direct Minimization of the Matrix-Vector Multiplication Error31
AppCiP: Energy-Efficient Approximate Convolution-in-Pixel Scheme for Neural Network Acceleration29
Memristor-Based Light-Weight Transformer Circuit Implementation for Speech Recognizing27
AM5: Bulk Logic-in-Memory Using MRAM NAND Crossbar27
IEEE Journal on Emerging and Selected Topics in Circuits and Systems Publication Information26
IEEE Journal on Emerging and Selected Topics in Circuits and Systems information for authors25
Compact Transverse-Resonance Low-Pass Filter With Wide Stop-Band Rejection Implemented in Gallium Arsenide Technology24
IEEE Circuits and Systems Society Information24
Diffense: Defense Against Backdoor Attacks on Deep Neural Networks With Latent Diffusion24
A Universal Multistable Memristor Feedback Scheme for Designing Multi-Scroll/Wing Chaotic Systems Without Equilibria24
TDC-CiM: Time-to-Digital Converter-Based Resonant Compute-in-Memory for INT8 CNNs With Layer-Optimized SRAM Mapping24
An Optical Tool to Optimize the Output of a Photonic Integrated Chip Architecture23
CDSTTN: A Data Imputation Method for Cyber-Physical Systems by Causal Dense Spatial–Temporal Transformer Network22
IEEE Journal on Emerging and Selected Topics in Circuits and Systems Publication Information22
Delta Sigma Modulator-Based Dividers for Accurate and Low Latency Stochastic Computing Systems22
Guest Editorial: Integrated Devices, Circuits, and Systems for the 6G Era22
Stochastic Synchronization of Semi-Markovian Switching Cyber-Physical Impulsive Complex Networks via Dynamic Event-Triggered SMC21
CBP-QSNN: Spiking Neural Networks Quantized Using Constrained Backpropagation21
Hardware-Aware Model Design and Training of Silicon-based Analog Neural Networks21
Hardware Efficient Successive-Cancellation Polar Decoders Using Approximate Computing20
IEEE Journal on Emerging and Selected Topics in Circuits and Systems Publication Information20
Mott Memristors and Neuronal Ion Channels: A Qualitative Analysis19
A Neuromorphic Image Sensor with In-Sensor Spiking Neural Network Computing18
Domain-Specific Quantum Architecture Optimization18
Intermittent Fault Diagnosis and Prognosis for Steer-by-Wire System Using Composite Degradation Model18
Corrections to “Digital implementation of Radial Basis Function Neural Networks Based on Stochastic Computing” [Mar 23 257-269]17
GenPolar: Generative AI-Aided Complexity Reduction for Polar SCL Decoding16
IEEE Journal on Emerging and Selected Topics in Circuits and Systems Publication Information16
Multi-Tasking Memcapacitive Networks16
A 185-to-240 GHz SiGe Power Amplifier Using Non-Zero Base-Impedances for Power Gain and Output Power Optimizations16
FVIFormer: Flow-Guided Global-Local Aggregation Transformer Network for Video Inpainting16
Testing Scalable Bell Inequalities for Quantum Graph States on IBM Quantum Devices16
F3: An FPGA-Based Transformer Fine-Tuning Accelerator With Flexible Floating Point Format16
Adaptive Two-Range Quantization and Hardware Co-Design for Large Language Model Acceleration15
Real-Time Quality- and Energy-Aware Bitrate Ladder Construction for Live Video Streaming15
Generation Method of Multi-Regional Photovoltaic Output Scenarios-Set Using Conditional Generative Adversarial Networks15
Identification of Influential Nodes in Complex Networks With Degree and Average Neighbor Degree15
IEEE Circuits and Systems Society Information14
Exploring Compute-in-Memory Architecture Granularity for Structured Pruning of Neural Networks14
A Through Silicon Via (TSV) Architecture of the Bumpless Build Cube (BBCube) for Stacked Memory Devices14
Guest Editorial 2.5D/3D Chiplet Circuits and Systems, EDA, Advanced Packaging, and Test—Part I14
TechRxiv: Share Your Preprint Research with the World!13
TetrisG-SDK: Efficient Convolutional Layer Mapping With Adaptive Windows and Grouped Convolutions for Fast In-Memory Computing13
IEEE Journal on Emerging and Selected Topics in Circuits and Systems information for authors13
A Highly-Scalable Deep-Learning Accelerator With a Cost-Effective Chip-to-Chip Adapter and a C2C-Communication-Aware Scheduler13
Guest Editorial Generative Artificial Intelligence Compute: Algorithms, Implementations, and Applications to CAS13
PAWN: Programmed Analog Weights for Non-Linearity Optimization in Memristor-Based Neuromorphic Computing System13
Stealing the Invisible: Unveiling Pre-Trained CNN Models through Adversarial Examples and Timing Side-Channels13
Survey on Visual Signal Coding and Processing With Generative Models: Technologies, Standards, and Optimization12
Guest Editorial Circuits and Systems for Industry X.0 Applications12
p-Harrow: Optical Logic Synthesis for Efficiency Optimization via Partial Harmonic Mean and Integer Partition12
Delay-Constrained GNR Routing With CNT-Via Insertion in Nano-Scale Designs12
Stochastic Computing Design and Implementation of a Sound Source Localization System12
Enhancing Image Quality by Reducing Compression Artifacts Using Dynamic Window Swin Transformer12
IEEE Journal on Emerging and Selected Topics in Circuits and Systems Publication Information11
TechRxiv: Share Your Preprint Research with the World!11
SAFET-HI: Secure Authentication-Based Framework for Encrypted Testing in Heterogeneous Integration11
TechRxiv: Share Your Preprint Research with the World!11
Adaptive Security Control Against False Data Injection Attacks in Cyber-Physical Systems11
Xbar-Partitioning: A Practical Way for Parasitics and Noise Tolerance in Analog IMC Circuits11
Systematical Evasion from Learning-based Microarchitectural Attack Detection Tools11
On Fidelity-Oriented Entanglement Distribution for Quantum Switches11
A Reconfigurable Spatial Architecture for Energy-Efficient Inception Neural Networks10
LightRot: A Light-Weighted Rotation Scheme and Architecture for Accurate Low-Bit Large Language Model Inference10
IEEE Journal on Emerging and Selected Topics in Circuits and Systems10
End-to-End Acceleration of Generative Models With Runtime Regularized KV Cache Management10
Enabling Energy-Efficient In-Memory Computing With Robust Assist-Based Reconfigurable Sense Amplifier in SRAM Array10
Stabilization and Non-Weighted L 2 Gain Analysis of Switched Systems With Distributed Delay Under Asynchronous Event-Triggered Control10
Metamaterial-Enabled Ultrawideband mmWave Antenna-in-Package Using Heterogeneously-Integrated Silicon IPD and HDI-PCB for B5G/ 6G Applications10
Heterogeneous Integration in Co-Packaged Optics10
Investigating Register Cache Behavior: Implications for CUDA and Tensor Core Workloads on GPUs9
Parameter Reduction of Kernel-Based Video Frame Interpolation Methods Using Multiple Encoders9
Monolithically Integrated Transimpedance Accumulators for Analog In-Memory Computing Based on Dual-Gate Metal-Oxide TFTs9
Robust-by-Design Silicon Photonic Mach–Zehnder Interferometers Under Fabrication Nonuniformities9
HALO: Communication-Aware Heterogeneous 2.5-D System for Energy-Efficient LLM Execution at Edge9
Depth-First: A Deterministic and Scalable NoC Routing Protocol for 3.5D Packaged Architectures9
Guest Editorial Energy-Efficient Optical Communications, Optical Integrated Circuits, and Signal Processing9
Design and Analysis of 3D Integrated Folded Ferro-Capacitive Crossbar Array (FC²A) for Brain-Inspired Computing System9
IEEE Journal on Emerging and Selected Topics in Circuits and Systems Publication Information9
BioNN: Bio-Mimetic Neural Networks on Hardware Using Nonlinear Multi-Timescale Mixed-Feedback Control for Neuromodulatory Bursting Rhythms9
Investigation of Oscillatory Neural Networks with Verilog-A Models of VO 2 Relaxation Oscillators and Analog RRAM Coupling Elements9
A Stochastic Computing Sigma-Delta Adder Architecture for Efficient Neural Network Design9
Benchmarking DNN Mapping Methods for the in-Memory Computing Accelerators9
Introducing IEEE Collabratec9
A Novel Hypercube-Based Heuristic for Quantum Boolean Circuit Synthesis9
Tempo-CIM: A RRAM Compute-in-Memory Neuromorphic Accelerator With Area-Efficient LIF Neuron and Split-Train-Merged-Inference Algorithm for Edge AI Applications9
Stuck-at-Fault Immunity Enhancement of Memristor-Based Edge AI Systems8
Low Latency Variational Autoencoder on FPGAs8
All-optical AND Logic Gate With High Extinction Ratio for Neural Network Hardware Implementation8
CTT-Based Scalable Neuromorphic Architecture8
EEG-Based Multi-Frequency Multilayer Network for Exploring the Brain State Evolution Underlying Motor Imagery8
Deep-Learning Based Power System Events Detection Technology Using Spatio-Temporal and Frequency Information8
A 299–315-GHz Dual-Band Radiator Array With Cascaded Transmission Line-Based Feedback Network for Phase Noise Improvement8
Performance Under Limited Service Capacity for Load Balancing EV Charging Network8
Guest Editorial In-Memory Computing (IMC): From Technology to Applications8
Synchronization Stability of the MMC-Connected Wind Farm Under Severe Asymmetrical Faults8
Modeling the Effect of SEUs on the Configuration Memory of SRAM-FPGA based CNN Accelerators8
TechRxiv: Share Your Preprint Research with the World!8
Table of Contents7
Digital Implementation of Radial Basis Function Neural Networks Based on Stochastic Computing7
Variation-Tolerant Circuit Design and Online Learning Framework for Memristor-Based Trace-STDP SNN7
In-Memory-Computing for Machine Cognition at the Edge7
Dynamic-HDC: A Two-Stage Dynamic Inference Framework for Brain-Inspired Hyperdimensional Computing7
Optimizations for a Current-Controlled Memristor- Based Neuromorphic Synapse Design7
A 340-GHz THz Amplifier-Frequency-Multiplier Chain With 360° Phase-Shifting Range and its Phase Characterization7
Table of Contents7
A Lossless, Reconfigurable FP8 Compute-in-Memory Accelerator With Domino Logic-Based In-Memory Multiplication and Sign-Group Aggregation for Transformers6
Table of Contents6
Fixed-Wavelength Two-Dimensional Beam Steering in Silicon Optical Phased Arrays Using Carrier-Injection-Based Tunable Grating Antennas6
Table of Contents6
Learned Image Compression With Efficient Cross-Platform Entropy Coding6
To Spike or Not to Spike: A Digital Hardware Perspective on Deep Learning Acceleration6
A Co-Simulation Methodology for the Design of Integrated Silicon Spin Qubits With Their Control/Readout Cryo-CMOS Electronics6
Enhancing DFT Security in Chiplet-Based Systems With Encryption and Integrity Checking6
Editorial on Circuits and Systems for Green Video Communications6
Scalable In-Memory Clustered Annealer With Temporal Noise of Charge Trap Transistor for Large Scale Travelling Salesman Problems6
IEEE Journal on Emerging and Selected Topics in Circuits and Systems publication information6
Electronic–Photonic Integration of Quasi-Coherent Optical Receivers: Toward Efficient and Scalable Passive Optical Networks6
A Current-Limiting Scheme for Voltage-Controlled Inverter Using Instantaneous Current to Generate Virtual Impedance6
IEEE Journal on Emerging and Selected Topics6
A Fully-Integrated Micro-Display System With Hybrid Voltage Regulator5
IEEE Journal on Emerging and Selected Topics in Circuits and Systems publication information5
Reinforcement Learning (RL)-Based Holistic Routing and Wavelength Assignment in Optical Network-on-Chip (ONoC): Distributed or Centralized?5
Stealthy Backdoor Attack against Federated Learning through Frequency Domain by Backdoor Neuron Constraint and Model Camouflage5
3-D Thermal Model With Lateral Thermal Resistance for Fast Thermal Analysis of Complex Stacked Structures5
Efficient Approximate Posit Multipliers for Deep Learning Computation5
HW/SW Codesign for Approximation-Aware Binary Neural Networks5
IEEE Circuits and Systems Society5
Predicting 360° Video Saliency: A ConvLSTM Encoder-Decoder Network With Spatio-Temporal Consistency5
Game-of-Life Temperature-Aware DVFS Strategy for Tile-Based Chip Many-Core Processors5
IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS): A New Chapter Begins5
Predictive Modeling of MEMS via Generic Meminductors: The Multiport Inductor Approach5
Embedding the Dynamics of Forced Nonlinear Systems in Multistable Memristor Circuits5
Incoming Editorial5
A Coalesced Tensor Reduction Architecture for Scalable All-Bank PIM Execution5
Edge of Chaos Explains Prigogine’s Instability of the Homogeneous5
IEEE Journal on Emerging and Selected Topics in Circuits and Systems4
Aligner-D: Leveraging In-DRAM Computing to Accelerate DNA Short Read Alignment4
Bias-Scalable Near-Memory CMOS Analog Processor for Machine Learning4
GauPIM: Rethinking Gaussian Splatting via Voxel Streaming on PIM beyond Tile-Based Rasterization4
IEEE Journal on Emerging and Selected Topics in Circuits and Systems4
RobustDA: Lightweight Robust Domain Adaptation for Evolving Data at Edge4
Design of Efficient AI Accelerator Building Blocks in Quantum-Dot Cellular Automata (QCA)4
Near Real-Time Spike-Driven Synaptic Plasticity for CTT-Based Neuromorphic Systems4
Spectral Ranking in Complex Networks Using Memristor Crossbars4
An Error-Based Approximation Sensing Circuit for Event-Triggered Low-Power Wearable Sensors4
Auditing and Generating Synthetic Data with Controllable Trust Trade-offs4
SIPHON: Silicon Photonic Computing-Based Chiplet Accelerator for Deep Learning4
A Twin-FeFET MLC CIM with Enhanced Voltage and Process Variation Tolerance for Edge Intelligence MAC and AP4
Fast and Compact Serial IMPLY-Based Approximate Full Adders Applied in Image Processing4
A Data-Driven Framework for Modeling Non-Idealities in Analog In-Memory Computing Hardware4
A Fully Analog Computing-in-Memory Macro With INT8-MAC Operations for Edge-AI Device4
Investigating Packet Transmission From the Perspective of Complex Networks Composed of Chaotic Circuits4
IEEE Journal on Emerging and Selected Topics in Circuits and Systems Publication Information4
Design Space Exploration of Sparsity-Aware Application-Specific Spiking Neural Network Accelerators4
Multicore Spiking Neuromorphic Chip in 180-nm With ReRAM Synapses and Digital Neurons4
AM4: MRAM Crossbar Based CAM/TCAM/ACAM/AP for In-Memory Computing4
Investigating Energy Bounds of Analog Compute-in-Memory with Local Normalization3
Guest Editorial: 2.5-D/3-D Chiplet Circuits and Systems, EDA, Advanced Packaging, and Test—Part II3
MAC-ECC: In-Situ Error Correction and Its Design Methodology for Reliable NVM-Based Compute-in-Memory Inference Engine3
Low-Complexity MIMO DSP for Jointly Time- and Frequency-Interleaved DACs in >100 GHz Single-Wavelength Optical Transceivers3
Millimeter-Wave GaAs Ultra-Wideband Medium Power Amplifier and Broadband High-Power Power Amplifier for 5G/6G Applications3
HyIMC: A 16 TOPS/W Hybrid Analog-Digital In-Memory Computing SoC With Model Compression and Recurrent Optimization for Deep Learning-Based Speech Enhancement3
Table of Contents3
IEEE Journal on Emerging and Selected Topics in Circuits and Systems Publication Information3
Highly Optimized Hardware Morphological Neural Network Through Stochastic Computing and Tropical Pruning3
Communication-Aware and Resource-Efficient NoC-Based Architecture for CNN Acceleration3
On Function-Coupled Watermarks for Deep Neural Networks3
IEEE Circuits and Systems Society Information3
Large Scale EV Charging Allocation in Unbalanced Multi-Microgrid System3
Compressed-Domain Vision Transformer for Image Classification3
Quantum Cryptanalysis of Affine Cipher2
IEEE Journal on Emerging and Selected Topics in Circuits and Systems2
MoF-LoRA: Mixture of Low-Rank Fault-Tolerant Experts for RRAM-Based In-Memory Computing2
GEMMV: An LLM-Based Automated Performance-Aware Framework for GEMM Verilog Generation2
Guest Editorial Dynamical Neuro-AI Learning Systems: Devices, Circuits, Architecture and Algorithms2
A Flexible Template for Edge Generative AI With High-Accuracy Accelerated Softmax and GELU2
SpinDrop: Dropout-Based Bayesian Binary Neural Networks With Spintronic Implementation2
Table of Contents2
DND: Deep Learning-Based Directed Network Disintegrator2
Multi-State Memristors and Their Applications: An Overview2
IEEE Journal on Emerging and Selected Topics in Circuits and Systems Information for Authors2
IEEE Circuits and Systems Society Information2
Recent Progress and Development of Hyperdimensional Computing (HDC) for Edge Intelligence2
Bridge Memristor Super-Resolution Crossbars2
Acceleration Techniques for Automated Design of Approximate Convolutional Neural Networks2
IEEE Journal on Emerging and Selected Topics in Circuits and Systems Publication Information2
Multi-Logic Sense Amplifier (MLSA) Design for In-Memory Computing2
Pixel-Wise Intelligence: Heatmap-Guided Adaptive LBP for In-Sensor Vision Processing2
Guest Editorial Complex Cyber-Multitudinal-Physical Systems: Analysis, Decision-Making, and AI Applications2
Large-Margin Dynamic Memory Refresh for Persistent In-Memory Computing and Learning2
MCA-Based Multi-Channel Fusion Attacks Against Cryptographic Implementations2
OpenPiton4HPC: Optimizing OpenPiton Toward High-Performance Manycores2
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