IEEE Embedded Systems Letters

Papers
(The TQCC of IEEE Embedded Systems Letters is 3. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2020-04-01 to 2024-04-01.)
ArticleCitations
Deep Learning Inference Parallelization on Heterogeneous Processors With TensorRT39
Low-Power Compressor-Based Approximate Multipliers With Error Correcting Module23
A Safe, Secure, and Predictable Software Architecture for Deep Learning in Safety-Critical Systems23
CHISEL: Compression-Aware High-Accuracy Embedded Indoor Localization With Deep Learning21
Configurable Logic Blocks and Memory Blocks for Beyond-CMOS FPGA-Based Embedded Systems20
Challenges and Limitations of IEEE 802.1CB-201717
A General Embedded Underwater Acoustic Communication System Based on Advance STM3217
Energy-Efficient Low-Latency Signed Multiplier for FPGA-Based Hardware Accelerators16
Enabling Resource-Aware Mapping of Spiking Neural Networks via Spatial Decomposition16
Reconfigurable Field Effect Transistors Design Solutions for Delay-Invariant Logic Gates15
High-Performance 1-Bit Full Adder With Excellent Driving Capability for Multistage Structures14
Dynamic Partial Reconfiguration Profitability for Real-Time Systems14
Toward Mobile Malware Detection Through Convolutional Neural Networks12
DeBAM: Decoder-Based Approximate Multiplier for Low Power Applications12
High-Level Synthesis of Number-Theoretic Transform: A Case Study for Future Cryptosystems11
Deep Learning for Eye Blink Detection Implemented at the Edge11
Comp-TCAM: An Adaptable Composite Ternary Content-Addressable Memory on FPGAs11
Combining Thermal Maps With Inception Neural Networks for Hardware Trojan Detection10
Embedded Identification of Surface Based on Multirate Sensor Fusion With Deep Neural Network10
Ring-DVFS: Reliability-Aware Reinforcement Learning-Based DVFS for Real-Time Embedded Systems10
Bactran: A Hardware Batch Normalization Implementation for CNN Training Engine9
Design Space Exploration of FPGA-Based System With Multiple DNN Accelerators9
Novel SOH Estimation of Lithium-Ion Batteries for Real-Time Embedded Applications9
Fast Montgomery Modular Multiplier Using FPGAs8
A Remote Control System for Emergency Ventilators During SARS-CoV-28
Smart Implementation of Industrial Internet of Things using Embedded Mechatronic System8
DAS: Dynamic Adaptive Scheduling for Energy-Efficient Heterogeneous SoCs8
Analytical Performance Modeling of NoCs under Priority Arbitration and Bursty Traffic8
High Efficient GDI-CNTFET-Based Approximate Full Adder for Next Generation of Computer Architectures7
ARTS: A Framework for AI-Rooted IoT System Design Automation7
Improving Memory Utilization in Convolutional Neural Network Accelerators7
Secure Register Allocation for Trusted Code Generation6
An Energy-Efficient Routing Method in WSNs Based on Compressive Sensing: From the Perspective of Social Welfare6
Design of a Low-Cost System for the Measurement of Variables Associated With Air Quality6
Novel Hardware Trojan Attack on Activation Parameters of FPGA-Based DNN Accelerators6
Brain-Inspired Hyperdimensional Computing: How Thermal-Friendly for Edge Computing?6
Enhancing Matrix Multiplication With a Monolithic 3-D-Based Scratchpad Memory6
Fast and High-Accuracy Approximate MAC Unit Design for CNN Computing6
WATERMARCH: IP Protection Through Authenticated Obfuscation in FPGA Bitstreams6
Hardware Deployable Edge-AI Solution for Prescreening of Oral Tongue Lesions Using TinyML on Embedded Devices5
Exploring NEURAghe: A Customizable Template for APSoC-Based CNN Inference at the Edge5
Implications of Various Preemption Configurations in TSN Networks5
Self-Adaptive Memory Approximation: A Formal Control Theory Approach5
Meeting Power Constraints While Mitigating Contention on Clustered Multiprocessor System5
A Fully Configurable SoC-Based IR-UWB Platform for Data Acquisition and Algorithm Testing5
A Novel Mapping of ECG and PPG to Ensure the Safety of Health Monitoring Applications5
An Accurate and Quick ANN-Based System-Level Dynamic Power Estimation Model Using LLVM IR Profiling for FPGA Designs5
A Q-Learning-Based Fault-Tolerant and Congestion-Aware Adaptive Routing Algorithm for Networks-on-Chip5
Robust and Accurate Fine-Grain Power Models for Embedded Systems With No On-Chip PMU5
Fast LDPC GPU Decoder for Cloud RAN5
Needle in a Haystack: Detecting Subtle Malicious Edits to Additive Manufacturing G-Code Files5
High Speed Partial Pattern Classification System Using a CAM-Based LBP Histogram on FPGA5
High-Speed Serial–Parallel Multiplier in Quantum-Dot Cellular Automata4
Design and Implementation of an Embedded Cardiorespiratory Monitoring System for Wheelchair Users4
A Quad-Redundant PLC Architecture for Cyber-Resilient Industrial Control Systems4
Device-Free Human Motion Detection Using Single Link WiFi Channel Measurements for Building Energy Management4
Quant-PIM: An Energy-Efficient Processing-in-Memory Accelerator for Layerwise Quantized Neural Networks4
Toward RISC-V CSR Compliance Testing4
HASTE: Software Security Analysis for Timing Attacks on Clear Hardware Assumption4
C++20 Coroutines on Microcontrollers—What We Learned4
High-Speed Architecture for Successive Cancellation Decoder With Split-g Node Block4
Gbit/s Throughput Under 6.3-W Lossless Hyperspectral Image Compression on Parallel Embedded Devices4
Accelerated Updating Mechanisms for FPGA-Based Ternary Content-Addressable Memory4
Guaranteeing That Multilevel Prioritized DNN Models on an Embedded GPU Have Inference Performance Proportional to Respective Priorities4
SMT-Based Contention-Free Task Mapping and Scheduling on SMART NoC4
Data-Driven Identification of Consumers With Deferrable Loads for Demand Response Programs4
SecPump: A Connected Open-Source Infusion Pump for Security Research Purposes4
A Novel Approach to Design Multiplexer Using Magnetic Quantum-Dot Cellular Automata4
mTREE: A Customized Multicast-Enabled Tree-Based Network on Chip for AI Chips4
Synthesis of Parallel Synchronous Software4
Aging-Aware Parallel Execution4
Gradual Channel Estimation Method for TLC NAND Flash Memory3
FPGA Design of Elliptic Curve Cryptosystem (ECC) for Isomorphic Transformation and EC ElGamal Encryption3
Design and Implementation of an Embedded Edge-Processing Water Quality Monitoring System for Underground Waters3
CASH-RF: A Compiler-Assisted Hierarchical Register File in GPUs3
A New Approximate Sum of Absolute Differences Unit for Bioimages Processing3
Application Phase Behavior-Guided Thermal Management of Embedded Platforms3
A Hardware-Efficient and Reconfigurable UFMC Transmitter Architecture With its FPGA Prototype3
Should We Even Optimize for Execution Energy? Rethinking Mapping for MAGIC Design Style3
Location Monitoring System for Sailboats by GPS Using GSM/GPRS Technology3
Improved Schedulability Test for Non-Preemptive Fixed-Priority Scheduling on Multiprocessors3
Area-Optimized Constant-Time Hardware Implementation for Polynomial Multiplication3
Wearable Device to Monitor Sheep Behavior3
Determination of Fiber Content in 3-D Printed Composite Parts Using Image Analysis3
Trivial Bypassing in GPGPUs3
DB4HLS: A Database of High-Level Synthesis Design Space Explorations3
Diagnostic Accuracy of Smartphone-Connected Electrophysiological Biosensors for Prediction of Blood Glucose Level in a Type-2 Diabetic Patient Using Machine Learning: A Pilot Study3
An Energy Consumption Benchmark for a Low-Power RISC-V Core Aimed at Implantable Medical Devices3
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