IEEE Embedded Systems Letters

Papers
(The TQCC of IEEE Embedded Systems Letters is 4. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2022-08-01 to 2026-08-01.)
ArticleCitations
Fictitious Play Game Theory for Server Deployment Optimization in Edge–Fog Environments36
Constraint-Scheduled Bayesian Optimization for Software-Hardware Co-Optimization on HDnn-PIM33
IEEE Embedded Systems Letters Publication Information31
A New Fast Convergence Speed q -APL Algorithm for Active Noise Control Applied to Airplane Seats27
EnHDC: Ensemble Learning for Brain-Inspired Hyperdimensional Computing26
XOR-TOPK : Efficient Top-K Selection Hardware Engine Based on Bitwise XOR Operation24
Energy-Efficient Approximate Multiplier Design With Lesser Error Rate Using the Probability-Based Approximate 4:2 Compressor22
CAAM: Compressor-Based Adaptive Approximate Multiplier for Neural Network Applications22
SecCAN: An Extended CAN Controller With Embedded Intrusion Detection22
Design of a Hardware-Efficient Approximate 4-2 Compressor for Multiplications in Image Processing21
Virtually Contiguous Memory Allocation in Embedded Systems: A Performance Analysis20
Wearable Device to Monitor Sheep Behavior20
Implementation in FPGA of Alternative Modulation Strategy for Energy Balancing Purposes20
Table of Contents20
IEEE Embedded Systems Letters Publication Information20
GenoPIM: Enhancing Genome Alignment using Digital Processing-in-Memory17
No HDL, No Problem: HLS-Generated Power Wasters for Fault Injection in Cloud FPGAs17
DSCAM: Latency-Guaranteed and High-Capacity Content-Addressable Memory on FPGAs17
Design of Tri-Band Bandpass Filter Using Modified X-Shaped Structure for IoT-Based Wireless Applications15
Look-Up Table Optimization for Kolmogorov-Arnold Networks on Microcontrollers14
EvoLP: Self-Evolving Latency Predictor for Model Compression in Real-Time Edge Systems14
CollectiveHLS: Ultrafast Knowledge-Based HLS Design Optimization14
FPGA-Based RF Signal Generator for Radar Applications13
TENDRA: Targeted Endurance Attack on STT-RAM LLC13
GRU-RVCIM: Efficient Implementation of Gated Recurrent Unit in RISC-V - Compute In Memory co-designed for Edge Applications13
Acceleration of an Optimized Kvazaar All Intra Prediction on Embedded Systems Based on the Directional Texture Complexity13
Vector Accelerator Unit for Caravel12
MetaTinyML: End-to-End Metareasoning Framework for TinyML Platforms12
Weak PUF-Based Variable Latency Obfuscation Technique for ML-Attack Resilient Arbiter PUFs12
On the Retiming for Register Minimization by Means of Breadth Coefficients Matrix11
Development of a Miniaturized Testing System for Resonant Frequency Difference Detection for Delay Line Surface Acoustic Wave Devices11
Toward Precision-Aware Safe Neural-Controlled Cyber–Physical Systems11
Grey Wolf Optimization Algorithm for Embedded Adaptive Filtering Applications11
An Efficient VCD Parser for Dynamic Power Estimation of Digital Integrated Circuits11
Editorial11
Software Synthesis From High-Level Specification for Swarm Robotic Applications11
Global Voltage Scaling Across Multiple Cores for Real-Time Workloads10
An Efficient Iterative Beam Search for Human–Robot Collaborative Assembly Line Balancing10
Analysis of Reconfiguration Delay in Heterogeneous Systems-on-Chip via Traffic Injection10
ANUBIS: Hybrid FPAA-FPGA Architecture for Entropy-Based True Random Number Generation in Secure UAV Communication10
A Reconfigurable Low-Latency Posit MAC Unit with Mixed Precision10
MQTT-Based Adaptive Estimation Over Distributed Network Using Raspberry Pi Pico W10
LION: A Learned Index for On-Device Sensor Data Management9
Value-Aware Real-Time Scheduling for Intelligent Transportation Systems9
On Automating FPGA Design Build Flow Using GitLab CI9
Seeding Algorithm for Bipolar Stochastic Computing for Polynomial Approximations9
Editorial9
IEEE Embedded Systems Letters Publication Information9
A Provably Secure Scheme to Prevent Master Key Recovery by Fault Attack on AES Hardware9
Cometes: Cross-Device Mapping for Energy and Time-Aware Deployment on Edge Infrastructures9
Methodology for CNN Implementation in FPGA-Based Embedded Systems9
Dynamic Segmented Bus for Energy-Efficient Last-Level Cache in Advanced Interconnect-Dominant Nodes9
Efficient Partial Weight Update Techniques for Lightweight On-Device Learning on Tiny Flash-Embedded MCUs9
Using Intermittent Chaotic Clocks to Secure Cryptographic Chips9
Table of Contents9
Hardware Deployable Edge-AI Solution for Prescreening of Oral Tongue Lesions Using TinyML on Embedded Devices8
Physical Design Exploration of a Wire-Friendly Domain-Specific Processor for Angstrom-Era Nodes8
JugglePAC: A Pipelined Accumulation Circuit8
Instruction-Level Support for Deterministic Dataflow in Real-Time Systems8
Flexible Active–Passive and Push–Pull Protocols8
Adversarial Attack Bypass by Stochastic Computing8
An Embedded RISC-V Vector Processor for Energy-Efficient GNSS Signal Processing and Navigation Computation8
ACSAM: Accuracy-configurable Segmentation-based Approximate Multiplier for Error-resilient Edge-AI Applications8
CADEN: Compression-Assisted Adaptive Encoding to Improve Lifetime of Encrypted Nonvolatile Main Memories8
Exception Coverage on Automotive Processors8
A High-Performance Hardware Accelerator for ECC in GF(p) Over Generic Weierstrass Curves8
Hailo-8L-Accelerated Embedded Framework for Bladder Carcinoma Detection Using Distilled YOLO Models7
Secure Protocol for Remote Testing Critical Systems Over Public Networks Using Zero-Knowledge Proofs7
Hardware Trojan Detection Method Against Balanced Controllability Trigger Design7
Embedded System for the Simultaneous Study of SAHS and Cardiac Arrhythmia7
Length-Based Dispatching of Small Language Models On Heterogeneous On-Device Platforms7
Editorial7
TinyMo: Graph-Level Memory Optimizer for Tiny Machine Learning7
FPGA-Optimized Transformer Network Accelerator with Efficient Softmax and Sparsity-Aware Gating7
Optimizing Learned Bloom Filters: How Much Should Be Learned?7
Impulsive Noise Estimator With Minimization Methods (INEMM) on Software7
DATA: Throughput and Deadline-Aware Genetic Approach for Task Scheduling in Fog Networks7
Novel Toolset for Efficient Hardwired Micro-Op Translation in Embedded Microarchitectures7
Beyond BNNs: Design and Acceleration of Sub-Bit Neural Networks Using RISC-V Custom Functional Units7
Toward Dynamism in Distributed Lingua Franca Programs7
Low-Power Hyperbolic CORDIC Design of the Fitzhugh-Nagumo Neuron for Neuromorphic Systems7
Auto Digit Selection for Most Significant Digit First Multiplication7
CSO-TFG: A Configurable Seed-Free On-the-Fly Twiddle Factor Generator for NWC-Based NTT/INTT6
On-Device Personalization for Human Activity Recognition on STM326
IEEE Embedded Systems Letters Publication Information6
Parallel Optimization of NTT for Kyber Key Encapsulation Mechanism Using GPU-Accelerated Plantard Arithmetic6
ARTS: A Framework for AI-Rooted IoT System Design Automation6
Privacy-Preserving Anomaly Detection With Homomorphic Encryption for Industrial Control Systems in Critical Infrastructure6
Corrections to “FDPFS: Leveraging File System Abstraction for FDP SSD Data Placement”6
Time-Sensitive Networking in Low Latency Cyber-Physical Systems6
Methodology for Formal Verification of Hardware Safety Strategies Using SMT6
A Q-Learning-Based Fault-Tolerant and Congestion-Aware Adaptive Routing Algorithm for Networks-on-Chip6
PGME: A LUT-Indexed Visual-Refinement Module for Embedded Maritime Perception6
Stochastic Computing Circuits for Nonlinear Functions Based on Multiplexers6
FedTinyWolf—A Memory Efficient Federated Embedded Learning Mechanism6
Differentiable Slimming for Memory-Efficient Transformers6
A Sample-Based, Multistage Machine Learning Pipeline for Scalable IoT Threat Detection5
Table of Contents5
Hardware–Software Co-Optimization of Long-Latency Stochastic Computing5
Automated Parasite Control System Prototype Through Capsule Dosage Based on Image Processing5
A Parallel Ring Streaming Dataflow-Based Convolution Array Architecture for CNN Accelerator5
Lab-to-Hospital: Development and Validation of an IoT-enabled Phonocardiography Sensing Framework for the Deployment of Mechanical Prosthetic Heart Valve Dysfunction Detection Model5
Functional Validation of the RISC-V Unlimited Vector Extension5
Practical and Efficient PUF-Based Protocol for Authentication and Key Agreement in IoT5
No-Multiplication Deterministic Hyperdimensional Encoding for Resource-Constrained Devices5
PEAK: PUF-Based End-to-End Authentication and Key-Exchange for IoT5
Three-Stage Power Supply System Model for a Wearable IoT Device for COVID-19 Patients5
Wireless Tag Sensor Network for Apnea Detection and Posture Recognition Using LSTM5
Table of Contents5
Table of Contents5
Improved Montgomery Modular Multipliers on FPGAs and ASICs5
High-Flexibility Designs of Quantized Runtime Reconfigurable Multi-Precision Multipliers5
QLlama: An FPGA-Based Microscaling Quantization Accelerator for Energy-Efficient Llama2 Inference5
Reversible Logic-based RO-PUF Architecture with Enhanced Security Against Modeling and EM Side-channel Attacks5
Efficient Embedded System for Small Object Detection: A Case Study on Floating Debris in Environmental Monitoring5
Power Efficient Multiplier Design for Error Resilient Edge Applications4
RDMA-Based Sampling Port of ARINC-6534
Active Noise Control in Infant Incubators Using the FxRI-LMS Algorithm4
Investigation of Security Vulnerabilities in NVM-Based Persistent TinyML Hardware4
Renée: New Life for Old Phones4
Real-Time Tomato Quality Assessment Using Hybrid CNN-SVM Model4
E-NERVE: An Edge-Adaptive, NAF-Empowered, Resource-Efficient Versatile AI Inference Engine4
High-Level Synthesis-Based Forensic Watermarking of Hardware IPs Using IP Vendor’s DNA Signature4
Common Subexpression-Based Compression and Multiplication of Sparse Constant Matrices4
A 340- μ W TinyML Using LUT-Based Reservoir Computing on Low-Cost FPGAs4
Data Communication for Low Resources IoT Devices: RS485 Over Electrical Wires4
EMGAxO: Extending Machine Learning Hardware Generators With Approximate Operators4
Microcontroller-Based Embedded System for Inertial-Class Closed-Loop Interferometric Fiber-Optic Gyroscopes4
A Novel Insight Into the Vulnerability of DDR4 DRAM Cells Across Multiple Hammering Settings4
Research on Cyclic Queuing and Forwarding With Preemption in Time-Sensitive Networking4
ArKANe: Accelerating Kolmogorov–Arnold Networks on Reconfigurable Spatial Architectures4
A Low-Cost Embedded System to Support Broadcasting Emergency Messages Through FM Radio Stations4
CNN Workloads Characterization and Integrated CPU–GPU DVFS Governors on Embedded Systems4
MUSIC-Lite: Efficient MUSIC Using Approximate Computing: An OFDM Radar Case Study4
A Novel Mapping of ECG and PPG to Ensure the Safety of Health Monitoring Applications4
Hardware-in-the-Loop Simulation of an On-Board Energy-Driven Scheduling Algorithm for CubeSats4
Approximate Row-Merging-Based Multipliers for Neural Network Acceleration on FPGAs4
A Gauge Meter Reader Edge Device Based on Computer Vision and Deep Learning4
SENTINEL: Enhancing Trust and Transparency in IoT Networks Through Graph-Based Data Collection and Blockchain4
Navigating the Future: A Kalman Filter-Based Global-Local-Global (GLG) Position Estimation for Autonomous Vehicles in GPS Denied Environments4
Table of Contents4
An Area and Energy Efficient Serial-Multiplier4
Design, Construction, and Measurement of Branchline Coupler4
ViTSen: Bridging Vision Transformers and Edge Computing With Advanced In/Near-Sensor Processing4
BLAST: Blockwise Activation Sparsity for Transformers4
CASH-RF: A Compiler-Assisted Hierarchical Register File in GPUs4
TVI PUF: A Temperature- and Voltage-Independent PUF With High Resistance to Modeling Attacks4
Automatic Fecal Eggs Counting in Ruminants Using Xilinx DPU4
A Multidimensional Hardware Trojan Design Platform to Enhance Hardware Security4
0.65088105201721