IEEE Embedded Systems Letters

Papers
(The median citation count of IEEE Embedded Systems Letters is 1. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2022-08-01 to 2026-08-01.)
ArticleCitations
Fictitious Play Game Theory for Server Deployment Optimization in Edge–Fog Environments36
Constraint-Scheduled Bayesian Optimization for Software-Hardware Co-Optimization on HDnn-PIM33
IEEE Embedded Systems Letters Publication Information31
A New Fast Convergence Speed q -APL Algorithm for Active Noise Control Applied to Airplane Seats27
EnHDC: Ensemble Learning for Brain-Inspired Hyperdimensional Computing26
XOR-TOPK : Efficient Top-K Selection Hardware Engine Based on Bitwise XOR Operation24
CAAM: Compressor-Based Adaptive Approximate Multiplier for Neural Network Applications22
SecCAN: An Extended CAN Controller With Embedded Intrusion Detection22
Energy-Efficient Approximate Multiplier Design With Lesser Error Rate Using the Probability-Based Approximate 4:2 Compressor22
Design of a Hardware-Efficient Approximate 4-2 Compressor for Multiplications in Image Processing21
Virtually Contiguous Memory Allocation in Embedded Systems: A Performance Analysis20
Wearable Device to Monitor Sheep Behavior20
Implementation in FPGA of Alternative Modulation Strategy for Energy Balancing Purposes20
Table of Contents20
IEEE Embedded Systems Letters Publication Information20
GenoPIM: Enhancing Genome Alignment using Digital Processing-in-Memory17
No HDL, No Problem: HLS-Generated Power Wasters for Fault Injection in Cloud FPGAs17
DSCAM: Latency-Guaranteed and High-Capacity Content-Addressable Memory on FPGAs17
Design of Tri-Band Bandpass Filter Using Modified X-Shaped Structure for IoT-Based Wireless Applications15
Look-Up Table Optimization for Kolmogorov-Arnold Networks on Microcontrollers14
EvoLP: Self-Evolving Latency Predictor for Model Compression in Real-Time Edge Systems14
CollectiveHLS: Ultrafast Knowledge-Based HLS Design Optimization14
FPGA-Based RF Signal Generator for Radar Applications13
TENDRA: Targeted Endurance Attack on STT-RAM LLC13
GRU-RVCIM: Efficient Implementation of Gated Recurrent Unit in RISC-V - Compute In Memory co-designed for Edge Applications13
Acceleration of an Optimized Kvazaar All Intra Prediction on Embedded Systems Based on the Directional Texture Complexity13
Vector Accelerator Unit for Caravel12
MetaTinyML: End-to-End Metareasoning Framework for TinyML Platforms12
Weak PUF-Based Variable Latency Obfuscation Technique for ML-Attack Resilient Arbiter PUFs12
On the Retiming for Register Minimization by Means of Breadth Coefficients Matrix11
Development of a Miniaturized Testing System for Resonant Frequency Difference Detection for Delay Line Surface Acoustic Wave Devices11
Toward Precision-Aware Safe Neural-Controlled Cyber–Physical Systems11
Grey Wolf Optimization Algorithm for Embedded Adaptive Filtering Applications11
An Efficient VCD Parser for Dynamic Power Estimation of Digital Integrated Circuits11
Editorial11
Software Synthesis From High-Level Specification for Swarm Robotic Applications11
Analysis of Reconfiguration Delay in Heterogeneous Systems-on-Chip via Traffic Injection10
ANUBIS: Hybrid FPAA-FPGA Architecture for Entropy-Based True Random Number Generation in Secure UAV Communication10
A Reconfigurable Low-Latency Posit MAC Unit with Mixed Precision10
MQTT-Based Adaptive Estimation Over Distributed Network Using Raspberry Pi Pico W10
Global Voltage Scaling Across Multiple Cores for Real-Time Workloads10
An Efficient Iterative Beam Search for Human–Robot Collaborative Assembly Line Balancing10
LION: A Learned Index for On-Device Sensor Data Management9
Value-Aware Real-Time Scheduling for Intelligent Transportation Systems9
On Automating FPGA Design Build Flow Using GitLab CI9
Seeding Algorithm for Bipolar Stochastic Computing for Polynomial Approximations9
Editorial9
IEEE Embedded Systems Letters Publication Information9
A Provably Secure Scheme to Prevent Master Key Recovery by Fault Attack on AES Hardware9
Cometes: Cross-Device Mapping for Energy and Time-Aware Deployment on Edge Infrastructures9
Methodology for CNN Implementation in FPGA-Based Embedded Systems9
Dynamic Segmented Bus for Energy-Efficient Last-Level Cache in Advanced Interconnect-Dominant Nodes9
Efficient Partial Weight Update Techniques for Lightweight On-Device Learning on Tiny Flash-Embedded MCUs9
Using Intermittent Chaotic Clocks to Secure Cryptographic Chips9
Table of Contents9
Hardware Deployable Edge-AI Solution for Prescreening of Oral Tongue Lesions Using TinyML on Embedded Devices8
Physical Design Exploration of a Wire-Friendly Domain-Specific Processor for Angstrom-Era Nodes8
JugglePAC: A Pipelined Accumulation Circuit8
Instruction-Level Support for Deterministic Dataflow in Real-Time Systems8
Flexible Active–Passive and Push–Pull Protocols8
Adversarial Attack Bypass by Stochastic Computing8
An Embedded RISC-V Vector Processor for Energy-Efficient GNSS Signal Processing and Navigation Computation8
ACSAM: Accuracy-configurable Segmentation-based Approximate Multiplier for Error-resilient Edge-AI Applications8
CADEN: Compression-Assisted Adaptive Encoding to Improve Lifetime of Encrypted Nonvolatile Main Memories8
Exception Coverage on Automotive Processors8
A High-Performance Hardware Accelerator for ECC in GF(p) Over Generic Weierstrass Curves8
Hardware Trojan Detection Method Against Balanced Controllability Trigger Design7
Embedded System for the Simultaneous Study of SAHS and Cardiac Arrhythmia7
Length-Based Dispatching of Small Language Models On Heterogeneous On-Device Platforms7
Editorial7
TinyMo: Graph-Level Memory Optimizer for Tiny Machine Learning7
FPGA-Optimized Transformer Network Accelerator with Efficient Softmax and Sparsity-Aware Gating7
Optimizing Learned Bloom Filters: How Much Should Be Learned?7
Impulsive Noise Estimator With Minimization Methods (INEMM) on Software7
DATA: Throughput and Deadline-Aware Genetic Approach for Task Scheduling in Fog Networks7
Novel Toolset for Efficient Hardwired Micro-Op Translation in Embedded Microarchitectures7
Beyond BNNs: Design and Acceleration of Sub-Bit Neural Networks Using RISC-V Custom Functional Units7
Toward Dynamism in Distributed Lingua Franca Programs7
Low-Power Hyperbolic CORDIC Design of the Fitzhugh-Nagumo Neuron for Neuromorphic Systems7
Auto Digit Selection for Most Significant Digit First Multiplication7
Hailo-8L-Accelerated Embedded Framework for Bladder Carcinoma Detection Using Distilled YOLO Models7
Secure Protocol for Remote Testing Critical Systems Over Public Networks Using Zero-Knowledge Proofs7
CSO-TFG: A Configurable Seed-Free On-the-Fly Twiddle Factor Generator for NWC-Based NTT/INTT6
On-Device Personalization for Human Activity Recognition on STM326
IEEE Embedded Systems Letters Publication Information6
Parallel Optimization of NTT for Kyber Key Encapsulation Mechanism Using GPU-Accelerated Plantard Arithmetic6
ARTS: A Framework for AI-Rooted IoT System Design Automation6
Privacy-Preserving Anomaly Detection With Homomorphic Encryption for Industrial Control Systems in Critical Infrastructure6
Corrections to “FDPFS: Leveraging File System Abstraction for FDP SSD Data Placement”6
Time-Sensitive Networking in Low Latency Cyber-Physical Systems6
Methodology for Formal Verification of Hardware Safety Strategies Using SMT6
A Q-Learning-Based Fault-Tolerant and Congestion-Aware Adaptive Routing Algorithm for Networks-on-Chip6
PGME: A LUT-Indexed Visual-Refinement Module for Embedded Maritime Perception6
FedTinyWolf—A Memory Efficient Federated Embedded Learning Mechanism6
Stochastic Computing Circuits for Nonlinear Functions Based on Multiplexers6
Differentiable Slimming for Memory-Efficient Transformers6
Reversible Logic-based RO-PUF Architecture with Enhanced Security Against Modeling and EM Side-channel Attacks5
Efficient Embedded System for Small Object Detection: A Case Study on Floating Debris in Environmental Monitoring5
A Sample-Based, Multistage Machine Learning Pipeline for Scalable IoT Threat Detection5
Table of Contents5
Hardware–Software Co-Optimization of Long-Latency Stochastic Computing5
Automated Parasite Control System Prototype Through Capsule Dosage Based on Image Processing5
A Parallel Ring Streaming Dataflow-Based Convolution Array Architecture for CNN Accelerator5
Lab-to-Hospital: Development and Validation of an IoT-enabled Phonocardiography Sensing Framework for the Deployment of Mechanical Prosthetic Heart Valve Dysfunction Detection Model5
Functional Validation of the RISC-V Unlimited Vector Extension5
Practical and Efficient PUF-Based Protocol for Authentication and Key Agreement in IoT5
No-Multiplication Deterministic Hyperdimensional Encoding for Resource-Constrained Devices5
PEAK: PUF-Based End-to-End Authentication and Key-Exchange for IoT5
Three-Stage Power Supply System Model for a Wearable IoT Device for COVID-19 Patients5
Wireless Tag Sensor Network for Apnea Detection and Posture Recognition Using LSTM5
Table of Contents5
Table of Contents5
Improved Montgomery Modular Multipliers on FPGAs and ASICs5
High-Flexibility Designs of Quantized Runtime Reconfigurable Multi-Precision Multipliers5
QLlama: An FPGA-Based Microscaling Quantization Accelerator for Energy-Efficient Llama2 Inference5
Automatic Fecal Eggs Counting in Ruminants Using Xilinx DPU4
A Multidimensional Hardware Trojan Design Platform to Enhance Hardware Security4
Power Efficient Multiplier Design for Error Resilient Edge Applications4
RDMA-Based Sampling Port of ARINC-6534
Active Noise Control in Infant Incubators Using the FxRI-LMS Algorithm4
Investigation of Security Vulnerabilities in NVM-Based Persistent TinyML Hardware4
Real-Time Tomato Quality Assessment Using Hybrid CNN-SVM Model4
Renée: New Life for Old Phones4
E-NERVE: An Edge-Adaptive, NAF-Empowered, Resource-Efficient Versatile AI Inference Engine4
High-Level Synthesis-Based Forensic Watermarking of Hardware IPs Using IP Vendor’s DNA Signature4
Common Subexpression-Based Compression and Multiplication of Sparse Constant Matrices4
A 340- μ W TinyML Using LUT-Based Reservoir Computing on Low-Cost FPGAs4
Data Communication for Low Resources IoT Devices: RS485 Over Electrical Wires4
EMGAxO: Extending Machine Learning Hardware Generators With Approximate Operators4
Microcontroller-Based Embedded System for Inertial-Class Closed-Loop Interferometric Fiber-Optic Gyroscopes4
A Novel Insight Into the Vulnerability of DDR4 DRAM Cells Across Multiple Hammering Settings4
Research on Cyclic Queuing and Forwarding With Preemption in Time-Sensitive Networking4
ArKANe: Accelerating Kolmogorov–Arnold Networks on Reconfigurable Spatial Architectures4
CNN Workloads Characterization and Integrated CPU–GPU DVFS Governors on Embedded Systems4
A Low-Cost Embedded System to Support Broadcasting Emergency Messages Through FM Radio Stations4
MUSIC-Lite: Efficient MUSIC Using Approximate Computing: An OFDM Radar Case Study4
A Novel Mapping of ECG and PPG to Ensure the Safety of Health Monitoring Applications4
Hardware-in-the-Loop Simulation of an On-Board Energy-Driven Scheduling Algorithm for CubeSats4
Approximate Row-Merging-Based Multipliers for Neural Network Acceleration on FPGAs4
A Gauge Meter Reader Edge Device Based on Computer Vision and Deep Learning4
SENTINEL: Enhancing Trust and Transparency in IoT Networks Through Graph-Based Data Collection and Blockchain4
Navigating the Future: A Kalman Filter-Based Global-Local-Global (GLG) Position Estimation for Autonomous Vehicles in GPS Denied Environments4
Table of Contents4
An Area and Energy Efficient Serial-Multiplier4
Design, Construction, and Measurement of Branchline Coupler4
ViTSen: Bridging Vision Transformers and Edge Computing With Advanced In/Near-Sensor Processing4
BLAST: Blockwise Activation Sparsity for Transformers4
CASH-RF: A Compiler-Assisted Hierarchical Register File in GPUs4
TVI PUF: A Temperature- and Voltage-Independent PUF With High Resistance to Modeling Attacks4
Effects of Runtime Reconfiguration on PUFs Implemented as FPGA-Based Accelerators3
A Quantitative Security Ranking Method of PUF Based on the Rademacher Complexity of PUFs3
Detecting Vulnerability in Hardware Description Languages: Opcode Language Processing3
IEEE Embedded Systems Letters Publication Information3
HLS Trojan Detection Using Machine Learning Technique3
US-BIP: A Unified and Saturation-Aware Processor for Efficient Binary Neural Network Inference3
Enhanced Prefetching via Dynamic Multistep SARSA-Based Reinforcement Learning3
Co-Designing Perception-Based Autonomous Systems on CPU-GPU Platforms3
Fast and High-Accuracy Approximate MAC Unit Design for CNN Computing3
LabOSat-02: Hardware and Firmware Development of an On-Board Computer for Small Satellites3
Boosting AES Intrinsic Resilience Using Split SubBytes Round Function Against Power Attacks3
Low Consumption Monitoring and Estimation of the State of Charge System for a Hybrid Electric Vehicle3
Optimizing Gaze Estimation With a DLA-Based Calibration Module on NVIDIA Jetson Platforms3
TAFT: Thermal-Aware Hybrid Fault-Tolerant Technique for Multicore Embedded Systems3
Deterministic Modeling and Simulation of Fault-Tolerant Real-Time Software3
AI-based IP-Core for Submarine Middleton Noise Estimation3
T-HAC: Time-Sensitive HLS Trojan Attack for Affecting Controller Timing Signal of Hardware IP Designs3
Compatibility Analysis and Smooth Transition of Heterogeneous Controllers in Longitudinal Merging Platoons3
High-Speed True Random Number Generator With Multiple Entropy Sources: Ring Oscillator Jitter and Random Telegraph Noise3
Novel Hardware Trojan Attack on Activation Parameters of FPGA-Based DNN Accelerators3
Design of AI-Powered Hybrid Control Algorithm of Robot Vehicle for Enhanced Driving Performance3
Novel Substitution Box Architectural Synthesis for Lightweight Block Ciphers3
Optimizing Internal Communication of Compute-in-Memory-Based AI Accelerator3
Middleton’s Class A Noise Parameter Estimator3
Safety-Driven DNN Sizing for Vehicular CPS3
Compressing Runtime Memory Usage via Activation Remapping for Deploying Deep Neural Networks on MCUs3
FPonAP: Implementation of Floating Point Operations on Associative Processors3
Low-Power Synchronization for Multi-IMU WSNs3
A Robust VMD-PCA Integrated Approach for Accurate Respiration Parameter Estimation From PPG Signals3
Developing Compact Models Using Regression Confidence Forge Knowledge Distillation for IMU-Based Indoor Positioning System3
Reliable Methodology to FPGA Design Verification and Noise Analysis for Digital Lock-In Amplifiers3
LoFFT: Low-Voltage FFT Using Lightweight Fault Detection for Energy Efficiency2
Real-Time Optical Localization and Tracking of UAV Using Ellipse Detection2
An Explainable and Formal Framework for Hypertension Monitoring Using ECG and PPG2
LLVM-Based Efficient Hybrid Cache and TCM Memory Allocation for Low Latency2
Reducing ADC Front-End Costs During Training of On-Sensor Printed Multilayer Perceptrons2
HDVQ-VAE: Binary Codebook for Hyperdimensional Latent Representations2
DECoDeNet: Achieving Impressive Accuracy-Efficiency Trade-off for Semantic Segmentation in Embedded Applications2
Smart Implementation of Industrial Internet of Things Using Embedded Mechatronic System2
Hardware-Aware Bayesian Neural Architecture Search of Quantized CNNs2
Survivability-Driven Orchestration for QoS Preservation Under Single-GPU VRAM Pressure in Edge AI Workloads2
Padel: Priority-Based Real-Time Scheduling for GPUs2
Securing RISC-V SoC With Random Clock Self Complementary Countermeasure2
SoC-Based Implementation of 1-D Convolutional Neural Network for 3-Channel ECG Arrhythmia Classification via HLS4ML2
An Embedded Module of Enhanced Turbo Product Code Algorithm2
Marine Monitoring System Powered by Flexible Solar Panel2
Heterogeneous Accelerator Design for Multi-DNN Workloads via Heuristic Optimization2
Embedded Restricted Boltzmann Machine Approach for Adjustments of Repetitive Physical Activities Using IMU Data2
Utilization Bounds for Non-Preemptive Rate-Monotonic Scheduling2
Container-Based Fail-Operational System Architecture for Software-Defined Vehicles2
ML-Guided Branch Predictor Optimization for Embedded RISC-V SoCs2
Embedded Real-Time Multi-Risk Detection: An EdgeML-Powered System for Driver Monitoring2
A New Switching MVC Algorithm for Active Impulsive Noise Control2
Flipping Bits Like a Pro: Precise Rowhammering on Embedded Devices2
IEEE Embedded Systems Letters Publication Information2
Optimal Tasks and Heater Scheduling Applied to the Management of CubeSats Battery Lifespan2
Design of Approximate Floating-Point Arithmetic Units Using Hardware-Efficient Rounding Schemes2
Point Multiplication Accelerator for Arbitrary Montgomery Curves2
Investigation of the Adversarial Robustness of End-to-End Deep Sensor Fusion Models2
Deep-Learning-Based Visual Aid for Low Vision2
FPGA-Based Real-Time Safety Monitoring System for Water Sports with Diffusion-Based Droplet Removal2
Location Monitoring System for Sailboats by GPS Using GSM/GPRS Technology2
A Flexible Dual-Mode and Efficient RISC-V Coprocessor for On-Node FFT Acceleration in Edge Sensing2
Energy-Efficient Temporal Adaptive Threshold Method for High-Frame-Rate Maritime Foreground Detection Using Edge CPUs2
Design and Implementation of Digital Down Converter for WiFi Network2
Design and FPGA Verification of a High-Speed Configurable 3D NAND Flash Controller2
FEARLESS: A Federated Reinforcement Learning Orchestrator for Serverless Edge Swarms2
FSMA: Fine-Grained Interlayer Scheduling and Mapping Co-Exploration Framework for Chiplet-Based DNN Accelerators2
IEEE Embedded Systems Letters Publication Information2
External Timed I/O Semantics Preserving Utilization Optimization for LET-Based Effect Chain2
Table of Contents2
IEEE Embedded Systems Letters Publication Information2
Natural Language-based Hardware Topology Retrieval Method with Cyclic Incremental Mechanism for Embedded System Firmware Requirement Decomposition2
Dadu-SV: Accelerate Stereo Vision Processing on NPU2
Table of Contents2
Zero-Shot NAS for TinyML Semantic Segmentation via Weight Sharing2
HERFA: A Homomorphic Encryption-Based Root-Finding Algorithm2
HLS Watermarking of IP Designs Using Scheduling Driven Key-Based Parallel Switching Framework Integrated With Multimodal Crypto Logic2
LOCoCAT: Low-Overhead Classification of CAN Bus Attack Types2
Embedded System for Quadruped Robot in Mammalian Configuration2
RePi PUF: A Reliable Pipeline System Secured Against Modeling Attacks and Harsh Conditions1
An Endogenous Security Study of Telematics Box in Intelligent Connected Vehicles1
Delay Optimized Leading Zero Counter Design on FPGA Using LUTs and Wide Function Multiplexers1
Controlling a House’s Air-Conditioning Using Nonlinear Model Predictive Control1
A Co-Optimization of Software and Hardware for PCIe-Based Small Packet DMA Transfer1
Genelle et al. Revisited: Masking an AES Round With Only Four Secure ANDs1
Lustre, Fast First, and Fresh1
Key-Recovery Attack on Enhanced PSLL Techniques1
A Two-State Energy-Efficient Reliability-Aware Strategy in Embedded Systems1
Run-Time ROP Attack Detection on Embedded Devices Using Side Channel Power Analysis1
Development of a Motion Controller for the Electric Wheelchair of Quadriplegic Patients Using Head Movements Recognition1
Comparing XML and JSON Characteristics as Formats for Data Serialization Within Ultralow Power Embedded Systems1
WCET-Aware Partitioning and Allocation of Disaggregated Networks for Multicore Systems1
Codesign for Generation of Large Random Sequences on Zynq FPGA1
A Novel Approach to Design Multiplexer Using Magnetic Quantum-Dot Cellular Automata1
Table of Contents1
SpiKernel: A Kernel Size Exploration Methodology for Improving Accuracy of the Embedded Spiking Neural Network Systems1
Revisiting Black-Hat HLS: A Lightweight Countermeasure to HLS-Aided Trojan Attack1
IEEE Embedded Systems Letters Publication Information1
LabOSat-01: A Payload for In-Orbit Device Characterization1
Characterizing CNN Throughput and Energy Under Multithreaded and Multiaccelerator Execution1
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