IEEE Embedded Systems Letters

Papers
(The median citation count of IEEE Embedded Systems Letters is 1. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2022-05-01 to 2026-05-01.)
ArticleCitations
Wearable Device to Monitor Sheep Behavior77
Fictitious Play Game Theory for Server Deployment Optimization in Edge–Fog Environments30
Design of a Hardware-Efficient Approximate 4-2 Compressor for Multiplications in Image Processing29
Constraint-Scheduled Bayesian Optimization for Software-Hardware Co-Optimization on HDnn-PIM27
IEEE Embedded Systems Letters Publication Information26
EnHDC: Ensemble Learning for Brain-Inspired Hyperdimensional Computing25
A New Fast Convergence Speed q -APL Algorithm for Active Noise Control Applied to Airplane Seats25
HASTE: Software Security Analysis for Timing Attacks on Clear Hardware Assumption22
XOR-TOPK : Efficient Top-K Selection Hardware Engine Based on Bitwise XOR Operation21
SecCAN: An Extended CAN Controller With Embedded Intrusion Detection21
Energy-Efficient Approximate Multiplier Design With Lesser Error Rate Using the Probability-Based Approximate 4:2 Compressor20
CAAM: Compressor-Based Adaptive Approximate Multiplier for Neural Network Applications19
Implementation in FPGA of Alternative Modulation Strategy for Energy Balancing Purposes18
IEEE Embedded Systems Letters Publication Information18
IEEE Embedded Systems Letters Publication Information18
Virtually Contiguous Memory Allocation in Embedded Systems: A Performance Analysis17
Table of Contents16
Design of Tri-Band Bandpass Filter Using Modified X-Shaped Structure for IoT-Based Wireless Applications15
No HDL, No Problem: HLS-Generated Power Wasters for Fault Injection in Cloud FPGAs15
DSCAM: Latency-Guaranteed and High-Capacity Content-Addressable Memory on FPGAs15
CollectiveHLS: Ultrafast Knowledge-Based HLS Design Optimization14
EvoLP: Self-Evolving Latency Predictor for Model Compression in Real-Time Edge Systems14
TENDRA: Targeted Endurance Attack on STT-RAM LLC13
Acceleration of an Optimized Kvazaar All Intra Prediction on Embedded Systems Based on the Directional Texture Complexity12
GRU-RVCIM: Efficient Implementation of Gated Recurrent Unit in RISC-V - Compute In Memory co-designed for Edge Applications12
FPGA-Based RF Signal Generator for Radar Applications11
MetaTinyML: End-to-End Metareasoning Framework for TinyML Platforms11
Weak PUF-Based Variable Latency Obfuscation Technique for ML-Attack Resilient Arbiter PUFs11
On the Retiming for Register Minimization by Means of Breadth Coefficients Matrix10
Value-Aware Real-Time Scheduling for Intelligent Transportation Systems10
Editorial10
Efficient Partial Weight Update Techniques for Lightweight On-Device Learning on Tiny Flash-Embedded MCUs10
An Efficient VCD Parser for Dynamic Power Estimation of Digital Integrated Circuits10
Vector Accelerator Unit for Caravel10
Toward Precision-Aware Safe Neural-Controlled Cyber–Physical Systems10
ANUBIS: Hybrid FPAA-FPGA Architecture for Entropy-Based True Random Number Generation in Secure UAV Communication9
Software Synthesis From High-Level Specification for Swarm Robotic Applications9
An Efficient Iterative Beam Search for Human–Robot Collaborative Assembly Line Balancing9
Analysis of Reconfiguration Delay in Heterogeneous Systems-on-Chip via Traffic Injection9
A Provably Secure Scheme to Prevent Master Key Recovery by Fault Attack on AES Hardware9
MQTT-Based Adaptive Estimation Over Distributed Network Using Raspberry Pi Pico W9
Development of a Miniaturized Testing System for Resonant Frequency Difference Detection for Delay Line Surface Acoustic Wave Devices8
LION: A Learned Index for On-Device Sensor Data Management8
Cometes: Cross-Device Mapping for Energy and Time-Aware Deployment on Edge Infrastructures8
Global Voltage Scaling Across Multiple Cores for Real-Time Workloads8
Grey Wolf Optimization Algorithm for Embedded Adaptive Filtering Applications8
A Reconfigurable Low-Latency Posit MAC Unit with Mixed Precision8
Seeding Algorithm for Bipolar Stochastic Computing for Polynomial Approximations8
On Automating FPGA Design Build Flow Using GitLab CI8
IEEE Embedded Systems Letters Publication Information8
Editorial8
Dynamic Segmented Bus for Energy-Efficient Last-Level Cache in Advanced Interconnect-Dominant Nodes8
Hardware Deployable Edge-AI Solution for Prescreening of Oral Tongue Lesions Using TinyML on Embedded Devices7
Methodology for CNN Implementation in FPGA-Based Embedded Systems7
Optimizing Learned Bloom Filters: How Much Should Be Learned?7
Physical Design Exploration of a Wire-Friendly Domain-Specific Processor for Angstrom-Era Nodes7
An Embedded RISC-V Vector Processor for Energy-Efficient GNSS Signal Processing and Navigation Computation7
CADEN: Compression-Assisted Adaptive Encoding to Improve Lifetime of Encrypted Nonvolatile Main Memories7
ACSAM: Accuracy-configurable Segmentation-based Approximate Multiplier for Error-resilient Edge-AI Applications7
JugglePAC: A Pipelined Accumulation Circuit7
Exception Coverage on Automotive Processors7
Embedded System for the Simultaneous Study of SAHS and Cardiac Arrhythmia7
Table of Contents7
Using Intermittent Chaotic Clocks to Secure Cryptographic Chips7
Flexible Active–Passive and Push–Pull Protocols7
Instruction-Level Support for Deterministic Dataflow in Real-Time Systems7
A High-Performance Hardware Accelerator for ECC in GF(p) Over Generic Weierstrass Curves7
Novel Toolset for Efficient Hardwired Micro-Op Translation in Embedded Microarchitectures6
FPGA-Optimized Transformer Network Accelerator with Efficient Softmax and Sparsity-Aware Gating6
Impulsive Noise Estimator With Minimization Methods (INEMM) on Software6
DATA: Throughput and Deadline-Aware Genetic Approach for Task Scheduling in Fog Networks6
Hardware Trojan Detection Method Against Balanced Controllability Trigger Design6
ARTS: A Framework for AI-Rooted IoT System Design Automation6
Secure Protocol for Remote Testing Critical Systems Over Public Networks Using Zero-Knowledge Proofs6
Toward Dynamism in Distributed Lingua Franca Programs6
Auto Digit Selection for Most Significant Digit First Multiplication6
CSO-TFG: A Configurable Seed-Free On-the-fly Twiddle Factor Generator for NWC-Based NTT/INTT6
TinyMo: Graph-Level Memory Optimizer for Tiny Machine Learning6
On-Device Personalization for Human Activity Recognition on STM326
Privacy-Preserving Anomaly Detection With Homomorphic Encryption for Industrial Control Systems in Critical Infrastructure6
Adversarial Attack Bypass by Stochastic Computing6
Editorial6
A Q-Learning-Based Fault-Tolerant and Congestion-Aware Adaptive Routing Algorithm for Networks-on-Chip6
Beyond BNNs: Design and Acceleration of Sub-Bit Neural Networks Using RISC-V Custom Functional Units6
Corrections to “FDPFS: Leveraging File System Abstraction for FDP SSD Data Placement”5
No-Multiplication Deterministic Hyperdimensional Encoding for Resource-Constrained Devices5
Hardware–Software Co-Optimization of Long-Latency Stochastic Computing5
FedTinyWolf—A Memory Efficient Federated Embedded Learning Mechanism5
Practical and Efficient PUF-Based Protocol for Authentication and Key Agreement in IoT5
Differentiable Slimming for Memory-Efficient Transformers5
Time-Sensitive Networking in Low Latency Cyber-Physical Systems5
Methodology for Formal Verification of Hardware Safety Strategies Using SMT5
IEEE Embedded Systems Letters Publication Information5
Comp-TCAM: An Adaptable Composite Ternary Content-Addressable Memory on FPGAs5
Table of Contents5
Hailo-8L-Accelerated Embedded Framework for Bladder Carcinoma Detection Using Distilled YOLO Models5
High-Flexibility Designs of Quantized Runtime Reconfigurable Multi-Precision Multipliers5
Parallel Optimization of NTT for Kyber Key Encapsulation Mechanism Using GPU-Accelerated Plantard Arithmetic5
Improved Montgomery Modular Multipliers on FPGAs and ASICs5
Table of Contents5
Hardware-in-the-Loop Simulation of an On-Board Energy-Driven Scheduling Algorithm for CubeSats4
Data Communication for Low Resources IoT Devices: RS485 Over Electrical Wires4
Table of Contents4
Reversible Logic-based RO-PUF Architecture with Enhanced Security Against Modeling and EM Side-channel Attacks4
A Sample-Based, Multistage Machine Learning Pipeline for Scalable IoT Threat Detection4
Wireless Tag Sensor Network for Apnea Detection and Posture Recognition Using LSTM4
High-Level Synthesis-Based Forensic Watermarking of Hardware IPs Using IP Vendor’s DNA Signature4
Design, Construction, and Measurement of Branchline Coupler4
Renée: New Life for Old Phones4
A 340- μ W TinyML Using LUT-Based Reservoir Computing on Low-Cost FPGAs4
ViTSen: Bridging Vision Transformers and Edge Computing With Advanced In/Near-Sensor Processing4
Efficient Embedded System for Small Object Detection: A Case Study on Floating Debris in Environmental Monitoring4
A Gauge Meter Reader Edge Device Based on Computer Vision and Deep Learning4
Automated Parasite Control System Prototype Through Capsule Dosage Based on Image Processing4
Three-Stage Power Supply System Model for a Wearable IoT Device for COVID-19 Patients4
QLlama: An FPGA-Based Microscaling Quantization Accelerator for Energy-Efficient Llama2 Inference4
Common Subexpression-Based Compression and Multiplication of Sparse Constant Matrices4
CASH-RF: A Compiler-Assisted Hierarchical Register File in GPUs4
CNN Workloads Characterization and Integrated CPU–GPU DVFS Governors on Embedded Systems4
Research on Cyclic Queuing and Forwarding With Preemption in Time-Sensitive Networking4
Arc Model and DDG: Deadlock Avoidance and Detection in Torus NoC4
BLAST: Blockwise Activation Sparsity for Transformers4
TVI PUF: A Temperature- and Voltage-Independent PUF With High Resistance to Modeling Attacks4
Automatic Fecal Eggs Counting in Ruminants Using Xilinx DPU4
A parallel ring streaming dataflow based convolution array architecture for CNN accelerator4
Functional Validation of the RISC-V Unlimited Vector Extension4
A Novel Mapping of ECG and PPG to Ensure the Safety of Health Monitoring Applications4
A Quantitative Analysis and Optimization on the Cache Behavior Influenced by Literal Pools4
Investigation of Security Vulnerabilities in NVM-Based Persistent TinyML Hardware4
A Multidimensional Hardware Trojan Design Platform to Enhance Hardware Security4
SENTINEL: Enhancing Trust and Transparency in IoT Networks Through Graph-Based Data Collection and Blockchain4
MUSIC-Lite: Efficient MUSIC Using Approximate Computing: An OFDM Radar Case Study4
Deterministic Modeling and Simulation of Fault-Tolerant Real-Time Software3
Effects of Runtime Reconfiguration on PUFs Implemented as FPGA-Based Accelerators3
Navigating the Future: A Kalman Filter-Based Global-Local-Global (GLG) Position Estimation for Autonomous Vehicles in GPS Denied Environments3
Low-Power Compressor-Based Approximate Multipliers With Error Correcting Module3
Real-Time Tomato Quality Assessment Using Hybrid CNN-SVM Model3
A Low-Cost Embedded System to Support Broadcasting Emergency Messages Through FM Radio Stations3
Reliable Methodology to FPGA Design Verification and Noise Analysis for Digital Lock-In Amplifiers3
Novel Substitution Box Architectural Synthesis for Lightweight Block Ciphers3
HLS Trojan Detection Using Machine Learning Technique3
Co-Designing Perception-Based Autonomous Systems on CPU-GPU Platforms3
High-Speed True Random Number Generator With Multiple Entropy Sources: Ring Oscillator Jitter and Random Telegraph Noise3
Active Noise Control in Infant Incubators Using the FxRI-LMS Algorithm3
RDMA-Based Sampling Port of ARINC-6533
Table of Contents3
An Area and Energy Efficient Serial-Multiplier3
Developing Compact Models Using Regression Confidence Forge Knowledge Distillation for IMU-Based Indoor Positioning System3
Novel Hardware Trojan Attack on Activation Parameters of FPGA-Based DNN Accelerators3
Microcontroller-Based Embedded System for Inertial-Class Closed-Loop Interferometric Fiber-Optic Gyroscopes3
Low Consumption Monitoring and Estimation of the State of Charge System for a Hybrid Electric Vehicle3
FPonAP: Implementation of Floating Point Operations on Associative Processors3
A Robust VMD-PCA Integrated Approach for Accurate Respiration Parameter Estimation From PPG Signals3
Power Efficient Multiplier Design for Error Resilient Edge Applications3
Design of AI-Powered Hybrid Control Algorithm of Robot Vehicle for Enhanced Driving Performance3
A Novel Insight Into the Vulnerability of DDR4 DRAM Cells Across Multiple Hammering Settings3
Approximate Row-Merging-Based Multipliers for Neural Network Acceleration on FPGAs3
ArKANe: Accelerating Kolmogorov–Arnold Networks on Reconfigurable Spatial Architectures3
EMGAxO: Extending Machine Learning Hardware Generators With Approximate Operators3
Boosting AES Intrinsic Resilience Using Split SubBytes Round Function Against Power Attacks3
Optimizing Gaze Estimation With a DLA-Based Calibration Module on NVIDIA Jetson Platforms3
US-BIP: A Unified and Saturation-Aware Processor for Efficient Binary Neural Network Inference3
LabOSat-02: Hardware and Firmware Development of an On-Board Computer for Small Satellites3
Fast and High-Accuracy Approximate MAC Unit Design for CNN Computing3
SoC-Based Implementation of 1-D Convolutional Neural Network for 3-Channel ECG Arrhythmia Classification via HLS4ML2
Reducing ADC Front-End Costs During Training of On-Sensor Printed Multilayer Perceptrons2
Hardware-Aware Bayesian Neural Architecture Search of Quantized CNNs2
Embedded Restricted Boltzmann Machine Approach for Adjustments of Repetitive Physical Activities Using IMU Data2
Real-Time Optical Localization and Tracking of UAV Using Ellipse Detection2
Optimizing Internal Communication of Compute-in-Memory-Based AI Accelerator2
LLVM-Based Efficient Hybrid Cache and TCM Memory Allocation for Low-Latency2
TAFT: Thermal-Aware Hybrid Fault-Tolerant Technique for Multicore Embedded Systems2
Table of Contents2
IEEE Embedded Systems Letters Publication Information2
HERFA: A Homomorphic Encryption-Based Root-Finding Algorithm2
HDVQ-VAE: Binary Codebook for Hyperdimensional Latent Representations2
Low-Power Synchronization for Multi-IMU WSNs2
A New Switching MVC Algorithm for Active Impulsive Noise Control2
Middleton’s Class A Noise Parameter Estimator2
LoFFT: Low-Voltage FFT Using Lightweight Fault Detection for Energy Efficiency2
Compressing Runtime Memory Usage via Activation Remapping for Deploying Deep Neural Networks on MCUs2
Optimal Tasks and Heater Scheduling Applied to the Management of CubeSats Battery Lifespan2
Compatibility Analysis and Smooth Transition of Heterogeneous Controllers in Longitudinal Merging Platoons2
DECoDeNet: Achieving Impressive Accuracy-Efficiency Trade-off for Semantic Segmentation in Embedded Applications2
Embedded Real-Time Multi-Risk Detection: An EdgeML-Powered System for Driver Monitoring2
FEARLESS: A Federated Reinforcement Learning Orchestrator for Serverless Edge Swarms2
Flipping Bits Like a Pro: Precise Rowhammering on Embedded Devices2
Securing RISC-V SoC With Random Clock Self Complementary Countermeasure2
Table of Contents2
Dadu-SV: Accelerate Stereo Vision Processing on NPU2
Point Multiplication Accelerator for Arbitrary Montgomery Curves2
HLS Watermarking of IP Designs Using Scheduling Driven Key-Based Parallel Switching Framework Integrated With Multimodal Crypto Logic2
IEEE Embedded Systems Letters Publication Information2
FSMA: Fine-Grained Interlayer Scheduling and Mapping Co-Exploration Framework for Chiplet-Based DNN Accelerators2
Zero-Shot NAS for TinyML Semantic Segmentation via Weight Sharing2
Utilization Bounds for Non-Preemptive Rate-Monotonic Scheduling2
IEEE Embedded Systems Letters Publication Information2
ML-Guided Branch Predictor Optimization for Embedded RISC-V SoCs2
Enhanced Prefetching via Dynamic Multistep SARSA-Based Reinforcement Learning2
Design and FPGA Verification of a High-Speed Configurable 3D NAND Flash Controller2
A Quantitative Security Ranking Method of PUF Based on the Rademacher Complexity of PUFs2
Heterogeneous Accelerator Design for Multi-DNN Workloads via Heuristic Optimization2
External Timed I/O Semantics Preserving Utilization Optimization for LET-Based Effect Chain2
Design and Implementation of Digital Down Converter for WiFi Network2
Container-Based Fail-Operational System Architecture for Software-Defined Vehicles2
Deep-Learning-Based Visual Aid for Low Vision2
IEEE Embedded Systems Letters Publication Information2
An Embedded Module of Enhanced Turbo Product Code Algorithm2
Detecting Vulnerability in Hardware Description Languages: Opcode Language Processing2
Design of Approximate Floating-Point Arithmetic Units Using Hardware-Efficient Rounding Schemes2
Padel: Priority-Based Real-Time Scheduling for GPUs2
Investigation of the Adversarial Robustness of End-to-End Deep Sensor Fusion Models2
Smart Implementation of Industrial Internet of Things Using Embedded Mechatronic System2
AI-based IP-Core for Submarine Middleton Noise Estimation2
An Explainable and Formal Framework for Hypertension Monitoring Using ECG and PPG2
Safety-Driven DNN Sizing for Vehicular CPS2
Editorial1
Using Static Analysis for Enhancing HLS Security1
Run-Time ROP Attack Detection on Embedded Devices Using Side Channel Power Analysis1
Respiratory Rate Estimation on Embedded System1
A Novel Approach to Design Multiplexer Using Magnetic Quantum-Dot Cellular Automata1
mTREE: A Customized Multicast-Enabled Tree-Based Network on Chip for AI Chips1
Experimental Investigation of Side-Channel Attacks on Neuromorphic Spiking Neural Networks1
LabOSat-01: A Payload for In-Orbit Device Characterization1
IEEE Embedded Systems Letters Publication Information1
Characterizing CNN Throughput and Energy Under Multithreaded and Multiaccelerator Execution1
A Co-Optimization of Software and Hardware for PCIe-Based Small Packet DMA Transfer1
From MLIR to Scheduled CDFG: A Design Flow for Hardware Resource Estimation1
Development of a Motion Controller for the Electric Wheelchair of Quadriplegic Patients Using Head Movements Recognition1
Implementation of a Convolutional Neural Network Into an Embedded Device for Polyps Detection1
SpiKernel: A Kernel Size Exploration Methodology for Improving Accuracy of the Embedded Spiking Neural Network Systems1
Adaptive Kernel Merge and Fusion for Multi-Tenant Inference in Embedded GPUs1
High Efficient GDI-CNTFET-Based Approximate Full Adder for Next Generation of Computer Architectures1
Delay Optimized Leading Zero Counter Design on FPGA Using LUTs and Wide Function Multiplexers1
Codesign for Generation of Large Random Sequences on Zynq FPGA1
WCET-Aware Partitioning and Allocation of Disaggregated Networks for Multicore Systems1
Towards Energy-Accuracy Scalable Multimodal Cognitive Systems1
NvMISC: Toward an FPGA-Based Emulation Platform for RISC-V and Nonvolatile Memories1
Toward Efficient FPGA Accelerator DSE via Hierarchical and RM-Guided Methods1
Revisiting Black-Hat HLS: A Lightweight Countermeasure to HLS-Aided Trojan Attack1
Controlling a House’s Air-Conditioning Using Nonlinear Model Predictive Control1
A Two-State Energy-Efficient Reliability-Aware Strategy in Embedded Systems1
Comparing XML and JSON Characteristics as Formats for Data Serialization Within Ultralow Power Embedded Systems1
FDPFS: Leveraging File System Abstraction for FDP SSD Data Placement1
An Endogenous Security Study of Telematics Box in Intelligent Connected Vehicles1
Table of Contents1
Lustre, Fast First, and Fresh1
Genelle et al. Revisited: Masking an AES Round With Only Four Secure ANDs1
FPGA-Based Real-Time Multi-Class Vehicle Classification Using mmWave Radar1
Editorial1
0.039255142211914