IEEE Embedded Systems Letters

Papers
(The median citation count of IEEE Embedded Systems Letters is 0. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2021-02-01 to 2025-02-01.)
ArticleCitations
Enhancing Matrix Multiplication With a Monolithic 3-D-Based Scratchpad Memory51
IEEE Embedded Systems Letters Publication Information30
Novel SOH Estimation of Lithium-Ion Batteries for Real-Time Embedded Applications25
Navigating Time and Energy Trade-Offs in Reactive Heterogeneous Systems22
Design of a Low-Cost System for the Measurement of Variables Associated With Air Quality21
Convolutional Neural Network-Based Signal Classification in Real Time17
Efficient Nonprofiled Side-Channel Attack Using Multi-Output Classification Neural Network17
A Hybrid Prototyping Framework in a Virtual Platform Centered Design and Verification Flow17
Efficient Transform Algorithms for Parallel Ultra-Low-Power IoT End Nodes17
Table of contents17
Design of Leading Zero Counters on FPGAs16
Energy-Efficient Approximate Multiplier Design With Lesser Error Rate Using the Probability-Based Approximate 4:2 Compressor15
LabOSat-02: Hardware and Firmware Development of an On-Board Computer for Small Satellites13
EnHDC: Ensemble Learning for Brain-Inspired Hyperdimensional Computing13
Enhancing Perceptual Experience of Video Quality in Drone Communications by Using VPN Bonding12
CasCon: Cascaded Thermal and Electrical Current Throttling for Mobile Devices12
GNN-MiCS: Graph Neural-Network-Based Bounding Time in Embedded Mixed-Criticality Systems12
Task Sequencing in Frame-Based CPS12
HASTE: Software Security Analysis for Timing Attacks on Clear Hardware Assumption12
Editorial11
ARTS: A Framework for AI-Rooted IoT System Design Automation11
A Co-Optimization of Software and Hardware for PCIe-Based Small Packet DMA Transfer11
VANet: A Solution for Ventricular Arrhythmias Detection of IEGM on Embedded Devices10
FloripaSat-2: An Open-Source Platform for CubeSats10
Enhanced Multicore Performance Using Novel Thread-Aware Cache Coherence and Prefetch-Control Mechanism10
TinyMo: Graph-Level Memory Optimizer for Tiny Machine Learning9
Low Consumption Monitoring and Estimation of the State of Charge System for a Hybrid Electric Vehicle9
76.5-Gbps Viterbi Decoder for Convolutional Codes on GPU8
Impulsive Noise Estimator With Minimization Methods (INEMM) on Software8
Bactran: A Hardware Batch Normalization Implementation for CNN Training Engine8
Respiratory Rate Estimation on Embedded System7
Mitigating Interactive Performance Degradation From Mobile Device Thermal Throttling7
NvMISC: Toward an FPGA-Based Emulation Platform for RISC-V and Nonvolatile Memories7
On-Device Personalization for Human Activity Recognition on STM326
Controlling a House’s Air-Conditioning Using Nonlinear Model Predictive Control6
Triple-A: Early Operand Collector Allocation for Maximizing GPU Register Bank Utilization6
Hardware Trojan Detection Method Against Balanced Controllability Trigger Design6
Revisiting Black-Hat HLS: A Lightweight Countermeasure to HLS-Aided Trojan Attack6
Development of a Motion Controller for the Electric Wheelchair of Quadriplegic Patients Using Head Movements Recognition6
Wearable Device to Monitor Sheep Behavior6
Using Static Analysis for Enhancing HLS Security6
Low-Power Synchronization for Multi-IMU WSNs5
TinyML-Based Intrusion Detection System for In-Vehicle Network Using Convolutional Neural Network on Embedded Devices5
Aging-Aware Parallel Execution5
FPonAP: Implementation of Floating Point Operations on Associative Processors5
A Multiplier-Free Discrete Cosine Transform Architecture Using Approximate Full Adder and Subtractor5
CAAM: Compressor-Based Adaptive Approximate Multiplier for Neural Network Applications5
DeBAM: Decoder-Based Approximate Multiplier for Low Power Applications5
Novel Substitution Box Architectural Synthesis for Lightweight Block Ciphers5
SCALLER: Standard Cell Assembled and Local Layout Effect-Based Ring Oscillators5
Comparing XML and JSON Characteristics as Formats for Data Serialization Within Ultralow Power Embedded Systems5
ProMiSE: A Programmable Hardware Monitor for Secure Execution in Zero Trust Networks5
A Q-Learning-Based Fault-Tolerant and Congestion-Aware Adaptive Routing Algorithm for Networks-on-Chip5
Configurable Multi-Port Memory Architecture for High-Speed Data Communication5
Novel Toolset for Efficient Hardwired Micro-Op Translation in Embedded Microarchitectures5
Run-Time ROP Attack Detection on Embedded Devices Using Side Channel Power Analysis5
MONO: Enhancing Bit-Flip Resilience With Bit Homogeneity for Neural Networks5
Synthesis of Parallel Synchronous Software4
Implementation in FPGA of Alternative Modulation Strategy for Energy Balancing Purposes4
Table of contents4
Differentiable Slimming for Memory-Efficient Transformers4
IEEE Embedded Systems Letters Publication Information4
SpiKernel: A Kernel Size Exploration Methodology for Improving Accuracy of the Embedded Spiking Neural Network Systems4
Hardware and Firmware Design and Implementation of Twin 8-Bit and 32-Bit Microcontroller Boards for Research and Educational Applications4
IEEE Embedded Systems Letters Publication Information4
Table of contents4
[Blank page]4
Co-Designing Perception-Based Autonomous Systems on CPU-GPU Platforms4
Auto Digit Selection for Most Significant Digit First Multiplication4
Efficient HLS Implementation of Fast Linear Discriminant Analysis Classifier4
SMT-Based Contention-Free Task Mapping and Scheduling on SMART NoC4
IEEE Embedded Systems Letters Publication Information4
Toward RISC-V CSR Compliance Testing4
DATA: Throughput and Deadline-Aware Genetic Approach for Task Scheduling in Fog Networks4
Online Internal Resistance Computation Based Early Sensing of Thermal Runaway for Smart Fault Handling System (FHS) of Li-ion Batteries4
IEEE Embedded Systems Letters Publication Information3
Guaranteeing That Multilevel Prioritized DNN Models on an Embedded GPU Have Inference Performance Proportional to Respective Priorities3
Automatic Generation of Reconfiguration Blueprints for IMA Systems Using Reinforcement Learning3
Switch-Based High Cardinality Node Detection3
LabOSat-01: A Payload for In-Orbit Device Characterization3
mTREE: A Customized Multicast-Enabled Tree-Based Network on Chip for AI Chips3
An Endogenous Security Study of Telematics Box in Intelligent Connected Vehicles3
Experimental Investigation of Side-Channel Attacks on Neuromorphic Spiking Neural Networks3
IEEE Embedded Systems Letters Publication Information3
Hardware-Aware Bayesian Neural Architecture Search of Quantized CNNs3
Comp-TCAM: An Adaptable Composite Ternary Content-Addressable Memory on FPGAs3
Codesign for Generation of Large Random Sequences on Zynq FPGA3
Compilation of Parallel Data Access for Vector Processor in Radio Base Stations3
Combining Thermal Maps With Inception Neural Networks for Hardware Trojan Detection3
Hardware–Software Co-Optimization of Long-Latency Stochastic Computing3
Quant-PIM: An Energy-Efficient Processing-in-Memory Accelerator for Layerwise Quantized Neural Networks3
Predicting Failures in Embedded Systems Using Long Short-Term Inference3
Virtually Contiguous Memory Allocation in Embedded Systems: A Performance Analysis3
IEEE Embedded Systems Letters Publication Information3
DSCAM: Latency-Guaranteed and High-Capacity Content-Addressable Memory on FPGAs3
Detecting Vulnerability in Hardware Description Languages: Opcode Language Processing3
Dadu-SV: Accelerate Stereo Vision Processing on NPU3
Practical and Efficient PUF-Based Protocol for Authentication and Key Agreement in IoT3
A Remote Control System for Emergency Ventilators During SARS-CoV-23
FPGA Implementation of the Proposed DCNN Model for Detection of Tuberculosis and Pneumonia Using CXR Images2
Methodology for Formal Verification of Hardware Safety Strategies Using SMT2
Pythia: An Edge-First Agent for State Prediction in High-Dimensional Environments2
No-Multiplication Deterministic Hyperdimensional Encoding for Resource-Constrained Devices2
FedTinyWolf—A Memory Efficient Federated Embedded Learning Mechanism2
Efficient Leading Zero Count (LZC) Implementations for Xilinx FPGAs2
High-Flexibility Designs of Quantized Runtime Reconfigurable Multi-Precision Multipliers2
Usage-Driven Personalization of Power Management Logic2
Digital Circuit Design for the Square Root Computation by Means of Unfolding Techniques2
Design of Tri-Band Bandpass Filter Using Modified X-Shaped Structure for IoT-Based Wireless Applications2
Corrections to “FDPFS: Leveraging File System Abstraction for FDP SSD Data Placement”2
Characterizing CNN Throughput and Energy Under Multithreaded and Multiaccelerator Execution2
Hardware-Level Secure Coding2
Middleton’s Class A Noise Parameter Estimator2
TAFT: Thermal-Aware Hybrid Fault-Tolerant Technique for Multicore Embedded Systems2
Lustre, Fast First and Fresh2
IEEE Embedded Systems Letters Publication Information2
Evaluating the Effects of Reducing Voltage Margins for Energy-Efficient Operation of MPSoCs2
External Timed I/O Semantics Preserving Utilization Optimization for LET-Based Effect Chain2
Ring-DVFS: Reliability-Aware Reinforcement Learning-Based DVFS for Real-Time Embedded Systems2
A Graph Attention Network Approach to Partitioned Scheduling in Real-Time Systems2
LOTUS: A Scalable Framework to Lock Multimodule Designs With One-Time Self-Destructing Key2
An SoC Design for Future Mobile DNA Detection2
Design of an Embedded System for Integrated Underwater Communication and Detection2
Time-Sensitive Networking in Low Latency Cyber-Physical Systems2
Evolutionary Recurrent Neural Architecture Search2
An Energy Consumption Benchmark for a Low-Power RISC-V Core Aimed at Implantable Medical Devices2
Reduce Refresh Operations on 3-D TLC nand Flash System via Wordline (WL) Interference2
Hechi: A Hybrid Approach for Efficient Memory Reclamation Techniques in Mobile Systems2
IDRA: An In-Storage Data Reorganization Accelerator for Multidimensional Databases2
Speed Record of AES-CTR and AES-ECB Bit-Sliced Implementation on GPUs1
MetaTinyML: End-to-End Metareasoning Framework for TinyML Platforms1
Power Simulation of a CubeSat: Influence of Orbit, Attitude, and Thermal Control1
An Embedded Module of Enhanced Turbo Product Code Algorithm1
Implications of Various Preemption Configurations in TSN Networks1
Toward an Optimal Countermeasure for Cache Side-Channel Attacks1
EvoLP: Self-Evolving Latency Predictor for Model Compression in Real-Time Edge Systems1
TENDRA: Targeted Endurance Attack on STT-RAM LLC1
A Novel Approach to Design Multiplexer Using Magnetic Quantum-Dot Cellular Automata1
Area-Optimized Constant-Time Hardware Implementation for Polynomial Multiplication1
Enabling Resource-Aware Mapping of Spiking Neural Networks via Spatial Decomposition1
Functional Validation of the RISC-V Unlimited Vector Extension1
Table of Contents1
A New Approximate Sum of Absolute Differences Unit for Bioimages Processing1
Heterogeneous Accelerator Design for Multi-DNN Workloads via Heuristic Optimization1
Point Multiplication Accelerator for Arbitrary Montgomery Curves1
M-HLS: Malevolent High-Level Synthesis for Watermarked Hardware IPs1
SoC-Based Implementation of 1-D Convolutional Neural Network for 3-Channel ECG Arrhythmia Classification via HLS4ML1
A Quad-Redundant PLC Architecture for Cyber-Resilient Industrial Control Systems1
Accelerated Updating Mechanisms for FPGA-Based Ternary Content-Addressable Memory1
Dynamic Partial Reconfiguration Profitability for Real-Time Systems1
Towards Energy-Accuracy Scalable Multimodal Cognitive Systems1
Exploring Dynamic Duty Cycling for Energy Efficiency in Coherent DSP ASIC1
Efficient Exact Response Time Analysis for Fixed Priority Scheduling in Lowest Priority First-Based Feasibility Tests1
High Efficient GDI-CNTFET-Based Approximate Full Adder for Next Generation of Computer Architectures1
Gbit/s Throughput Under 6.3-W Lossless Hyperspectral Image Compression on Parallel Embedded Devices1
Automated Parasite Control System Prototype Through Capsule Dosage Based on Image Processing1
Three-Stage Power Supply System Model for a Wearable IoT Device for COVID-19 Patients1
Enhancing HLS Performance Prediction on FPGAs Through Multimodal Representation Learning1
Energy-Efficient Low-Latency Signed Multiplier for FPGA-Based Hardware Accelerators1
FDPFS: Leveraging File System Abstraction for FDP SSD Data Placement1
Adaptive Kernel Merge and Fusion for Multi-Tenant Inference in Embedded GPUs1
An Explainable and Formal Framework for Hypertension Monitoring Using ECG and PPG1
LoRa, Sigfox, and NB-IoT: An Empirical Comparison for IoT LPWAN Technologies in the Agribusiness1
LoFFT: Low-Voltage FFT Using Lightweight Fault Detection for Energy Efficiency1
Acceleration of an Optimized Kvazaar All Intra Prediction on Embedded Systems Based on the Directional Texture Complexity1
Smart Implementation of Industrial Internet of Things Using Embedded Mechatronic System1
Reducing ADC Front-End Costs During Training of On-Sensor Printed Multilayer Perceptrons1
Optimal Tasks and Heater Scheduling Applied to the Management of CubeSats Battery Lifespan1
CollectiveHLS: Ultrafast Knowledge-Based HLS Design Optimization1
A New Switching MVC Algorithm for Active Impulsive Noise Control1
An Efficient Edge–Cloud Partitioning of Random Forests for Distributed Sensor Networks1
Wireless Tag Sensor Network for Apnea Detection and Posture Recognition Using LSTM1
Design Space Exploration of FPGA-Based System With Multiple DNN Accelerators1
HERFA: A Homomorphic Encryption-Based Root-Finding Algorithm1
Lightweight Robotic Grasping Model Based on Template Matching and Depth Image0
Novel Hardware Trojan Attack on Activation Parameters of FPGA-Based DNN Accelerators0
DB4HLS: A Database of High-Level Synthesis Design Space Explorations0
Improving Netlist Transformation-Based Approximate Logic Synthesis Through Resynthesis0
Implementation of a Convolutional Neural Network Into an Embedded Device for Polyps Detection0
Design of Fault-Tolerant Distributed Cyber–Physical Systems for Smart Environments0
Investigation of Security Vulnerabilities in NVM Based Persistent TinyML Hardware0
Crypto-Coding Scheme via Dynamic Interleaver for New Communication Standards0
CNN Workloads Characterization and Integrated CPU–GPU DVFS Governors on Embedded Systems0
New Compact Finite-Field Arithmetic Circuits Over GF(p) Based on Spiking Neural P Systems With Communication on Request Implemented in a Low-Cost FPGA0
Trivial Bypassing in GPGPUs0
SMT-Based Verification of Safety-Critical Embedded Control Software0
A Quantitative Analysis and Optimization on the Cache Behavior Influenced by Literal Pools0
Flexible Active–Passive and Push–Pull Protocols0
Using Intermittent Chaotic Clocks to Secure Cryptographic Chips0
DynHD: Hyperdimensional Computing Approach for Efficient Radar Spectrum Classification0
Auto-OPS: A Framework For Automated Optical Probing Simulation on GDS-II0
Developing Compact Models Using Regression Confidence Forge Knowledge Distillation for IMU‑Based Indoor Positioning System0
SPELL: An End-to-End Tool Flow for LLM-Guided Secure SoC Design for Embedded Systems0
Lightweight Surveillance Image Classification Through Hardware-Software Co-Design0
High-Speed Energy-Efficient Fixed-Point Signed Multipliers for FPGA-Based DSP Applications0
FPGA implementation of an Image Classifier Using Pipelined FFT Architecture0
Table of Contents0
A Novel One-Versus-All Approach for Multi-Class Classification in TinyML Systems0
Reconfigurable Field Effect Transistors Design Solutions for Delay-Invariant Logic Gates0
Optimized Inference Scheme for Conditional Computation in On-Device Object Detection0
Edge-First Resource Management for Video-Based Applications: A Face Detection Use Case0
Design and Implementation of an Embedded Cardiorespiratory Monitoring System for Wheelchair Users0
Hybrid Logic Computing of Binary and Stochastic0
A Multi-Dimensional Hardware Trojan Design Platform to Enhance Hardware Security0
A Low-Cost Embedded System to Support Broadcasting Emergency Messages Through FM Radio Stations0
SuperVAULT: Superparamagnetic Volatile Auxiliary Tamper-Proof Storage0
Machine Learning for Sensor Transducer Conversion Routines0
HTree: Hardware Trojan Attack on Cache Resizing Policies0
LOCoCAT: Low-Overhead Classification of CAN Bus Attack Types0
CHISEL: Compression-Aware High-Accuracy Embedded Indoor Localization With Deep Learning0
Renée: New Life for Old Phones0
Enabling 3-D Object Detection With a Low-Resolution LiDAR0
SANGRIA: Stacked Autoencoder Neural Networks With Gradient Boosting for Indoor Localization0
PttAcc: Pipeline-Based Taylor Expansion Fitting Arctangent Angle Hardware Accelerator Design for Descriptor Duty in ORB-SLAM System0
Fast and High-Accuracy Approximate MAC Unit Design for CNN Computing0
Table of Contents0
Fast LDPC GPU Decoder for Cloud RAN0
Real-Time Tomato Quality Assessment Using Hybrid CNN-SVM Model0
Design, Construction and Measurement of Branchline Coupler0
Implementation of Polyphase Digital Down Converter Using Optimized LMS Algorithm for WCDMA Application0
Design and Implementation of an Embedded Edge-Processing Water Quality Monitoring System for Underground Waters0
An Area and Energy Efficient Serial-Multiplier0
PRIOT: Pruning-Based Integer-Only Transfer Learning for Embedded Systems0
Low-Power Compressor-Based Approximate Multipliers With Error Correcting Module0
Toward Dynamism in Distributed Lingua Franca Programs0
Should We Even Optimize for Execution Energy? Rethinking Mapping for MAGIC Design Style0
Accelerating the Verification of Forward Error Correction Decoders by PCIe FPGA Cards0
High-Speed Serial–Parallel Multiplier in Quantum-Dot Cellular Automata0
Hardware Deployable Edge-AI Solution for Prescreening of Oral Tongue Lesions Using TinyML on Embedded Devices0
Multistage Multirate Filterbank for FPGA Resource Optimization0
Reliable Methodology to FPGA Design Verification and Noise Analysis for Digital Lock-In Amplifiers0
Pipelining of a Mobile SoC and an External NPU for Accelerating CNN Inference0
FPGA-Based Digital Taylor–Fourier Transform0
An AI-Based Ventilation KPI Using Embedded IoT Devices0
Optimizing Learned Bloom Filters: How Much Should Be Learned?0
Analysis of Outdoor Air Quality Using Low-Cost MEMS-Based Electronic Nose and Gas Analyzer0
Monitoring Software Execution Flow Through Power Consumption and Dynamic Time Warping0
Software Implementation of Fast List Decoder for PAC Codes0
Vector-Based Dedicated Processor Architecture for Efficient Tracking in VSLAM Systems0
Real-Time Surface Identification System for Variable Walking Speeds of Biped Robots0
Table of Contents0
DynaFuse: Dynamic Fusion for Resource Efficient Multimodal Machine Learning Inference0
Improved Low Time-Complexity Schedulability Test for Nonpreemptive EDF on a Multiprocessor0
A Scalable Dynamic Segmented Bus Interconnect for Neuromorphic Architectures0
Door Knock: Reverse Engineering the MPSoC Layout Through Timing Attack on NoC0
Energy-Efficient Personalized Federated Continual Learning on Edge0
Adaptive Extended Kalman Filtering for Battery State of Charge Estimation on STM320
Software-Defined Watchdog Timers for Cyber-Physical Systems0
A Robust VMD-PCA Integrated Approach for Accurate Respiration Parameter Estimation from PPG Signals0
Optimized Local Path Planner Implementation for GPU-Accelerated Embedded Systems0
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