ACM Transactions on Reconfigurable Technology and Systems

Papers
(The TQCC of ACM Transactions on Reconfigurable Technology and Systems is 4. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2020-04-01 to 2024-04-01.)
ArticleCitations
VTR 8156
FPGAD efender55
The Future of FPGA Acceleration in Datacenters and the Cloud51
FPGA HLS Today: Successes, Challenges, and Opportunities44
FOS20
A Software/Hardware Co-Design of Crystals-Dilithium Signature Scheme20
FPGA Logic Block Architectures for Efficient Deep Learning Inference19
Programming and Synthesis for Software-defined FPGA Acceleration: Status and Future Prospects17
MEG16
Low-precision Floating-point Arithmetic for High-performance FPGA-based CNN Acceleration15
Mitigating Voltage Attacks in Multi-Tenant FPGAs13
Accelerating FPGA Routing Through Algorithmic Enhancements and Connection-aware Parallelization12
Elastic-DF: Scaling Performance of DNN Inference in FPGA Clouds through Automatic Partitioning10
Enhancing the Scalability of Multi-FPGA Stencil Computations via Highly Optimized HDL Components10
FlexCNN: An End-to-end Framework for Composing CNN Accelerators on FPGA9
An Optimized GIB Routing Architecture with Bent Wires for FPGA9
Reconfigurable Framework for Environmentally Adaptive Resilience in Hybrid Space Systems9
SyncNN: Evaluating and Accelerating Spiking Neural Networks on FPGAs9
Deploying Multi-tenant FPGAs within Linux-based Cloud Infrastructure8
NASCENT2: Generic Near-Storage Sort Accelerator for Data Analytics on SmartSSD8
LW-GCN: A Lightweight FPGA-based Graph Convolutional Network Accelerator8
RWRoute: An Open-source Timing-driven Router for Commercial FPGAs7
Optimizing OpenCL-Based CNN Design on FPGA with Comprehensive Design Space Exploration and Collaborative Performance Modeling7
Voltage Sensor Implementations for Remote Power Attacks on FPGAs7
Cross-VM Covert- and Side-Channel Attacks in Cloud FPGAs7
ThunderGP: Resource-Efficient Graph Processing Framework on FPGAs with HLS6
Accelerating Weather Prediction Using Near-Memory Reconfigurable Fabric6
The Strong Scaling Advantage of FPGAs in HPC for N-body Simulations6
Near-memory Computing on FPGAs with 3D-stacked Memories: Applications, Architectures, and Optimizations6
Tensor Slices: FPGA Building Blocks For The Deep Learning Era6
AIgean : An Open Framework for Deploying Machine Learning on Heterogeneous Clusters6
xDNN: Inference for Deep Convolutional Neural Networks6
BlastFunction: A Full-stack Framework Bringing FPGA Hardware Acceleration to Cloud-native Applications5
AutoScaleDSE: A Scalable Design Space Exploration Engine for High-Level Synthesis5
A Deep Learning Framework to Predict Routability for FPGA Circuit Placement5
Substream-Centric Maximum Matchings on FPGA5
Design of Distributed Reconfigurable Robotics Systems with ReconROS5
UNILOGIC5
CGRA-EAM—Rapid Energy and Area Estimation for Coarse-grained Reconfigurable Architectures4
Model-based Design of Hardware SC Polar Decoders for FPGAs4
Parallel Unary Computing Based on Function Derivatives4
An OpenGL Compliant Hardware Implementation of a Graphic Processing Unit Using Field Programmable Gate Array–System on Chip Technology4
Specializing FGPU for Persistent Deep Learning4
Jitter-based Adaptive True Random Number Generation Circuits for FPGAs in the Cloud4
Stratix 10 NX Architecture4
Partitioning and Scheduling with Module Merging on Dynamic Partial Reconfigurable FPGAs4
Process Variability Analysis in Interconnect, Logic, and Arithmetic Blocks of 16-nm FinFET FPGAs4
Enhancing the Security of FPGA-SoCs via the Usage of ARM TrustZone and a Hybrid-TPM4
High-performance and Configurable SW/HW Co-design of Post-quantum Signature CRYSTALS-Dilithium4
A Survey on FPGA Cybersecurity Design Strategies4
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