IET Computers and Digital Techniques

Papers
(The median citation count of IET Computers and Digital Techniques is 1. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2021-02-01 to 2025-02-01.)
ArticleCitations
SD‐SHO: Security‐dominated finite state machine state assignment technique with a satisfactory level of hardware optimization18
A FPGA Accelerator of Distributed A3C Algorithm with Optimal Resource Deployment13
Fast approximation of the top‐k items in data streams using FPGAs10
Reconstructing a lightweight security protocol in the radio‐frequency identification systems8
ActiveGuard: An active intellectual property protection technique for deep neural networks by leveraging adversarial examples as users' fingerprints8
An Efficient RTL Design for a Wearable Brain–Computer Interface7
Evaluation of the Soft Error Assessment Consistency of a JIT‐based Virtual Platform Simulator5
A four‐stage yield optimization technique for analog integrated circuits using optimal computing budget allocation and evolutionary algorithms5
Reliable SRAM using NAND‐NOR Gate in beyond‐CMOS QCA technology5
A Configurable Accelerator for CNN‐Based Remote Sensing Object Detection on FPGAs4
Accelerating Deep Neural Networks implementation: A survey4
4
Fast and low‐power leading‐one detectors for energy‐efficient logarithmic computing4
Accelerating the SM3 hash algorithm with CPU‐FPGA Co‐Designed architecture3
Robustness of predictive energy harvesting systems: Analysis and adaptive prediction scaling3
Who is wearing me? TinyDL‐based user recognition in constrained personal devices3
Design and analysis of a novel fast adder using logical effort method3
Accelerated and Highly Correlated ASIC Synthesis of AI Hardware Subsystems Using CGP3
3
Sparse convolutional neural network acceleration with lossless input feature map compression for resource‐constrained systems3
A Fast Fully Parallel Ant Colony Optimization Algorithm Based on CUDA for Solving TSP3
3
Homeland security video surveillance system utilising the internet of video things for smart cities3
2
An integrated taxonomy of standard indicators for ranking and selecting supercomputers2
FPGA‐based implementation of floating point processing element for the design of efficient FIR filters2
Adaptive Shrink and Shard Architecture Design for Blockchain Storage Efficiency2
Multi‐objective digital circuit block optimisation based on cell mapping in an industrial electronic design automation flow2
New scan compression approach to reduce the test data volume2
Enhancing the security of memory in cloud infrastructure through in‐phase change memory data randomisation2
An embedded intelligence engine for driver drowsiness detection1
TLP: Towards three‐level loop parallelisation1
Efficient implementation of low cost and secure framework with firmware updates1
RTL development of a parameterizable Reed–Solomon Codec1
Synchronization in graph analysis algorithms on the Partially Ordered Event‐Triggered Systems many‐core architecture1
EmRep: Energy management relying on state‐of‐charge extrema prediction1
Research on mapping recognition of arc welding molten pool characterisation and penetration state based on embedded system1
Guest Editorial: Special issue on battery‐free computing1
1
A novel task scheduling approach for dependent non‐preemptive tasks using fuzzy logic1
E‐Commerce Logistics Software Package Tracking and Route Planning and Optimization System of Embedded Technology Based on the Intelligent Era1
Flexible and high‐throughput structures of Camellia block cipher for security of the Internet of Things1
Enhanced overloaded code division multiple access for network on chip1
ASATM: Automated security assistant of threat models in intelligent transportation systems1
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