OOIR: Observatory of International Research

Papers

(The TQCC of IET Circuits Devices & Systems is 4. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2020-11-01 to 2024-11-01.)

Article	Citations
Design of 10T SRAM cell with improved read performance and expanded write margin	25
A high‐performance full swing 1‐bit hybrid full adder cell	23
A low‐offset low‐power and high‐speed dynamic latch comparator with a preamplifier‐enhanced stage	22
A new coplanar design of a 4‐bit ripple carry adder based on quantum‐dot cellular automata technology	18
An effective nano design of demultiplexer architecture based on coplanar quantum‐dot cellular automata	17
A simple memristive jerk system	16
A fault‐diagnosis and tolerant control technique for five‐level cascaded H‐bridge inverters	15
Developed wireless sensor network to supervise the essential parameters in greenhouses for internet of things applications	15
Split gated silicon nanotube FET for bio‐sensing applications	14
Comparative radio‐frequency and crosstalk analysis of carbon‐based nano‐interconnects	13
Low‐power hybrid memristor‐CMOS spiking neuromorphic STDP learning system	13
Comprehensive review of nonisolated bridgeless power factor converter topologies	12
Tolerant and low power subtractor with 4:2 compressor and a new TG‐PTL‐float full adder cell	11
Field Programmable Gate Array based elliptic curve Menezes‐Qu‐Vanstone key agreement protocol realization using Physical Unclonable Function and true random number generator primitives	10
A 1–5 GHz 22 mW receiver frontend with active‐feedback baseband and voltage‐commutating mixers in 65 nm CMOS	10
Fast signed multiplier using Vedic Nikhilam algorithm	10
Comprehensive survey of ternary full adders: Statistics, corrections, and assessments	10
Performance evaluation of the SM4 cipher based on field‐programmable gate array implementation	9
A high speed processor for elliptic curve cryptography over NIST prime field	9
Efficient FPGA based architecture for high‐order FIR filtering using simultaneous DSP and LUT reduced utilization	9
Analysis of black phosphorus double gate MOSFET using hybrid method for analogue/RF application	9
Systematic cell placement in quantum‐dot cellular automata embedding underlying regular clocking circuit	9
Reduced complexity hard‐ and soft‐input BCH decoding with applications in concatenated codes	8
Temperature dependence of analogue/RF performance, linearity and harmonic distortion for dual‐material gate‐oxide‐stack double‐gate TFET	8
Recent trends towards privacy‐preservation in Internet of Things, its challenges and future directions	8

Design of a 128‐channel transceiver hardware for medical ultrasound imaging systems	7
A novel buffering fault‐tolerance approach for network on chip (NoC)	7
Fast‐locking PLL based on a novel PFD‐CP structure and reconfigurable loop filter	7
Spice modelling of a tri‐state memristor and analysis of its series and parallel characteristics	7
New full‐wave rectifier based on modified voltage differencing transconductance amplifier	6
Dual feedback IRC ring for chaotic waveform generation	6
High gain operational amplifier and a comparator with a‐IGZO TFTs	6
Fully implantable, multi‐channel microstimulator with tracking supply ribbon, multi‐output charge pump and energy recovery	6
Design and realisation of a fractional‐order sinusoidal oscillator	6
Ultrawideband LNA 1960–2019: Review	6
CMOS X‐band pole‐converging triple‐cascode LNA with low‐noise and wideband performance	6
Current‐voltage model of a graphene nanoribbon p‐n junction and Schottky junction diode	6
Interface trap charges associated reliability analysis of Si/Ge heterojunction dopingless TFET	5
FPGACam: A FPGA based efficient camera interfacing architecture for real time video processing	5
Pinched hysteresis loops in non‐linear resonators	5
Audio classification using grasshopper‐ride optimization algorithm‐based support vector machine	5
An 8‐bit digital‐to‐time converter with pre‐skewing and time interpolation	5
A high‐capacity and nonvolatile spintronic associative memory hardware accelerator	5
Practical data connection between MATLAB and microcontrollers using virtual serial port and MicroPython Pyboard: A survey	4
Jerk forms dynamics of a Chua’s family and their new unified circuit implementation	4
Performance survey of classic and Optic network‐on‐chip	4
A transformer‐less DC–DC converter with high voltage conversion ratio adopting inverting voltage lift cell	4
Household induction cooking system based on a grid‐connected photovoltaic system	4
A new soft‐switching high step‐down DC‐DC converter for voltage regular module application	4
MARPUF: physical unclonable function with improved machine learning attack resistance	4
A fully differential switched‐capacitor integrator based programmable resolution hybrid ADC architecture for biomedical applications	4
Memristor‐transistor hybrid ternary content addressable memory using ternary memristive memory cell	4
Optimal sensor placement of bridge structure based on sensitivity‐effective independence method	4
A 1.0 fJ energy/bit single‐ended 1 kb 6T SRAM implemented using 40 nm CMOS process	4
An efficient loop tiling framework for convolutional neural network inference accelerators	4
Hall‐effect sensors based on AlGaN/GaN heterojunctions on Si substrates for a wide temperature range	4
Single event transient mitigation techniques for a cross‐coupled LC oscillator, including a single‐event transient hardened CMOS LC‐VCO circuit	4
Fast OMP algorithm and its FPGA implementation for compressed sensing‐based sparse signal acquisition systems	4
A hybrid attack detection strategy for cybersecurity using moth elephant herding optimisation‐based stacked autoencoder	4
Design, evaluation and application of approximate‐truncated Booth multipliers	4
Active balancing method for series battery pack based on flyback converter	4
Research on three‐phase VSR segmented PI synergetic control strategy based on LCL filter	4
Delayered IC image analysis with template‐based Tanimoto Convolution and Morphological Decision	4
Design considerations of a novel Triple Oxide Trench Deep Gate LDMOS to improve self‐heating effect and breakdown voltage	4