IET Circuits Devices & Systems

Papers
(The median citation count of IET Circuits Devices & Systems is 1. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2020-03-01 to 2024-03-01.)
ArticleCitations
Physical unclonable function: architectures, applications and challenges for dependable security30
Design of ternary logic gates and circuits using GNRFETs26
A low‐offset low‐power and high‐speed dynamic latch comparator with a preamplifier‐enhanced stage20
Design and applications of interval observers for uncertain dynamical systems19
Design of 10T SRAM cell with improved read performance and expanded write margin18
A high‐performance full swing 1‐bit hybrid full adder cell18
New mixed‐mode second‐generation voltage conveyor based first‐order all‐pass filter17
Performance investigation of asymmetric double‐gate doping less tunnel FET with Si/Ge heterojunction17
A new coplanar design of a 4‐bit ripple carry adder based on quantum‐dot cellular automata technology15
An effective nano design of demultiplexer architecture based on coplanar quantum‐dot cellular automata15
A fault‐diagnosis and tolerant control technique for five‐level cascaded H‐bridge inverters15
Systematic circuit design and analysis using generalised g m / I D functions of MOS devices14
Developed wireless sensor network to supervise the essential parameters in greenhouses for internet of things applications13
Memristor‐based stateful logic gates for multi‐functional logic circuit13
A simple memristive jerk system13
Split gated silicon nanotube FET for bio‐sensing applications13
Floating memristor and inverse memristor emulation configurations with electronic/resistance controllability12
Single and double‐gate based AlGaN/GaN MOS‐HEMTs for the design of low‐noise amplifiers: a comparative study11
Dual‐band CPW rectenna for low input power energy harvesting applications10
Low‐power hybrid memristor‐CMOS spiking neuromorphic STDP learning system10
Single DDCC− based simulated floating inductors and their applications10
Tolerant and low power subtractor with 4:2 compressor and a new TG‐PTL‐float full adder cell9
Fabrication and investigation of zinc oxide nanoflowers‐based piezoelectric nanogenerator9
Comprehensive review of nonisolated bridgeless power factor converter topologies9
3D‐IC partitioning method based on genetic algorithm9
Field Programmable Gate Array based elliptic curve Menezes‐Qu‐Vanstone key agreement protocol realization using Physical Unclonable Function and true random number generator primitives8
Fast signed multiplier using Vedic Nikhilam algorithm8
Design of a voltage‐programmed V TH compensating pixel circuit for AMOLED displays using diode‐connected a‐IGZO TFT8
Efficient FPGA based architecture for high‐order FIR filtering using simultaneous DSP and LUT reduced utilization8
Numerical simulation and parametric assessment of GaN buffered trench gate MOSFET for low power applications8
Ultra‐low power low‐complexity 3–7.5 GHz IR‐UWB transmitter with spectrum tunability8
Sizing of the CMOS 6T‐SRAM cell for NBTI ageing mitigation8
Systematic cell placement in quantum‐dot cellular automata embedding underlying regular clocking circuit7
New current‐mode RMS‐to‐DC converters and four‐quadrant multiplier/divider based on VDTA7
Temperature dependence of analogue/RF performance, linearity and harmonic distortion for dual‐material gate‐oxide‐stack double‐gate TFET7
A 1–5 GHz 22 mW receiver frontend with active‐feedback baseband and voltage‐commutating mixers in 65 nm CMOS7
Area–delay and energy efficient multi‐operand binary tree adder7
Implementation of fast ICA using memristor crossbar arrays for blind image source separations7
Reduced complexity hard‐ and soft‐input BCH decoding with applications in concatenated codes7
FPGA and ASIC realisation of EMD algorithm for real‐time signal processing7
Ultrawideband LNA 1960–2019: Review6
MPPT integrated DC–DC boost converter for RF energy harvester6
Relay‐based identification of Wiener model6
Capacitor‐less FVF low drop‐out regulator with active feed‐forward compensation and efficient slew‐rate enhancer circuit6
Temperature sensitivity analysis of SGO metal strip JL TFET6
Adaptive multi‐resolution framework for fast simulation of power electronic circuits6
Modelling for triple gate spin‐FET and design of triple gate spin‐FET‐based binary adder6
High‐speed and area‐efficient scalable N ‐bit digital comparator6
Analysis of black phosphorus double gate MOSFET using hybrid method for analogue/RF application6
Fully implantable, multi‐channel microstimulator with tracking supply ribbon, multi‐output charge pump and energy recovery6
High‐speed energy efficient process, voltage and temperature tolerant hybrid multi‐threshold 4:2 compressor design in CNFET technology6
Analytical modelling of tantalum/titanium oxide‐based multi‐layer selector to eliminate sneak path current in RRAM arrays6
Pinched hysteresis loops in non‐linear resonators5
FPGACam: A FPGA based efficient camera interfacing architecture for real time video processing5
High gain operational amplifier and a comparator with a‐IGZO TFTs5
A high speed processor for elliptic curve cryptography over NIST prime field5
An 8‐bit digital‐to‐time converter with pre‐skewing and time interpolation5
Performance analysis of mixed CNT bundle interconnects at 10 nm technology5
Audio classification using grasshopper‐ride optimization algorithm‐based support vector machine5
Design optimisation of multiplier‐free parallel pipelined FFT on field programmable gate array5
CMOS X‐band pole‐converging triple‐cascode LNA with low‐noise and wideband performance5
Design and realisation of a fractional‐order sinusoidal oscillator5
Spice modelling of a tri‐state memristor and analysis of its series and parallel characteristics5
Fast‐locking PLL based on a novel PFD‐CP structure and reconfigurable loop filter5
Four‐stage CMOS amplifier: frequency compensated using differential block4
Recent trends towards privacy‐preservation in Internet of Things, its challenges and future directions4
A hybrid attack detection strategy for cybersecurity using moth elephant herding optimisation‐based stacked autoencoder4
Dual feedback IRC ring for chaotic waveform generation4
Performance evaluation of the SM4 cipher based on field‐programmable gate array implementation4
Low area overhead DPA countermeasure exploiting tunnel transistor‐based random number generator4
Design of a 128‐channel transceiver hardware for medical ultrasound imaging systems4
Low storage power and high noise margin ternary memory cells in nanoelectronics4
Cryptanalysis of a random number generator based on continuous‐time chaos4
Memristor‐transistor hybrid ternary content addressable memory using ternary memristive memory cell4
Rail‐to‐rail complementary input StrongARM comparator for low‐power applications4
Fast automated on‐chip artefact removal of EEG for seizure detection based on ICA‐R algorithm and wavelet denoising4
A novel buffering fault‐tolerance approach for network on chip (NoC)4
Current‐voltage model of a graphene nanoribbon p‐n junction and Schottky junction diode4
6.25 GHz, 1 mV input resolution auxiliary circuit assisted comparator in 65 nm CMOS process4
A fully differential switched‐capacitor integrator based programmable resolution hybrid ADC architecture for biomedical applications4
New full‐wave rectifier based on modified voltage differencing transconductance amplifier4
New method of finding exact frequency response for feedback amplifiers4
Interface trap charges associated reliability analysis of Si/Ge heterojunction dopingless TFET4
Compact wide stopband microstrip diplexer with flat channels for WiMAX and wireless applications4
Delayered IC image analysis with template‐based Tanimoto Convolution and Morphological Decision4
Practical test method for the sensitivity of programmable logic controller to voltage sags and short interruptions4
Design of narrow transition band variable bandwidth digital filter4
Design, evaluation and application of approximate‐truncated Booth multipliers3
Comprehensive survey of ternary full adders: Statistics, corrections, and assessments3
Circuit analysis and optimisation of the high‐voltage high‐efficiency IR‐UWB pulse generator for ranging and radar application3
RF performance reliability of power N‐LDMOS under pulsed‐RF aging life test in radar application S‐band3
Implementation of the new SCV method in quantum‐dot cellular automata3
Research on three‐phase VSR segmented PI synergetic control strategy based on LCL filter3
A comparative study between E‐neurons mathematical model and circuit model3
Design of energy‐efficient ternary circuits using differential cascode voltage switch strategies in carbon nanotube field effect transistor technology3
Regenerative comparator with floating capacitor for energy‐harvesting applications3
A 1.0 fJ energy/bit single‐ended 1 kb 6T SRAM implemented using 40 nm CMOS process3
A transformer‐less DC–DC converter with high voltage conversion ratio adopting inverting voltage lift cell3
Active balancing method for series battery pack based on flyback converter3
Flexible hardware approach to multi‐core time‐predictable systems design based on the interleaved pipeline processing3
Design considerations of a novel Triple Oxide Trench Deep Gate LDMOS to improve self‐heating effect and breakdown voltage3
Fast OMP algorithm and its FPGA implementation for compressed sensing‐based sparse signal acquisition systems3
Retracted: Multi‐vehicle group‐aware data protection model based on differential privacy for autonomous sensor networks3
Low‐cost TRNG IPs3
A high‐capacity and nonvolatile spintronic associative memory hardware accelerator3
Hall‐effect sensors based on AlGaN/GaN heterojunctions on Si substrates for a wide temperature range3
All‐digital built‐in self‐test scheme for charge‐pump phase‐locked loops3
0.4 mW, 0.27 pJ/bit true random number generator using jitter, metastability and current starved topology3
Power‐efficient compensation circuit for fixed‐width multipliers3
Approach for low power high speed 4‐bit flash analogue to digital converter2
Proposal for an input interface and multi‐output structures of all‐spin logic circuits based on magnetic tunnel junction2
Effect analysis of the teaching method of mutual result correction between students in an experiment of power electronics course2
67 dB SNDR 20 kHz BW SC third‐order modulator with single Op‐Amp and 20 µW power consumption for bio‐medical applications2
Performance survey of classic and Optic network‐on‐chip2
500 V breakdown voltage in β‐Ga2O3 laterally diffused metal‐oxide‐semiconductor field‐effect transistor with 108 MW/cm2 power figure of merit2
Challenges to adopting adiabatic circuits for systems‐on‐a‐chip2
New hardware redundancy approach for making modules tolerate faults using a new fault detecting voter unit structure2
Area Efficient Parallel Median Filter Using Approximate Comparator and Faithful Adder2
A new soft‐switching high step‐down DC‐DC converter for voltage regular module application2
Design and modelling of InGaP/GaSb tandem cell with embedded 1D GaAs quantum superlattice2
9 ps TDC based on multiple sampling in 0.18 μm complementary metal–oxide–semiconductor2
Effect of adding small applications after verification experiment in a power electronics course2
Jerk forms dynamics of a Chua’s family and their new unified circuit implementation2
Methods of solving in‐band ripples and out‐of‐band suppression for yarn tension sensor based on surface acoustic wave2
Design and investigation of negative capacitance–based core‐shell dopingless nanotube tunnel field‐effect transistor2
11 Gb/s 140 GHz OOK modulator with 24.6 dB isolation utilising cascaded switch and amplifier‐based stages in 65 nm bulk CMOS2
Memoryless non‐linearity in B‐Substitution doped and undoped graphene FETs: A comparative investigation2
Thermal field reconstruction based on weighted dictionary learning2
High resolution FPGA pulse width modulation control of full‐bridge DC–DC converters2
Second‐order non‐quasi‐static, compact model of field‐effect transistor revealing terminal rectification beyond their cutoff frequency2
An efficient loop tiling framework for convolutional neural network inference accelerators2
Non‐linear activation function approximation using a REMEZ algorithm2
Compact low‐noise power amplifier design and implementation for millimetre wave frequencies2
One instruction set computer with optimised polarity‐tunable model of double gate CNTFETs2
Design and optimisation of high‐efficient class‐F ULP‐PA using envelope tracking supply bias control for long‐range low power wireless local area network IEEE 802.11ah standard using 65 nm CMOS techno2
Solution to alleviate the impact of line resistance on the crossbar array2
MARPUF: physical unclonable function with improved machine learning attack resistance2
Optimal sensor placement of bridge structure based on sensitivity‐effective independence method2
A wideband balun‐LNA employing symmetrical CCC technique and balanced outputs2
An energy‐efficient dynamic comparator in Carbon Nanotube Field Effect Transistor technology for successive approximation register ADC applications2
Low power analogue equaliser with adaptive digital tuning for fast ethernet2
Si 1− x Ge x nanowire based metal‐semiconducto2
On the applicability of two‐bit carbon nanotube through‐silicon via for power distribution networks in 3‐D integrated circuits2
Exploiting uncertain timing information in time‐based SAR ADCs2
Comparative study of electro‐thermal characteristics of 4500 V diffusion‐CS IGBT and buried‐CS IGBT2
19.5 μW ultra‐low‐power 13.56 MHz RFID tag based on transparent zinc‐oxide thin‐film transistors2
Household induction cooking system based on a grid‐connected photovoltaic system2
Single‐ended ring oscillators: analysis and design2
Single event transient mitigation techniques for a cross‐coupled LC oscillator, including a single‐event transient hardened CMOS LC‐VCO circuit2
Practical data connection between MATLAB and microcontrollers using virtual serial port and MicroPython Pyboard: A survey2
Performance improvement of timing and power variations due to random dopant fluctuation in negative‐capacitance CMOS inverters2
Statistical compact model extraction for skew‐normal distributions2
Performance of ultra‐wide band DCBLNA with suspended strip line radiator for human breast cancer diagnosis medical imaging application1
Design and simulation of a variable MEMS capacitor for tunable HMSIW resonator1
Dynamic analysis of Halbach coaxial magnetic gears based on magnetic equivalent circuit modelling1
Design and Analysis of Power‐Efficient Quasi‐Adiabatic Ternary Content Addressable Memory (QATCAM)1
Fine resolution delay tuning method to improve the linearity of an unbalanced time‐to‐digital converter on a Xilinx FPGA1
Soft fault diagnosis of non‐linear circuits having multiple DC solutions1
Characterizing a standard cell library for large scale design of memristive based signal processing1
Approach to modelling uniform transmission lines for broadband high‐frequency applications1
Design and analysis of a tunable broadband 180‐degree active coupler with low phase‐error and high‐directivity using staggering technique1
Improved reverse recovery characteristics obtained in 4H‐SiC double‐trench superjunction MOSFET with an integrated p‐type Schottky diode1
Generalised approach for active‐RC quadrature oscillator circuit with grounded capacitors1
Blinding HT: Hiding Hardware Trojan signals traced across multiple sequential levels1
A study of harmonic spatial propagation along AC power lines of meshed power systems1
Improvements in reliability and radio frequency performance of junctionless tunnelling field effect transistor using p+ pocket and metal strip1
Construction of visual evaluation system for building block night scene lighting based on multi‐target recognition and data processing1
Analytical drain current model of strained junctionless nanowire tunnel field‐effect transistor fabricated on virtual substrate1
Open‐circuit voltage decay: moving to a flexible method of characterisation1
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Noise‐power‐area optimised design procedure for OTAs with complementary input transistors for neural amplifiers1
Multi‐precision binary multiplier architecture for multi‐precision floating‐point multiplication1
Analytical model and simulation‐based analysis of a work function engineered triple metal tunnel field‐effect transistor device showing excellent device performance1
Indirect and adaptive test of analogue circuits based on preselected steady‐state response measures1
3D device‐level simulation of charge separation from sidewall in vertical transfer gate pinned photodiode pixels for noise mitigation1
Comparison of active dual‐gate and passive mixers for terahertz applications1
Time‐interleaving design of error‐feedback sigma‐delta modulators with infinite impulse response noise transfer function1
Design of a high‐performance advanced phase locked loop with high stability external loop filter1
Teaching method of designing experiment from the perspective of teacher in power electronics course1
Retracted: Research on wavelet neural network PID control of maglev linear synchronous motor1
Design and analysis of energy‐efficient compressors based on low‐power XOR gates in carbon nanotube technology1
Variation resilient reliable design of trigger pulse generator1
Improved voltage transfer method for lithium battery string management chip1
Analysis and mathematical modelling of charge injection effect for efficient performance of CMOS imagers and CDS circuit1
Match‐line control unit for power and delay reduction in hybrid CAM1
Broadband RF‐predistortion supporting carrier aggregation1
Impact of receptacle degradation and loose connection on signal integrity and electrical performance repeatability1
A high‐performance processor for optimal ate pairing computation over Barreto–Naehrig curves1
Extended Boolean algebra for asynchronous quasi‐delay‐insensitive logic1
Stabilisation of multi‐loop amplifiers using circuit‐based two‐port models stability analysis1
Digitally programmable modified current differencing transconductance amplifier in 40‐nm technology: design flow, parameter analyses and applications1
Comparative radio‐frequency and crosstalk analysis of carbon‐based nano‐interconnects1
Hybrid bidirectional transceiver for multipoint‐to‐multipoint signalling across on‐chip global interconnects1
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A 0.002‐mm 2 8‐bit 1‐MS/s low‐power time‐based DAC (T‐DAC)1
Constant frequency, non‐isolated multichannel LED driver based on variable inductor1
Efficient CTDSM based on GM‐C quantiser and improved dynamic element matching1
Bandwidth controlled weakly connected MEMS resonators based narrowband filter1
Embedding delay‐based physical unclonable functions in networks‐on‐chip1
Theoretical total harmonic distortion evaluation based on digital to analogue converter mismatch to improve the linearity of successive approximation register analogue to digital converter1
A study on flare minimisation in EUV lithography by post‐layout re‐allocation of wire segments1
Run‐time neuro‐fuzzy type‐2 controller for power optimisation of GP‐GPU architecture1
Realisation of three‐dimensional geometric model in case of bike frame measurement1
3‐5 GHz multifinger CMOS LNA using a simultaneous noise and impedance matching technique by a significant reduction of broadband impedance variation of metal–oxide–semiconductor field effect transisto1
Radix‐2 r recoding with common subexpression elimination for multiple constant multiplication1
Quasi‐fixed frequency controlled phase modulation LCC resonant converter with a wide power range1
Reduced switching mode for SAR ADCs: analysis and design of SAR A‐to‐D algorithm with periodic standby mode circuit components1
Effect analysis of adding selective experiments in power electronics course to encourage students’ active learning1
Mechanical model analysis and reliability design approach of Quartz Flexible Accelerometer under fractured state1
A chipless light switch for smart‐homes1
A 0.6 V 2.7 mW 94.3% locking range injection‐locked frequency divider using modified varactor‐less Colpitts oscillator topology1
Current mirror with charge dissipation transistor for analogue single‐event transient mitigation in space application1
Fault‐tolerant quantum implementation of conventional decoder logic with enable input1
Methodology and comparative design of an efficient 4‐bit encoder with bubble error corrector for 1‐GSPS flash type ADC1
Evaluation of circuit performance of T‐shaped tunnel FET1
Dataflow and microarchitecture co‐optimisation for sparse CNN on distributed processing element accelerator1
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