Journal of Semiconductor Technology and Science

Papers
(The median citation count of Journal of Semiconductor Technology and Science is 0. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2020-11-01 to 2024-11-01.)
ArticleCitations
Volatile and Nonvolatile Memory Devices for Neuromorphic and Processing-in-memory Applications16
Ferroelectricity in Al₂O₃/Hf0.5Zr0.5O₂ Bilayer Stack: Role of Dielectric Layer Thickness and Annealing Temperature10
Chemoresistive Gas Sensors for Food Quality Monitoring6
Silicon-controlled Rectifier-based Electrostatic Discharge Protection Circuit with Additional NPN Parasitic Bipolar Junction Transistor for 5-V Application6
Review of Analog Neuron Devices for Hardware-based Spiking Neural Networks6
P-GaN Gated AlGaN/GaN E-mode HFET Fabricated with Selective GaN Etching Process5
Impact of Dielectrics in SOI FinFET for Lower Power Consumption in Punch-through Current-based Local Thermal Annealing5
A More Practical Indicator of MAC Operational Power Efficiency inside Memory-based Synapse Array5
Enhanced Current-voltage Nonlinearity by Controlling Oxygen Concentration of TiO<SUB>x</SUB> Buffer Layer for RRAM Passive Crossbar Array4
Multi Look-up Table FPGA Reverse Engineering with Bitstream Extraction and Multiple PIP/PLP Matching3
Effects of Oxygen Injection Rates on a-IGZO Thin-film Transistors with Oxygen Plasma Treatment3
Novel Process Technologies of a Deep-submicron MOSFET for the High Packing Density of Circuits3
Analytical Heat Transfer Model for a TTSVs-based Thermal Mitigation Power Chip3
A Comprehensive Review on High-efficiency RF-DC Converter for Energy Harvesting Applications3
Compact Modeling of a HfO₂ Memristor Cell with Dependence on Compliance Current for Large-area Simulations2
An Approximate DRAM Design with an Adjustable Refresh Scheme for Low-power Deep Neural Networks2
Prediction Methodology for Next-generation Device Characteristics using Machine Learning2
Charge Trap Flash structure with Feedback Field Effect Transistor for Processing in Memory2
Fabrication and Performances of Recessed Gate AlGaN/GaN MOSFETs with Si₃N₄/TiO₂ Stacked Dual Gate Dielectric2
Effects of Oxygen Content on Output Characteristics of IGZO TFTs under High Current Driving Conditions2
Lossless LUT Compressions for Image Enhancement2
A Compact Macromodeling Method for Characterizing Large-signal DC and AC Performance of InP and GaAs HBTs2
CMOS Diodes under Cryogenic Temperature and High Magnetic Field Environment2
Development of Organic Thin-film Transistors on a Biocompatible Parylene-C Substrate2
Multi-gate BCAT Structure and Select Word-line Driver in DRAM for Reduction of GIDL2
Resistive Hydrogen Detection Sensors based on 2 Dimensions – Molybdenum Disulfide Decorated by Palladium Nanoparticles2
A 87.5-dB-SNDR Residue-integrated SAR ADC with a Digital-domain Capacitor Mismatch Calibration2
A Concurrent Dual-band CMOS Partial Feedback LNA with Noise and Input Impedance Matching Optimization for Advanced WLAN Applications1
Synaptic Device based on Resistive Switching Memory using Single-walled Carbon Nanotubes1
Effect of the Ag thickness on the Light Extraction Efficiency of the OLED with an ITO/Ag/ITO Anode1
Sensitive Vector Search for Logic Circuit Failure Probability based on Improved Adaptive Cuckoo Algorithm1
A Read Disturbance Tolerant Phase Change Memory System for CNN Inference Workloads1
In-depth Survey of Processing-in-memory Architectures for Deep Neural Networks1
A 3-dimensional Modified Vernier Time-to-digital Converter for LiDAR Sensors1
Analysis of Multiple Fin-type Vertical GaN Power Transistors based on Bulk GaN Substrates1
Scalable Fabrication of Flexible Large-area Inverted Organic Photovoltaic Cells1
A Design of Whole-chip ESD Protection Circuit with SCR-based I/O and LIGBT-based Power Clamp1
Implementation and Performance Analysis of Elliptic Curve Cryptography using an Efficient Multiplier1
Investigation of Mechanical Stability during Electro-thermal Annealing in a 3D NAND Flash Memory String1
Demonstration of Multi-layered Macaroni Filler for Back-Biasing-Assisted Erasing Configuration in 3D V-NAND1
Effect of Work-function Variation on Transfer Characteristics and Memory Performances for Gate-all-around JLFET based Capacitorless DRAM1
All-directional Electrostatic-discharge Protection Circuit with High Area-efficiency1
Impact of 3D NAND Current Variation on Inference Accuracy for In-memory Computing1
Predominance of Carrier Diffusion in Determination of Data Retention in One-transistor Dynamic Random-access Memory1
A Low-power Neural Signal Acquisition Analog Front-end IC for Closed-loop Neural Interfaces1
Low Frequency Noise Modeling and SPICE Implementation of Nanoscale MOSFETs1
A Compact 6-bit Phase Shifter in 65 nm RF CMOS Technology for ISM Band1
High Resolution CMOS Frequency-to-digital Converter for a Fine Dust Sensor using a MEMS Resonator1
An 11-bit 160-MS/s Non-binary C-based SAR ADC with a Partially Monotonic Switching Scheme1
Insight into the Charging and Relaxation Dynamics of Diffusive Memristors in Integration-and-fire Neuron Applications1
Extension of DRAM Retention Time at 77 Kelvin by Replacing Weak Rows with Large GIDL Current1
Sub-6 GHz Noise-cancelling Balun-LNTA with Dual-band Q-enhanced LC Notch Filter for 5G New Radio Cellular Applications1
Periodic Ground Structure for C-PHY Signaling in Mobile Applications1
Erase Speed Enhancement with Low Power Operation by Incorporating Boron Doping1
Operation of NO₂ Gas Sensors based on Pd-AlGaN/GaN HEMT up to 500 °C1
Feasibility Study of Monitoring of Particle Generation in Plasma Etching Process by Plasma Impedance Measurement1
A 28-nm CMOS 11.2-Gbps Receiver based on Adaptive CTLE and Adaptive 3-Tap DFE With Hysteresis Low-pass Filter1
Improved Performance of Normally-off GaN-based MIS-HEMTs with Recessed-gate and Ultrathin Regrown AlGaN Barrier1
Design and Characterization of N-MCT with Low Vth Off-FET for High Current-drive Capability1
Photoresponsivity Enhancement of AlGaN/GaN Heterojunction Phototransistor with ZnO Nanodot Coating Layer1
An Optoelectronic Transimpedance Amplifier in 180-nm CMOS for Short-range LiDAR Sensors1
Temperature-insensitive Pseudo-resistor1
Reduction of the Pass Gate Effect with a Spherical Shallow Trench Isolation in the BCAT Structure1
A 32.2 GHz Full Adder Designed with TLE Method in a InP DHBT Technology1
Dynamic Memory Access Control for Accelerating FPGA-based Image Processing1
A Non-binary C-R Hybrid DAC for 12 b 100 MS/s CMOS SAR ADCs with Fast Residue Settling1
A Mirrored Current-conveyor Transimpedance Amplifier in 65-nm CMOS1
Switching and Heat-dissipation Performance Analysis of an LTCC-based Leadless Surface Mount Package1
Measurement and Characterization of Unstable Pixels of Long-wavelength HgCdTe Infrared Focal Plane Array1
Small-signal Modeling of InP HBT based on PSO-ELM Neural Network1
Efficient Partially-parallel NTT Processor for Lattice-based Post-quantum Cryptography1
Study on the Influence of Drain Voltage on Work Function Variation Characteristics in Tunnel Field-effect Transistor0
An Integrated Circuit for Biphasic Pulse Generator with Variable Parameters0
A Reference Clock Doubler with Fully Digital Duty-cycle Error Correction Controller0
An Electrical Stimulator IC with Chopped Pulse based Active Charge Balancing for Neural Interface Applications0
Doping-less Tunnel Field-effect Transistor with a Gate Insulator Stack to Adjust Tunnel Barrier0
A Ka-band Power Amplifier with On-chip Power Detector in 0.15 μm GaAs pHEMT Technology0
Annealing Effects on Charge Trap Flash with TAHOS Structure0
Effects of Ultrasonication on the Electrical Performance of a-IGZO TFTs0
Design of a Vertical Cylinder GaN Junctionless FET based on its GaN-on-GaN Substrate and Electrical Performance0
A Low-luminance Compensation Current Driver for AMOLED Displays0
A Low-overhead Solution for Obfuscating Scan Data Against Scan-based Side-channel Attacks0
Neural Spike Detection Circuit with Amplification Method using Input DC Level Control0
A Digital FLL-based Sub-harmonically Injection-locked PLL with Resolution-multiplied TDC for Frequency Offset Cancellation0
A Review of Noise Reduction Techniques in Noise-shaping SAR ADCs0
Quantitative Analysis of Channel Width Effects on Electrical Performance Degradation of Top-gate Self-aligned Coplanar IGZO Thin-film Transistors under Self-heating Stresses0
A Resolution Reconfigurable Hybrid ADC with Register-switching Method for Bio-signal Processing0
Analysis and Prediction of Nanowire TFET’s Work Function Variation0
Deep Learning Segmentation Modeling for SiN, SiO<SUB>2</SUB> Film Deposition Process Defect of High Bandwidth Memory0
Optimization of FinFET’s Fin Width and Height with Self-heating Effect0
2 Lanes × 2.65-6.4 Gb/s Scalable IO Transceiver with Delay Compensation Technique in 65 nm CMOS Process0
Study of Circuit Techniques for Enhancing Display Noise Immunity in Analog Front-end of Mutual-capacitive Touch Systems0
Design of an Approximate Adder based on Modified Full Adder and Nonzero Truncation for Machine Learning0
A 10-bit 10-MS/s Asynchronous SAR ADC with Input Offset Calibration using Capacitor DAC0
Dependency of Spiking Behaviors of an Integrate-and-fire Neuron Circuit on Shunt Capacitor0
A 262 MHz Narrow Band RF Transceiver for Korean M-Bus Smart Metering Service0
High-performance Sum Operation with Charge Saving and Sharing Circuit for MRAM-based In-memory Computing0
Low Power RF Interface of the Near-field Communications Tag IC for Sensors0
A 12-bit 10-MS/s Pipelined SAR ADC Sharing Flash ADC and Residue Amplifier of Multiplying DAC0
Resistance Characteristics of Thin Films and Contacts in CMOS under Cryogenic Temperature and High Magnetic Field Environment0
Design of a Reliable Current Sense Amplifier with Dynamic Reference for Resistive Memory0
Study on Low-jitter and Low-power PLL Architectures for Mobile Audio Systems0
Surface Stoichiometry Dependence of Ambipolar SiGe Tunnel Field-effect Transistors and Its Effect on the Transient Performance Improvement0
A 25-Gb/s PAM-4 Baud-rate CDR with High Jitter Tolerance using Shared Sampler Method0
2 Lanes × 2.65-6.4 Gb/s Scalable IO Transceiver with Delay Compensation Technique in 65 nm CMOS Process0
BTI Tolerant Clock Tree Synthesis using LP-based Supply Voltage Alignment0
Design of an Approximate 4-2 Compressor with Error Recovery for Efficient Approximate Multiplication0
Interfacial Trap-based 1-row Hammer Analysis of BCAT and Nitride Layer BCAT Structures in Dynamic Random Access Memory0
A Fast Settling, 0.1-100% Duty-cycled, 1-100 mA Accurate Current Control LED Driver for PPG Sensor System0
A 4.5-to-14 GHz PLL-based Clock Driver with Wide-range 3-shaped LC-VCOs for GDDR6 DRAM Test0
Design of a Reliable Current Sense Amplifier with Dynamic Reference for Resistive Memory0
Sensitivity-controllable P-N Diode Temperature Sensor with High-sensitivity0
A Sound Activity Monitor with 96.3 μs Wake-up Time and 2.5 μW Power Consumption0
Time- and Temperature-dependent Degradation of p-GaN Gate HEMTs under Forward Gate Voltage Stress0
Radiation Tolerant by Design 12-transistor Static Random Access Memory0
Design of Various Dipolar Source for Improvement of Electrostatic Discharge Protection Performance of 0.18 μm_30 V DDDNMOS Transistor for High Voltage Application0
Body-biasing-based Latch Offset Cancellation Sensing Circuit for Deep Submicrometer STT-MRAM0
Inductorless Broadband Transimpedance Amplifier for 25-Gb/s NRZ and 50-Gb/s PAM-4 Operations in a 90-nm CMOS Technology0
A 24 ㎓ CMOS Receiver Front-end for In-Cabin Radar Systems0
Spiking Convolution Processor with NoC Architecture and Membrane Data Reuse Dataflow0
A 320-MS/s 2-b/cycle Second-order Noise-shaping SAR ADC0
A 39.8% Locking Range Injection-locked Quadrature Voltage-controlled Oscillator using Fourth-order Resonator0
A Novel Architecture of Asynchronous Sorting Engine Module for ASIC Design0
Electrical Performance Depending on the Grain Boundary-location in the Multiple Nanosheet Tunneling Field-effect Transistor based on the Poly-Si0
A 20-Gb/s PAM-4 Receiver with Dual-mode Threshold Voltage Adaptation using a Time-based LSB Decoder0
Vertical Double-gate SiC/Si/SiC Quantum-well 1T DRAM and Its High-temperature Performances0
Shrink Generator-based Strong PUF Architecture with Improved Uniqueness and Reliability on an FPGA0
Effects of Indium Composition Ratio on Electrical Stability of Top-gate Self-aligned Coplanar IGZO TFTs under Self-heating Stress Conditions0
A 25-Gb/s PAM-4 Baud-rate CDR with High Jitter Tolerance using Shared Sampler Method0
A 16 GHz 1-511 Broadband Programmable Frequency Divider0
Design and Analysis of DC/DC Boost Converter Vertical GaN Power Device based on Epitaxially Grown GaN-on-sapphire0
A Wideband Sub-㎓ Receiver Front-end Supporting High Sensitivity and Selectivity Mode0
Security Problems of Latest FPGAs and Reverse Engineering Methods of Xilinx 7-series FPGAs0
Electrical Performances of GaN-based Vertical Trench MOSFETs with Cylindrical and Hexagonal Structure0
A Single-ring-oscillator based True-random-numbergenerator with 3-edges Collapse0
Handy Calibration Substrate for both Horizontal and Vertical Probing0
Schottky Contact-induced Hump Phenomenon by Bias and Optical Stresses in Amorphous Oxide Thin Film Transistor0
Research on Sensor Functionality of Next-generation Intelligent Semiconductor Devices using Ga₂O₃-based UV-C Detector Under Commercial Conditions0
A 2-GS/s 6-bit Single-channel Speculative Loop-unrolled SAR ADC with Low-overhead Comparator Offset Calibration in 28-nm CMOS0
Time-interleaved Noise-shaping SAR ADC based on CIFF Architecture with Redundancy Error Correction Technique0
Time-domain Continuous-time Delta-sigma Modulator using VCO-based Integrator and GRO-based Quantizer0
A New Coupling Spring Design for MEMS Tuning Fork Structures Demonstrating Robustness to Fabrication Errors and Linear Accelerations0
Random Forest-based Thermal Effect Prediction for Clock Tree Synthesis in 3D-IC0
Empirical Analysis of Disaggregated Cloud Memory on Memory Intensive Applications0
A Low-power Incremental Delta-sigma ADC with Adaptive Biasing for CMOS Image Sensors0
CMOS Nonmagnetic Circulator and Band-Selection Balun-Low Noise Amplifier with RF Self-Interference Cancellation for Advanced In-Band Full-Duplex Transceiver0
A 262 MHz Narrow Band RF Transceiver for Korean M-Bus Smart Metering Service0
A Dual-directional SCR based ESD Protection Design with High Holding Voltage using Embedded MOSFET for 12-V Applications0
Optimization of Dual-workfunction Line Tunnel Field-effect Transistor with Island Source Junction0
Low-overhead Proportional-share I/O Scheduler in Multi-queue Block Layer for NVMe SSDs0
Analysis of GIDL Erase Characteristics in Vertical NAND Flash Memory0
An Ultra-low Noise, Highly Compact Implantable 28 nm CMOS Neural Recording Amplifier0
Analysis of Cell Current with Abnormal Channel Profile in 3D NAND Flash Memory0
Nanoelectromechanical (NEM) Devices for Logic and Memory Applications0
Performance Optimization of IPN in RF PLL using Bayesian Optimization0
Radiation Tolerant by Design 12-transistor Static Random Access Memory0
Improving Efficiency of Top-emission Quantum Dot Light-emitting Diodes Featuring Zn<SUB>0.9</SUB>Mg<SUB>0.1</SUB>O Nanoparticles used as an Electron Transport Layer0
A 28 Gb/s Receiver Front-end Capable of Receiving Wide Range Current Signal in 65 nm CMOS0
Improving Efficiency of Top-emission Quantum Dot Light-emitting Diodes Featuring Zn<SUB>0.9</SUB>Mg<SUB>0.1</SUB>O Nanoparticles used as an Electron Transport Layer0
A Self-aligned Process for Simultaneous Fabrication of Short Channel and Spacer in Semiconductor Devices0
Image Data Compression and Decompression Unit Considering Brightness Sensitivity0
Remote Continuous Monitoring of Tree Physiological Activity using Four-point Electrical Resistance Measurement0
Provisioning CSD-based Storage Systems with Erasure-coding Offloaded to the CSD0
Second-order Delta-sigma Modulator based on Differential Difference Amplifier without Input Buffer0
Analysis of High Temperature Characteristics of Double Gate Feedback Field Effect Transistor0
Three-dimensional Modeling for the Transmittance of ITO/Mesh-Ag/ITO Multilayers using FDTD0
HLS-based HW/SW Co-design and Hybrid HLS-RTL Design for Post-Quantum Cryptosystem0
HLS-based HW/SW Co-design and Hybrid HLS-RTL Design for Post-Quantum Cryptosystem0
High-speed Clock and Data Recovery System with Segmented Slew-rate Control Circuit for High-linearity in 65 nm CMOS Process0
An Analog Front-end Amplifier with Seamless Discrete Time-gain Compensation for Ultrasound Scanner0
A Simple Timing-skew Calibration using Flip-flops for Time-interleaved ADCs0
Resource Analysis on FPGA for Functional Verification of Digital SRAM PIM0
Transistor Count Reduction Technique for Clockfree Null-convention Arithmetic Logic Circuits0
12.2 GHz All-digital PLL with Pattern Memorizing Cells for Low Power/low Jitter using 65 nm CMOS Process0
A Secure Scan Design based on Scan Scrambling by Pseudorandom Values and Circuit Itself0
A Spread Spectrum Clock Generator with Dual-tone Hershey-Kiss Modulation Profile0
Enhancing Accuracy of Nanocomposite Hydrogen Sensors in Various Environmental Situations through Machine Learning0
Selective Annealing Effects in Asymmetric Metal-semiconductor-metal AlGaN UV Sensors0
Tunneling Enhanced Structure for Improving the Performance of Ultraviolet Light-emitting Diodes0
Effects of Trapezoidal Fin Shape on Performance of Negative-capacitance FinFETs0
Effects of Pillar Conditions on DC/AC Characteristics of Tunnel Field-effect Transistor with Vertical Structures0
A Time-based Transceiver Front-end Circuit with 1-tap IIR DFE and Relaxed Termination for Short-reach PCB Interconnect0
Analysis of Drain Voltage Dependent RF Inductive Effect in Floating Body PD-SOI MOSFETs0
1T DRAM with Raised SiGe Quantum Well for Sensing Margin Improvement0
Analysis of Program Speed Characteristics Having Non-ideal Channel Profile in 3D NAND Flash Memory0
A Quadrature Error Corrector for Aperiodic, Quarter-rate Data Strobe Signals in HBM3 Interfaces0
D-RDMALib: InfiniBand-based RDMA Library for Distributed Cluster Applications0
An 80 dB Second-order Noise Shaping SAR ADC using Differential Integral Capacitors and Comparator with Voltage Gain Calibration0
Design of a Packaged Multi-radius Multi-path Solenoidal Inductor for Redistribution Layers0
Device Optimization for Short-channel Effects Suppression in UFETs0
Review and Analysis of Variable Bit-precision MAC Microarchitectures for Energy-efficient AI Computation0
A 1.03MOPS/W Lattice-based Post-quantum Cryptography Processor for IoT Devices0
A High Power Supply Rejection and Fast-transient LDO with Feed-forward Compensation using Current Sensing Technique0
An Ultra-low-power Mixed-mode Face Recognition Processor for Always-on User Authentication in Mobile Device0
Spectral Stability Improvement by Controlling the Spatial Distribution of Excitons in Solution-processed Organic Light-emitting Diodes0
Phonons and Valence-band Splitting in Strained GaAs<SUB>1-x</SUB>N<SUB>x</SUB>/GaAs Epilayers0
Design and Fabrication of Spoof Surface Plasmon Transmission Line Operating at High Frequency0
Research of Quantized Current Effect with Work Function Variation in Tunnel-field Effect Transistor0
Design of ZnO with Reduced Direct Bandgap using First-principles Calculation: Electronic, Band Structure, and Optical Properties0
Review of Short-circuit Protection Circuits for SiC MOSFETs0
A 97.7-dB DR 12.3-μW 1-kHz Bandwidth 2<SUP>nd</SUP> Order Delta-sigma Modulator with a Fully Differential Class-AB Op-Amp using Floating Class-AB Control0
Probabilistic based CMOS Adder for High Speed Communication Systems0
A Low-power DRAM Controller ASIC with a 36% Reduction in Average Active Power by Increasing On-die Termination Resistance0
Design of Various Dipolar Source for Improvement of Electrostatic Discharge Protection Performance of 0.18 μm_30 V DDDNMOS Transistor for High Voltage Application0
A Third-order Noise-shaping SAR ADC using PVT-insensitive Voltage-time-voltage Converter and Mismatch-Shaping0
A 62.6-pJ/Conversion Temperature Sensor with a Capacitor Voltage Division0
Redundant Number-based NBTI Stress Reduction for Lifetime Resilience Enhancement of Neural Processing Engines0
A CMOS Low-pass Filter With Group Delay Cancellation using Non-Foster Element Circuits0
Radiation Tolerant by Design 12-transistor Static Random Access Memory0
A Study on SRAM Designs to Exploit the TEI-aware Ultra-low Power Techniques0
Characterization of ZnO Thin-film Transistors with Various Active Layer Structures after Exposure to Different Proton Energies0
Resource Analysis on FPGA for Functional Verification of Digital SRAM PIM0
A Self-aligned Process for Simultaneous Fabrication of Short Channel and Spacer in Semiconductor Devices0
A CMOS Dual-mode DC-DC Converter with a Digital Dual-mode Controller0
Study on the Circuit Performance of Various Interconnect Metal Materials in the Latest Process Nodes0
TRNG-PUF Integration Utilizing Programmable Delay Logics on FPGAs0
Electrostatic Force Simulation Comparison of Tilted Plate Actuator and Conventional Actuator0
TRNG-PUF Integration Utilizing Programmable Delay Logics on FPGAs0
A Novel PWAM Signaling Scheme for High-speed Serial Interface0
Investigation of p-type High Temperature Field Effect Transistor for CMOS Logic Application0
An Extensive PUF of Bistable Rings Feed-forward Chains with Lightweight Secure Architecture for Enhanced ML Attack Resistance0
Adaptive Non-speculative DFE with Extended Time Constraint for PAM-4 Receiver0
An Ultra-low Noise, Highly Compact Implantable 28 nm CMOS Neural Recording Amplifier0
A 4.5-to-14 GHz PLL-based Clock Driver with Wide-range 3-shaped LC-VCOs for GDDR6 DRAM Test0
6.5 kV SiC Power Devices with Improved Blocking Characteristics against Process Deviations0
A Lightweight Scan Architecture against the Scan-based Side-channel Attack0
Analysis of a Vertical Cavity Surface Emitting Laser Excited by a Rectangular Pulse0
Effects of Material and Doping Profile Engineering of Source Junction on Line Tunneling FET Operations0
High-PSRR Low-dropout Regulator with Fast Transient Response Time and Low Output Peak Voltage0
A 70 dB SNDR 10 MS/s 28 nm CMOS Nyquist SAR ADC with Capacitor Mismatch Calibration Reusing Segmented Reference Voltages0
Quantification of Substrate Current Caused by an Individual Trap at Different Locations and Energies, Prevailing on Si/SiO₂ Interface or Si Substrate of n-MOSFETs0
A 0.9 - 1.5 GHz CMOS UWB Radar IC for Through the Wall Human Detection0
A 0.1-3 GHz Wide Bandwidth Ring VCO Fractional-N PLL with Phase Interpolator in 8 nm FinFET CMOS0
2.4 GHz Low-power Receiver Front-end Employing I/Q Mixer with Current-reused Quadrature Transconductor for Bluetooth Low Energy Applications0
The Fabrication of Floating Gate CMUT with Multi Cantilevers and Its Failure Analysis0
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