OOIR: Observatory of International Research

Papers

(The TQCC of IEEE Computer Architecture Letters is 3. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2020-11-01 to 2024-11-01.)

Article	Citations
RAMBO: Resource Allocation for Microservices Using Bayesian Optimization	33
Lightweight Hardware Implementation of Binary Ring-LWE PQC Accelerator	20
MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator	16
Flexion: A Quantitative Metric for Flexibility in DNN Accelerators	14
HBM3 RAS: Enhancing Resilience at Scale	12
Cryogenic PIM: Challenges & Opportunities	11
A Day In the Life of a Quantum Error	9
STONNE: Enabling Cycle-Level Microarchitectural Simulation for DNN Inference Accelerators	9
TRiM: Tensor Reduction in Memory	9
FPGA-Based AI Smart NICs for Scalable Distributed AI Training Systems	8
Reorder Buffer Contention: A Forward Speculative Interference Attack for Speculation Invariant Instructions	8
Heterogeneity-Aware Scheduling on SoCs for Autonomous Vehicles	8
DRAM-CAM: General-Purpose Bit-Serial Exact Pattern Matching	7
LT-PIM: An LUT-Based Processing-in-DRAM Architecture With RowHammer Self-Tracking	7
Accelerating Concurrent Priority Scheduling Using Adaptive in-Hardware Task Distribution in Multicores	7
GraNDe: Near-Data Processing Architecture With Adaptive Matrix Mapping for Graph Convolutional Networks	7
Characterizing and Understanding End-to-End Multi-Modal Neural Networks on GPUs	7
BTB-X: A Storage-Effective BTB Organization	7
Understanding the Implication of Non-Volatile Memory for Large-Scale Graph Neural Network Training	6
Instruction Criticality Based Energy-Efficient Hardware Data Prefetching	6
Characterizing and Understanding HGNNs on GPUs	6
Characterizing and Understanding Distributed GNN Training on GPUs	6
Computational CXL-Memory Solution for Accelerating Memory-Intensive Applications	6
Infinity Stream: Enabling Transparent and Automated In-Memory Computing	5
Towards Improved Power Management in Cloud GPUs	5

A First-Order Model to Assess Computer Architecture Sustainability	5
Deep Partitioned Training From Near-Storage Computing to DNN Accelerators	5
X-ray: Discovering DRAM Internal Structure and Error Characteristics by Issuing Memory Commands	5
Hardware Acceleration for GCNs via Bidirectional Fusion	5
DAM: Deadblock Aware Migration Techniques for STT-RAM-Based Hybrid Caches	4
Dynamic Optimization of On-Chip Memories for HLS Targeting Many-Accelerator Platforms	4
Managing Prefetchers With Deep Reinforcement Learning	4
Hungarian Qubit Assignment for Optimized Mapping of Quantum Circuits on Multi-Core Architectures	4
Canal: A Flexible Interconnect Generator for Coarse-Grained Reconfigurable Arrays	4
WPC: Whole-Picture Workload Characterization Across Intermediate Representation, ISA, and Microarchitecture	4
Zero-Copying I/O Stack for Low-Latency SSDs	4
Decoupled SSD: Reducing Data Movement on NAND-Based Flash SSD	4
Mitigating Timing-Based NoC Side-Channel Attacks With LLC Remapping	4
Row-Streaming Dataflow Using a Chaining Buffer and Systolic Array+ Structure	4
Adaptive Web Browsing on Mobile Heterogeneous Multi-cores	4
Last-Level Cache Insertion and Promotion Policy in the Presence of Aggressive Prefetching	4
Characterization and Implementation of Radar System Applications on a Reconfigurable Dataflow Architecture	4
OpenMDS: An Open-Source Shell Generation Framework for High-Performance Design on Xilinx Multi-Die FPGAs	4
Accelerating Graph Processing With Lightweight Learning-Based Data Reordering	3
A Quantum Computer Trusted Execution Environment	3
Near-Data Processing in Memory Expander for DNN Acceleration on GPUs	3
MQSim-E: An Enterprise SSD Simulator	3
Data-Aware Compression of Neural Networks	3
gem5-accel: A Pre-RTL Simulation Toolchain for Accelerator Architecture Validation	3
Making a Better Use of Caches for GCN Accelerators with Feature Slicing and Automatic Tile Morphing	3
Unleashing the Potential of PIM: Accelerating Large Batched Inference of Transformer-Based Generative Models	3