OOIR: Observatory of International Research

Papers

(The median citation count of ACM Journal on Emerging Technologies in Computing Systems is 3. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2020-03-01 to 2024-03-01.)

Article	Citations
A Survey on Silicon Photonics for Deep Learning	45
Extracting Success from IBM’s 20-Qubit Machines Using Error-Aware Compilation	44
Hardware Trust and Assurance through Reverse Engineering: A Tutorial and Outlook from Image Analysis and Machine Learning Perspectives	44
The Big Hack Explained	42
Challenging the Security of Logic Locking Schemes in the Era of Deep Learning: A Neuroevolutionary Approach	38
A Side-Channel-Resistant Implementation of SABER	30
OpenQL: A Portable Quantum Programming Framework for Quantum Accelerators	18
NxTF: An API and Compiler for Deep Spiking Neural Networks on Intel Loihi	18
Toward Multi-FPGA Acceleration of the Neural Networks	17
Defects, Fault Modeling, and Test Development Framework for RRAMs	16
Design of Adiabatic Logic-Based Energy-Efficient and Reliable PUF for IoT Devices	16
Dynamic Reliability Management in Neuromorphic Computing	16
QCOR	14
A Flexible Multichannel EEG Artifact Identification Processor using Depthwise-Separable Convolutional Neural Networks	14
Approximate Memristive In-Memory Hamming Distance Circuit	13
Towards Synaptic Behavior of Nanoscale ReRAM Devices for Neuromorphic Computing Applications	13
Design and Analysis of FPGA-based PUFs with Enhanced Performance for Hardware-oriented Security	13
Mitigate Parasitic Resistance in Resistive Crossbar-based Convolutional Neural Networks	12
Sorting in Memristive Memory	11
Impact of On-chip Interconnect on In-memory Acceleration of Deep Neural Networks	11
The Bitlet Model: A Parameterized Analytical Model to Compare PIM and CPU Systems	10
CONCEALING-Gate: Optical Contactless Probing Resilient Design	10
Design of a Robust Memristive Spiking Neuromorphic System with Unsupervised Learning in Hardware	9
Exploiting Data Resilience in Wireless Network-on-chip Architectures	9
BPLight-CNN: A Photonics-Based Backpropagation Accelerator for Deep Learning	9

Guarding Machine Learning Hardware Against Physical Side-channel Attacks	9
EM-X-DL: Efficient Cross-device Deep Learning Side-channel Attack With Noisy EM Signatures	9
Computational Capacity of Complex Memcapacitive Networks	8
Cryptography with Analog Scheme Using Memristors	8
Resilient and Secure Hardware Devices Using ASL	8
A Lightweight Architecture for Hardware-Based Security in the Emerging Era of Systems of Systems	8
Analyzing Security Vulnerabilities Induced by High-level Synthesis	8
A Voltage-Controlled, Oscillation-Based ADC Design for Computation-in-Memory Architectures Using Emerging ReRAMs	8
Fortifying Vehicular Security through Low Overhead Physically Unclonable Functions	8
Robust and Attack Resilient Logic Locking with a High Application-Level Impact	8
MNEMOSENE: Tile Architecture and Simulator for Memristor-based Computation-in-memory	7
A Survey on Memory-centric Computer Architectures	7
A Review and Comparison of AI-enhanced Side Channel Analysis	7
A Genetic-algorithm-based Approach to the Design of DCT Hardware Accelerators	7
An Electro-Photonic System for Accelerating Deep Neural Networks	7
A Cost-Efficient Digital ESN Architecture on FPGA for OFDM Symbol Detection	7
ScatterVerif: Verification of Electronic Boards Using Reflection Response of Power Distribution Network	7
A Survey Describing Beyond Si Transistors and Exploring Their Implications for Future Processors	7
Hardware Trojan Detection Using Unsupervised Deep Learning on Quantum Diamond Microscope Magnetic Field Images	7
Timing-Optimized Hardware Implementation to Accelerate Polynomial Multiplication in the NTRU Algorithm	6
PUF based Secure and Lightweight Authentication and Key-Sharing Scheme for Wireless Sensor Network	6
ASIE	6
Machine Learning Vulnerability Analysis of FPGA-based Ring Oscillator PUFs and Counter Measures	6
Artificial Intelligence–based Computed Tomography Processing Framework for Surgical Telementoring of Congenital Heart Disease	6
Making a Case for Partially Connected 3D NoC	6
NORM: An FPGA-based Non-volatile Memory Emulation Framework for Intermittent Computing	6
RNNFast	6
Hardware Security in Spin-based Computing-in-memory	5
Binary Precision Neural Network Manycore Accelerator	5
Device-aware Circuit Design for Robust Memristive Neuromorphic Systems with STDP-based Learning	5
Low Overhead Online Data Flow Tracking for Intermittently Powered Non-Volatile FPGAs	5
Power-efficient Spike Sorting Scheme Using Analog Spiking Neural Network Classifier	5
Time-varying Metamaterial-enabled Directional Modulation Schemes for Physical Layer Security in Wireless Communication Links	4
Thermal and Performance Efficient On-Chip Surface-Wave Communication for Many-Core Systems in Dark Silicon Era	4
Dynamic Behavior Predictions for Fast and Efficient Hybrid STT-MRAM Caches	4
CLU	4
DTA-PUF: Dynamic Timing-aware Physical Unclonable Function for Resource-constrained Devices	4
Victims Can Be Saviors	4
SILVerIn: Systematic Integrity Verification of Printed Circuit Board Using JTAG Infrastructure	4
Write Back Energy Optimization for STT-MRAM-based Last-level Cache with Data Pattern Characterization	4
A Global Routing Method for Graphene Nanoribbons Based Circuits and Interconnects	4
STAP: An Architecture and Design Tool for Automata Processing on Memristor TCAMs	4
A Quality-assured Approximate Hardware Accelerators–based on Machine Learning and Dynamic Partial Reconfiguration	4
Towards Compact Modeling of Noisy Quantum Computers: A Molecular-Spin-Qubit Case of Study	4
Hardware Trojan Horse Detection through Improved Switching of Dormant Nets	4
multiPULPly	4
Towards a Truly Integrated Vector Processing Unit for Memory-bound Applications Based on a Cost-competitive Computational SRAM Design Solution	4
Compressing RNNs to Kilobyte Budget for IoT Devices Using Kronecker Products	4
Built-in Self-Test and Fault Localization for Inter-Layer Vias in Monolithic 3D ICs	4
Graphene-Based Artificial Synapses with Tunable Plasticity	4

Towards on-node Machine Learning for Ultra-low-power Sensors Using Asynchronous Σ Δ Streams	4
Integrated Power Signature Generation Circuit for IoT Abnormality Detection	3
Image Complexity Guided Network Compression for Biomedical Image Segmentation	3
Attack Mitigation of Hardware Trojans for Thermal Sensing via Micro-ring Resonator in Optical NoCs	3
Improving Deep Learning Networks for Profiled Side-channel Analysis Using Performance Improvement Techniques	3
Architecting for Artificial Intelligence with Emerging Nanotechnology	3
Quantization of Deep Neural Networks for Accurate Edge Computing	3
GPUOPT	3
FPIC: A Novel Semantic Dataset for Optical PCB Assurance	3
A Cost-Effective Built-In Self-Test Mechanism for Post-Manufacturing TSV Defects in 3D ICs	3
Neural Network-based Inherently Fault-tolerant Hardware Cryptographic Primitives without Explicit Redundancy Checks	3
Taming Molecular Field-Coupling for Nanocomputing Design	3
Hardware-accelerated Simulation-based Inference of Stochastic Epidemiology Models for COVID-19	3
Projection of Dual-Rail DPA Countermeasures in Future FinFET and Emerging TFET Technologies	3
A Reconfigurable Multiplier for Signed Multiplications with Asymmetric Bit-Widths	3
Reliable Constructions for the Key Generator of Code-based Post-quantum Cryptosystems on FPGA	3
LosPem	3
The Uncertainty of Side-channel Analysis: A Way to Leverage from Heuristics	3
NN-Lock : A Lightweight Authorization to Prevent IP Threats of Deep Learning Models	3
Power Management of Monolithic 3D Manycore Chips with Inter-tier Process Variations	3
DeepPeep	3
Fast Linear Interpolation	3
A Novel Highly-Efficient Inexact Full Adder Cell for Motion and Edge Detection Systems of Image Processing in CNFET Technology	3
Bridging the Gap between RTL and Software Fault Injection	3
Hardware Trojan Attack in Embedded Memory	3
Accelerating Deep Neuroevolution on Distributed FPGAs for Reinforcement Learning Problems	3
Direction-aggregated Attack for Transferable Adversarial Examples	3
Temporal State Machines: Using Temporal Memory to Stitch Time-based Graph Computations	3
Depth-bounded Graph Partitioning Algorithm and Dual Clocking Method for Realization of Superconducting SFQ Circuits	3
Network-on-Chip Intellectual Property Protection Using Circular Path--based Fingerprinting	3