ACM Journal on Emerging Technologies in Computing Systems

Papers
(The median citation count of ACM Journal on Emerging Technologies in Computing Systems is 2. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2022-05-01 to 2026-05-01.)
ArticleCitations
Breaking On-Chip Communication Anonymity Using Flow Correlation Attacks50
Impedance Leakage Vulnerability and Its Utilization in Reverse-Engineering Embedded Software29
A Persistent Hierarchical Bloom Filter-based Framework for Scalable Authentication and Tracking of ICs28
Defending against Adversarial Attacks in Deep Learning with Robust Auxiliary Classifiers Utilizing Bit-plane Slicing27
Low-Rank Gradient Descent for Memory-Efficient Training of Deep In-Memory Arrays26
Sorting in Memristive Memory22
STIFT: A Spatio-Temporal Integrated Folding Tree for Efficient Reductions in Flexible DNN Accelerators21
A Golden-Free Unsupervised ML-Assisted Security Approach for Detection of IC Hardware Trojans20
High-Efficiency Bidirectional Translator between SystemC and Verilog17
A Cost-Effective Built-In Self-Test Mechanism for Post-Manufacturing TSV Defects in 3D ICs16
Energy-Efficient Probabilistic Bayesian Neural Networks for Resource-Constrained Environments13
All-spin PUF: An Area-efficient and Reliable PUF Design with Signature Improvement for Spin-transfer Torque Magnetic Cell-based All-spin Circuits13
ChaoticImmuneNet: A Chaos-driven Immunity Inspired Neural Network Paradigm for Embodied Intelligence in Resource-Constrained Devices12
NORM: An FPGA-based Non-volatile Memory Emulation Framework for Intermittent Computing12
SkyBridge 2.0: A Fine-grained Vertical 3D-IC Technology for Future ICs12
SpALEn: Sp arsity A ware L oad Balancing Inference 12
Technology/System Co-Optimization for FPGA Using Emerging Reconfigurable Logic Device12
Characterization of Timing-based Software Side-channel Attacks and Mitigations on Network-on-Chip Hardware11
Design of False Data Injection Attacks in a Cyber-Physical System Using Gaussian Distribution11
DINOS: Data INspired Oligo Synthesis for DNA Data Storage11
Secure and Lightweight Authentication Protocol Using PUF for the IoT-based Wireless Sensor Network11
Diverse, Neural Trojan Resilient Ecosystem of Neural Network IP10
A Fast Object Detection-Based Framework for Via Modeling on PCB X-Ray CT Images10
A Neoteric Approach for Logic with Embedded Memory Leveraging Crosstalk Computing9
Virtualizing Existing Fluidic Programs9
Applications and Challenges of AI in PCB X-ray Inspection: A Comprehensive Study7
B-open Defect: A Novel Defect Model in FinFET Technology7
HDRLPIM: A Simulator for Hyper-Dimensional Reinforcement Learning Based on Processing In-Memory7
SAT-Based Exact Modulo Scheduling Mapping for Resource-Constrained CGRAs7
SRLL: Improving Security and Reliability with User-Defined Constraint-Aware Logic Locking7
Extreme Partial-Sum Quantization for Analog Computing-In-Memory Neural Network Accelerators6
PUF-based Digital Money with Propagation-of-Provenance and Offline Transfers between Two Parties6
Fusing In-storage and Near-storage Acceleration of Convolutional Neural Networks6
Towards Certified Safe Personalization in Learning-Enabled Human-in-the-loop Human-in-the-plant Systems6
Spiking-NeRF: Spiking Neural Network for Energy-Efficient Neural Rendering6
Digital Fault-based Built-in Self-test and Evaluation of Low Dropout Voltage Regulators6
Reliable Constructions for the Key Generator of Code-based Post-quantum Cryptosystems on FPGA5
F-Bypass: A Low-Power Network-on-Chip Design Utilizing Bypass to Improve Network Connectivity5
FHE-MENNs: Opportunities and Pitfalls for Accelerating Fully Homomorphic Private Inference with Multi-Exit Neural Networks5
Building an Open Representation for Biological Protocols4
PhotoHDC: An Electro-Photonic Accelerator for Hyperdimensional Computing4
A Novel Highly-Efficient Inexact Full Adder Cell for Motion and Edge Detection Systems of Image Processing in CNFET Technology4
Hardware Trojan Detection Potential and Limits with the Quantum Diamond Microscope3
Genetic Cache: A Machine Learning Approach to Designing DRAM Cache Controllers in HBM Systems3
Hardware Trojan Detection Using Unsupervised Deep Learning on Quantum Diamond Microscope Magnetic Field Images3
AccHashtag : Accelerated Hashing for Detecting Fault-Injection Attacks on Embedded Neural Networks3
Generation of Black-box Audio Adversarial Examples Based on Gradient Approximation and Autoencoders3
Demonstration of a Scalable DNA Computing Platform: Writing and Selection3
Repercussions of Using DNN Compilers on Edge GPUs for Real Time and Safety Critical Systems: A Quantitative Audit3
AroMa : Evaluating Deep Learning Systems for Stealthy Integrity Attacks on Multi-tenant Accelerators3
Toward the Generation of Test Vectors for the Detection of Hardware Trojan Targeting Effective Switching Activity2
Enhancing Blockchain Scalability using Off-Chain and Machine Learning Techniques2
SPLIT PUF: Efficient PUF Implementation Using Underutilized FPGA Resource2
On Securing Cryptographic ICs against Scan-based Attacks: A Hamming Weight Distribution Perspective2
SHIFT: Selective Hardware Information Flow Tracking Driven by Deterministic Constraints2
Towards Energy-Efficient Spiking Neural Networks: A Robust Hybrid CMOS-Memristive Accelerator2
A Deep Neural Network Accelerator using Residue Arithmetic in a Hybrid Optoelectronic System2
Introduction to the Special Issue on CAD for Security: Pre-silicon Security Sign-off Solutions Through Design Cycle2
Zallocator: A High Throughput Write-Optimized Persistent Allocator for Non-Volatile Memory2
Toward Practical Superconducting Accelerators for Machine Learning Using U-SFQ2
0.027668952941895