ACM Journal on Emerging Technologies in Computing Systems

Papers
(The median citation count of ACM Journal on Emerging Technologies in Computing Systems is 2. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2021-11-01 to 2025-11-01.)
ArticleCitations
STAP: An Architecture and Design Tool for Automata Processing on Memristor TCAMs45
Impedance Leakage Vulnerability and Its Utilization in Reverse-Engineering Embedded Software43
A Persistent Hierarchical Bloom Filter-based Framework for Scalable Authentication and Tracking of ICs34
Breaking On-Chip Communication Anonymity Using Flow Correlation Attacks34
A Golden-Free Unsupervised ML-Assisted Security Approach for Detection of IC Hardware Trojans25
Defending against Adversarial Attacks in Deep Learning with Robust Auxiliary Classifiers Utilizing Bit-plane Slicing25
Low-Rank Gradient Descent for Memory-Efficient Training of Deep In-Memory Arrays24
A Cost-Effective Built-In Self-Test Mechanism for Post-Manufacturing TSV Defects in 3D ICs23
STIFT: A Spatio-Temporal Integrated Folding Tree for Efficient Reductions in Flexible DNN Accelerators23
Sorting in Memristive Memory19
Energy-Efficient Probabilistic Bayesian Neural Networks for Resource-Constrained Environments19
ChaoticImmuneNet: A Chaos-driven Immunity inspired Neural Network paradigm for Embodied Intelligence in Resource-Constrained Devices19
All-spin PUF: An Area-efficient and Reliable PUF Design with Signature Improvement for Spin-transfer Torque Magnetic Cell-based All-spin Circuits18
ANT-UNet: Accurate and Noise-Tolerant Segmentation for Pathology Image Processing16
Technology/System Co-Optimization for FPGA Using Emerging Reconfigurable Logic Device14
NORM: An FPGA-based Non-volatile Memory Emulation Framework for Intermittent Computing14
OpenQL: A Portable Quantum Programming Framework for Quantum Accelerators14
The Bitlet Model: A Parameterized Analytical Model to Compare PIM and CPU Systems14
SkyBridge 2.0: A Fine-grained Vertical 3D-IC Technology for Future ICs14
Secure and Lightweight Authentication Protocol Using PUF for the IoT-based Wireless Sensor Network13
Unsupervised Digit Recognition Using Cosine Similarity In A Neuromemristive Competitive Learning System13
DINOS: Data INspired Oligo Synthesis for DNA Data Storage13
Hardware-accelerated Simulation-based Inference of Stochastic Epidemiology Models for COVID-1911
Design of False Data Injection Attacks in a Cyber-Physical System using Gaussian Distribution11
Introduction to the Special Issue on Monolithic 3D: Technology, Design and Computing Systems Applications Perspectives11
A Fast Object Detection-Based Framework for Via Modeling on PCB X-Ray CT Images10
Characterization of Timing-based Software Side-channel Attacks and Mitigations on Network-on-Chip Hardware10
Image Complexity Guided Network Compression for Biomedical Image Segmentation10
Diverse, Neural Trojan Resilient Ecosystem of Neural Network IP10
A Neoteric Approach for Logic with Embedded Memory Leveraging Crosstalk Computing9
Accelerating On-Chip Training with Ferroelectric-Based Hybrid Precision Synapse9
NN-Lock : A Lightweight Authorization to Prevent IP Threats of Deep Learning Models8
Virtualizing Existing Fluidic Programs8
Analyzing Security Vulnerabilities Induced by High-level Synthesis8
Introduction to the Special Issue on Design Automation for Quantum Computing8
PUF-based Digital Money with Propagation-of-Provenance and Offline Transfers between Two Parties7
HDRLPIM: A Simulator for Hyper-Dimensional Reinforcement Learning Based on Processing In-Memory7
SAT-Based Exact Modulo Scheduling Mapping for Resource-Constrained CGRAs7
SRLL: Improving Security and Reliability with User-Defined Constraint-Aware Logic Locking7
B-open Defect: A Novel Defect Model in FinFET Technology7
Applications and Challenges of AI in PCB X-ray Inspection: A Comprehensive Study7
Reliable Constructions for the Key Generator of Code-based Post-quantum Cryptosystems on FPGA6
Towards Certified Safe Personalization in Learning Enabled Human-in-the-loop Human-in-the-plant Systems6
Fusing In-storage and Near-storage Acceleration of Convolutional Neural Networks6
A Quasi-digital QPSK Modulator Design for Biomedical Devices6
Extreme Partial-Sum Quantization for Analog Computing-In-Memory Neural Network Accelerators6
A Spiking Neuromorphic Architecture Using Gated-RRAM for Associative Memory6
A Novel Highly-Efficient Inexact Full Adder Cell for Motion and Edge Detection Systems of Image Processing in CNFET Technology5
Demonstration of a Scalable DNA Computing Platform: Writing and Selection5
F-Bypass: A Low-Power Network-on-Chip Design Utilizing Bypass to Improve Network Connectivity5
Building an Open Representation for Biological Protocols5
A ReRAM Memory Compiler for Monolithic 3D Integrated Circuits in a Carbon Nanotube Process5
Digital Fault-based Built-in Self-test and Evaluation of Low Dropout Voltage Regulators5
Spiking-NeRF: Spiking Neural Network for Energy-Efficient Neural Rendering5
Towards a Truly Integrated Vector Processing Unit for Memory-bound Applications Based on a Cost-competitive Computational SRAM Design Solution5
Guest Editorial: ACM JETC Special Issue on Hardware-Aware Learning for Medical Applications4
Hardware Trojan Detection Using Unsupervised Deep Learning on Quantum Diamond Microscope Magnetic Field Images4
Photonic Networks-on-Chip Employing Multilevel Signaling: A Cross-Layer Comparative Study4
Guest Editorial: Computation-In-Memory (CIM): from Device to Applications4
Genetic Cache: A Machine Learning Approach to Designing DRAM Cache Controllers in HBM Systems4
AroMa : Evaluating Deep Learning Systems for Stealthy Integrity Attacks on Multi-tenant Accelerators4
Generation of Black-box Audio Adversarial Examples Based on Gradient Approximation and Autoencoders4
Hardware Trojan Detection Potential and Limits with the Quantum Diamond Microscope3
Optimizing 3D U-Net-based Brain Tumor Segmentation with Integer-arithmetic Deep Learning Accelerators3
On Securing Cryptographic ICs against Scan-based Attacks: A Hamming Weight Distribution Perspective3
Direction-aggregated Attack for Transferable Adversarial Examples3
Repercussions of Using DNN Compilers on Edge GPUs for Real Time and Safety Critical Systems: A Quantitative Audit3
Toward the Generation of Test Vectors for the Detection of Hardware Trojan Targeting Effective Switching Activity3
A Genetic-algorithm-based Approach to the Design of DCT Hardware Accelerators3
AccHashtag : Accelerated Hashing for Detecting Fault-Injection Attacks on Embedded Neural Networks3
Introduction to the Special Issue on CAD for Security: Pre-silicon Security Sign-off Solutions Through Design Cycle2
Impact of On-chip Interconnect on In-memory Acceleration of Deep Neural Networks2
Toward Practical Superconducting Accelerators for Machine Learning Using U-SFQ2
SHIFT: Selective Hardware Information Flow Tracking Driven by Deterministic Constraints2
A Deep Neural Network Accelerator using Residue Arithmetic in a Hybrid Optoelectronic System2
Design-time Reference Current Generation for Robust Spintronic-based Neuromorphic Architecture2
Enhancing Blockchain Scalability using Off-Chain and Machine Learning Techniques2
Built-in Self-Test and Fault Localization for Inter-Layer Vias in Monolithic 3D ICs2
Zallocator: A High Throughput Write-Optimized Persistent Allocator for Non-Volatile Memory2
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