ACM Journal on Emerging Technologies in Computing Systems

Papers
(The median citation count of ACM Journal on Emerging Technologies in Computing Systems is 3. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2020-11-01 to 2024-11-01.)
ArticleCitations
A Survey on Silicon Photonics for Deep Learning52
Hardware Trust and Assurance through Reverse Engineering: A Tutorial and Outlook from Image Analysis and Machine Learning Perspectives51
Challenging the Security of Logic Locking Schemes in the Era of Deep Learning: A Neuroevolutionary Approach49
A Side-Channel-Resistant Implementation of SABER37
NxTF: An API and Compiler for Deep Spiking Neural Networks on Intel Loihi30
Defects, Fault Modeling, and Test Development Framework for RRAMs23
Toward Multi-FPGA Acceleration of the Neural Networks22
OpenQL: A Portable Quantum Programming Framework for Quantum Accelerators22
Design and Analysis of FPGA-based PUFs with Enhanced Performance for Hardware-oriented Security18
An Electro-Photonic System for Accelerating Deep Neural Networks18
Dynamic Reliability Management in Neuromorphic Computing17
A Flexible Multichannel EEG Artifact Identification Processor using Depthwise-Separable Convolutional Neural Networks14
Reliable Constructions for the Key Generator of Code-based Post-quantum Cryptosystems on FPGA14
A Survey on Memory-centric Computer Architectures14
EM-X-DL: Efficient Cross-device Deep Learning Side-channel Attack With Noisy EM Signatures14
Machine Learning Vulnerability Analysis of FPGA-based Ring Oscillator PUFs and Counter Measures14
Impact of On-chip Interconnect on In-memory Acceleration of Deep Neural Networks14
The Bitlet Model: A Parameterized Analytical Model to Compare PIM and CPU Systems14
A Genetic-algorithm-based Approach to the Design of DCT Hardware Accelerators12
Automated Generation of Security Assertions for RTL Models12
Guarding Machine Learning Hardware Against Physical Side-channel Attacks12
Sorting in Memristive Memory11
A Voltage-Controlled, Oscillation-Based ADC Design for Computation-in-Memory Architectures Using Emerging ReRAMs11
BPLight-CNN: A Photonics-Based Backpropagation Accelerator for Deep Learning11
A Cost-Efficient Digital ESN Architecture on FPGA for OFDM Symbol Detection11
A Lightweight Architecture for Hardware-Based Security in the Emerging Era of Systems of Systems10
Robust and Attack Resilient Logic Locking with a High Application-Level Impact10
Design of a Robust Memristive Spiking Neuromorphic System with Unsupervised Learning in Hardware10
Hardware Trojan Detection Using Unsupervised Deep Learning on Quantum Diamond Microscope Magnetic Field Images10
CONCEALING-Gate: Optical Contactless Probing Resilient Design10
Analyzing Security Vulnerabilities Induced by High-level Synthesis9
A Review and Comparison of AI-enhanced Side Channel Analysis9
Computational Capacity of Complex Memcapacitive Networks9
Fast Linear Interpolation9
MNEMOSENE: Tile Architecture and Simulator for Memristor-based Computation-in-memory8
Resilient and Secure Hardware Devices Using ASL8
PUF based Secure and Lightweight Authentication and Key-Sharing Scheme for Wireless Sensor Network8
Taming Molecular Field-Coupling for Nanocomputing Design8
ScatterVerif: Verification of Electronic Boards Using Reflection Response of Power Distribution Network8
Fortifying Vehicular Security through Low Overhead Physically Unclonable Functions8
Binary Precision Neural Network Manycore Accelerator7
A Survey Describing Beyond Si Transistors and Exploring Their Implications for Future Processors7
Artificial Intelligence–based Computed Tomography Processing Framework for Surgical Telementoring of Congenital Heart Disease7
Quantization of Deep Neural Networks for Accurate Edge Computing7
A Quality-assured Approximate Hardware Accelerators–based on Machine Learning and Dynamic Partial Reconfiguration7
Time-varying Metamaterial-enabled Directional Modulation Schemes for Physical Layer Security in Wireless Communication Links7
Timing-Optimized Hardware Implementation to Accelerate Polynomial Multiplication in the NTRU Algorithm6
NORM: An FPGA-based Non-volatile Memory Emulation Framework for Intermittent Computing6
Building an Open Representation for Biological Protocols6
Built-in Self-Test and Fault Localization for Inter-Layer Vias in Monolithic 3D ICs6
FPIC: A Novel Semantic Dataset for Optical PCB Assurance6
DTA-PUF: Dynamic Timing-aware Physical Unclonable Function for Resource-constrained Devices6
A Deep Neural Network Accelerator using Residue Arithmetic in a Hybrid Optoelectronic System6
Power-efficient Spike Sorting Scheme Using Analog Spiking Neural Network Classifier6
EVHA: Explainable Vision System for Hardware Testing and Assurance—An Overview5
Temporal State Machines: Using Temporal Memory to Stitch Time-based Graph Computations5
Design Automation and Test Solutions for Monolithic 3D ICs5
Thermal and Performance Efficient On-Chip Surface-Wave Communication for Many-Core Systems in Dark Silicon Era5
Attack Mitigation of Hardware Trojans for Thermal Sensing via Micro-ring Resonator in Optical NoCs5
Extreme Partial-Sum Quantization for Analog Computing-In-Memory Neural Network Accelerators5
Graphene-Based Artificial Synapses with Tunable Plasticity5
AccHashtag : Accelerated Hashing for Detecting Fault-Injection Attacks on Embedded Neural Networks5
Towards a Truly Integrated Vector Processing Unit for Memory-bound Applications Based on a Cost-competitive Computational SRAM Design Solution5
CLU5
Towards Compact Modeling of Noisy Quantum Computers: A Molecular-Spin-Qubit Case of Study5
Direction-aggregated Attack for Transferable Adversarial Examples5
multiPULPly5
Dynamic Behavior Predictions for Fast and Efficient Hybrid STT-MRAM Caches5
Test Points for Online Monitoring of Quantum Circuits4
Improving Deep Learning Networks for Profiled Side-channel Analysis Using Performance Improvement Techniques4
Bridging the Gap between RTL and Software Fault Injection4
NN-Lock : A Lightweight Authorization to Prevent IP Threats of Deep Learning Models4
A Cost-Effective Built-In Self-Test Mechanism for Post-Manufacturing TSV Defects in 3D ICs4
A Reconfigurable Multiplier for Signed Multiplications with Asymmetric Bit-Widths4
Hardware-accelerated Simulation-based Inference of Stochastic Epidemiology Models for COVID-194
STAP: An Architecture and Design Tool for Automata Processing on Memristor TCAMs4
Dynamically Adapting Page Migration Policies Based on Applications’ Memory Access Behaviors4
SILVerIn: Systematic Integrity Verification of Printed Circuit Board Using JTAG Infrastructure4
Image Complexity Guided Network Compression for Biomedical Image Segmentation4
A Novel Highly-Efficient Inexact Full Adder Cell for Motion and Edge Detection Systems of Image Processing in CNFET Technology4
Compressing RNNs to Kilobyte Budget for IoT Devices Using Kronecker Products4
The Uncertainty of Side-channel Analysis: A Way to Leverage from Heuristics4
Victims Can Be Saviors4
Hardware Trojan Horse Detection through Improved Switching of Dormant Nets4
Survey of Approaches and Techniques for Security Verification of Computer Systems3
Silicon-correlated Simulation Methodology of EM Side-channel Leakage Analysis3
Ket Quantum Programming3
Accelerating On-Chip Training with Ferroelectric-Based Hybrid Precision Synapse3
Accelerating Deep Neuroevolution on Distributed FPGAs for Reinforcement Learning Problems3
Improving Barnes-Hut t-SNE Algorithm in Modern GPU Architectures with Random Forest KNN and Simulated Wide-Warp3
Hardware Trojan Attack in Embedded Memory3
A Quasi-digital QPSK Modulator Design for Biomedical Devices3
All-spin PUF: An Area-efficient and Reliable PUF Design with Signature Improvement for Spin-transfer Torque Magnetic Cell-based All-spin Circuits3
SaARSP: An Architecture for Systolic-Array Acceleration of Recurrent Spiking Neural Networks3
A Survey on Machine Learning in Hardware Security3
Eternal-thing 2.0: Analog-Trojan-resilient Ripple-less Solar Harvesting System for Sustainable IoT3
Securing Network-on-chips Against Fault-injection and Crypto-analysis Attacks via Stochastic Anonymous Routing3
Countering Modeling Attacks in PUF-based IoT Security Solutions3
On Securing Cryptographic ICs against Scan-based Attacks: A Hamming Weight Distribution Perspective3
Optimizing 3D U-Net-based Brain Tumor Segmentation with Integer-arithmetic Deep Learning Accelerators3
Power Management of Monolithic 3D Manycore Chips with Inter-tier Process Variations3
Integrated Power Signature Generation Circuit for IoT Abnormality Detection3
Machine Learning Enabled Solutions for Design and Optimization Challenges in Networks-on-Chip based Multi/Many-Core Architectures3
Architecting for Artificial Intelligence with Emerging Nanotechnology3
0.036180973052979