OOIR: Observatory of International Research

Papers

(The TQCC of ACM Transactions on Architecture and Code Optimization is 4. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2020-03-01 to 2024-03-01.)

Article	Citations
SMAUG	31
IR2V EC	28
Domain-Specific Multi-Level IR Rewriting for GPU	22
A RISC-V Simulator and Benchmark Suite for Designing and Evaluating Vector Architectures	21
Grus	18
A Black-box Monitoring Approach to Measure Microservices Runtime Performance	18
Compiler Support for Sparse Tensor Computations in MLIR	17
PERI	17
LLOV	16
ArmorAll	16
Dynamic Precision Autotuning with TAFFO	16
PAVER	15
SLO-Aware Inference Scheduler for Heterogeneous Processors in Edge Platforms	12
A Case For Intra-rack Resource Disaggregation in HPC	12
Optimizing the SSD Burst Buffer by Traffic Detection	11
Inter-kernel Reuse-aware Thread Block Scheduling	11
Vitruvius+: An Area-Efficient RISC-V Decoupled Vector Coprocessor for High Performance Computing Applications	11
Configurable Multi-directional Systolic Array Architecture for Convolutional Neural Networks	11
Efficient Auto-Tuning of Parallel Programs with Interdependent Tuning Parameters via Auto-Tuning Framework (ATF)	10
Exploiting Parallelism Opportunities with Deep Learning Frameworks	10
A Simple Model for Portable and Fast Prediction of Execution Time and Power Consumption of GPU Kernels	10
Dynamic Colocation Policies with Reinforcement Learning	10
OD-SGD	10
A Novel, Highly Integrated Simulator for Parallel and Distributed Systems	9
AsynGraph	9

Marvel: A Data-Centric Approach for Mapping Deep Learning Operators on Spatial Accelerators	9
An Accelerator for Sparse Convolutional Neural Networks Leveraging Systolic General Matrix-matrix Multiplication	9
EchoBay	9
KernelFaRer	9
Gem5-X	9
Securing Branch Predictors with Two-Level Encryption	8
CoMeT: An Integrated Interval Thermal Simulation Toolchain for 2D, 2.5D, and 3D Processor-Memory Systems	8
Schedule Synthesis for Halide Pipelines on GPUs	8
Enabling Highly Efficient Batched Matrix Multiplications on SW26010 Many-core Processor	8
GEVO	8
On the Anatomy of Predictive Models for Accelerating GPU Convolution Kernels and Beyond	8
Performance Evaluation of Intel Optane Memory for Managed Workloads	8
Bayesian Optimization for Efficient Accelerator Synthesis	7
ERASE: Energy Efficient Task Mapping and Resource Management for Work Stealing Runtimes	7
Low I/O Intensity-aware Partial GC Scheduling to Reduce Long-tail Latency in SSDs	7
Architecting Optically Controlled Phase Change Memory	7
GPU Fast Convolution via the Overlap-and-Save Method in Shared Memory	7
PolyDL	7
GRAM	7
Informed Prefetching for Indirect Memory Accesses	6
A Conflict-free Scheduler for High-performance Graph Processing on Multi-pipeline FPGAs	6
Register-Pressure-Aware Instruction Scheduling Using Ant Colony Optimization	6
Task-RM: A Resource Manager for Energy Reduction in Task-Parallel Applications under Quality of Service Constraints	6
PiDRAM: A Holistic End-to-end FPGA-based Framework for Processing-in-DRAM	6
ReuseTracker : Fast Yet Accurate Multicore Reuse Distance Analyzer	6
Polyhedral Specification and Code Generation of Sparse Tensor Contraction with Co-iteration	5
Scale-out Systolic Arrays	5
SIMT-X	5
E-BATCH: Energy-Efficient and High-Throughput RNN Batching	5
Autotuning Convolutions Is Easier Than You Think	5
MC-DeF	5
Energy-efficient In-Memory Address Calculation	5
A Reusable Characterization of the Memory System Behavior of SPEC2017 and SPEC2006	5
Optimizing Small-Sample Disk Fault Detection Based on LSTM-GAN Model	5
Effective Loop Fusion in Polyhedral Compilation Using Fusion Conflict Graphs	5
Cooperative Software-hardware Acceleration of K-means on a Tightly Coupled CPU-FPGA System	5
HeapCheck: Low-cost Hardware Support for Memory Safety	5
Low-precision Logarithmic Number Systems	5
GraphPEG	4
Zeroploit	4
GraphAttack	4
On Architectural Support for Instruction Set Randomization	4
Practical Software-Based Shadow Stacks on x86-64	4
Preserving Addressability Upon GC-Triggered Data Movements on Non-Volatile Memory	4
MemSZ	4
MemHC: An Optimized GPU Memory Management Framework for Accelerating Many-body Correlation	4
Understanding Cache Compression	4
An FPGA-based Approach to Evaluate Thermal and Resource Management Strategies of Many-core Processors	4
FastPath_MP	4
Application-Specific Arithmetic in High-Level Synthesis Tools	4