OOIR: Observatory of International Research

Papers

(The median citation count of ACM Transactions on Architecture and Code Optimization is 1. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2020-03-01 to 2024-03-01.)

Article	Citations
SMAUG	31
IR2V EC	28
Domain-Specific Multi-Level IR Rewriting for GPU	22
A RISC-V Simulator and Benchmark Suite for Designing and Evaluating Vector Architectures	21
A Black-box Monitoring Approach to Measure Microservices Runtime Performance	18
Grus	18
PERI	17
Compiler Support for Sparse Tensor Computations in MLIR	17
Dynamic Precision Autotuning with TAFFO	16
LLOV	16
ArmorAll	16
PAVER	15
SLO-Aware Inference Scheduler for Heterogeneous Processors in Edge Platforms	12
A Case For Intra-rack Resource Disaggregation in HPC	12
Optimizing the SSD Burst Buffer by Traffic Detection	11
Inter-kernel Reuse-aware Thread Block Scheduling	11
Vitruvius+: An Area-Efficient RISC-V Decoupled Vector Coprocessor for High Performance Computing Applications	11
Configurable Multi-directional Systolic Array Architecture for Convolutional Neural Networks	11
Efficient Auto-Tuning of Parallel Programs with Interdependent Tuning Parameters via Auto-Tuning Framework (ATF)	10
Exploiting Parallelism Opportunities with Deep Learning Frameworks	10
A Simple Model for Portable and Fast Prediction of Execution Time and Power Consumption of GPU Kernels	10
Dynamic Colocation Policies with Reinforcement Learning	10
OD-SGD	10
Gem5-X	9
A Novel, Highly Integrated Simulator for Parallel and Distributed Systems	9

AsynGraph	9
Marvel: A Data-Centric Approach for Mapping Deep Learning Operators on Spatial Accelerators	9
An Accelerator for Sparse Convolutional Neural Networks Leveraging Systolic General Matrix-matrix Multiplication	9
EchoBay	9
KernelFaRer	9
GEVO	8
On the Anatomy of Predictive Models for Accelerating GPU Convolution Kernels and Beyond	8
Performance Evaluation of Intel Optane Memory for Managed Workloads	8
Securing Branch Predictors with Two-Level Encryption	8
CoMeT: An Integrated Interval Thermal Simulation Toolchain for 2D, 2.5D, and 3D Processor-Memory Systems	8
Schedule Synthesis for Halide Pipelines on GPUs	8
Enabling Highly Efficient Batched Matrix Multiplications on SW26010 Many-core Processor	8
PolyDL	7
GRAM	7
Bayesian Optimization for Efficient Accelerator Synthesis	7
ERASE: Energy Efficient Task Mapping and Resource Management for Work Stealing Runtimes	7
Low I/O Intensity-aware Partial GC Scheduling to Reduce Long-tail Latency in SSDs	7
Architecting Optically Controlled Phase Change Memory	7
GPU Fast Convolution via the Overlap-and-Save Method in Shared Memory	7
Informed Prefetching for Indirect Memory Accesses	6
A Conflict-free Scheduler for High-performance Graph Processing on Multi-pipeline FPGAs	6
Register-Pressure-Aware Instruction Scheduling Using Ant Colony Optimization	6
Task-RM: A Resource Manager for Energy Reduction in Task-Parallel Applications under Quality of Service Constraints	6
PiDRAM: A Holistic End-to-end FPGA-based Framework for Processing-in-DRAM	6
ReuseTracker : Fast Yet Accurate Multicore Reuse Distance Analyzer	6
HeapCheck: Low-cost Hardware Support for Memory Safety	5
Low-precision Logarithmic Number Systems	5
Polyhedral Specification and Code Generation of Sparse Tensor Contraction with Co-iteration	5
Scale-out Systolic Arrays	5
SIMT-X	5
E-BATCH: Energy-Efficient and High-Throughput RNN Batching	5
Autotuning Convolutions Is Easier Than You Think	5
MC-DeF	5
Energy-efficient In-Memory Address Calculation	5
A Reusable Characterization of the Memory System Behavior of SPEC2017 and SPEC2006	5
Optimizing Small-Sample Disk Fault Detection Based on LSTM-GAN Model	5
Effective Loop Fusion in Polyhedral Compilation Using Fusion Conflict Graphs	5
Cooperative Software-hardware Acceleration of K-means on a Tightly Coupled CPU-FPGA System	5
Understanding Cache Compression	4
An FPGA-based Approach to Evaluate Thermal and Resource Management Strategies of Many-core Processors	4
FastPath_MP	4
Application-Specific Arithmetic in High-Level Synthesis Tools	4
GraphPEG	4
Zeroploit	4
GraphAttack	4
On Architectural Support for Instruction Set Randomization	4
Practical Software-Based Shadow Stacks on x86-64	4
Preserving Addressability Upon GC-Triggered Data Movements on Non-Volatile Memory	4
MemSZ	4
MemHC: An Optimized GPU Memory Management Framework for Accelerating Many-body Correlation	4

Early Address Prediction	3
Gretch	3
CASHT: Contention Analysis in Shared Hierarchies with Thefts	3
Systems-on-Chip with Strong Ordering	3
A Pressure-Aware Policy for Contention Minimization on Multicore Systems	3
LargeGraph	3
Performance and Power Prediction for Concurrent Execution on GPUs	3
SPX64	3
Spiking Neural Networks in Spintronic Computational RAM	3
SecNVM: An Efficient and Write-Friendly Metadata Crash Consistency Scheme for Secure NVM	3
Monolithically Integrating Non-Volatile Main Memory over the Last-Level Cache	3
GPU Domain Specialization via Composable On-Package Architecture	3
Refresh Triggered Computation	3
Just-In-Time Compilation on ARM—A Closer Look at Call-Site Code Consistency	2
On Predictable Reconfigurable System Design	2
Automatic Sublining for Efficient Sparse Memory Accesses	2
RegCPython: A Register-based Python Interpreter for Better Performance	2
ASA: A ccelerating S parse A ccumulation in Column-wise SpGEMM	2
PowerMorph: QoS-Aware Server Power Reshaping for Data Center Regulation Service	2
Low-power Near-data Instruction Execution Leveraging Opcode-based Timing Analysis	2
DisGCo	2
Unified Buffer: Compiling Image Processing and Machine Learning Applications to Push-Memory Accelerators	2
YaConv: Convolution with Low Cache Footprint	2
Cryptographic Software IP Protection without Compromising Performance or Timing Side-channel Leakage	2
An FPGA Overlay for CNN Inference with Fine-grained Flexible Parallelism	2
PICO	2
ECO TLB	2
NNBench-X	2
User-driven Online Kernel Fusion for SYCL	2
GiantVM: A Novel Distributed Hypervisor for Resource Aggregation with DSM-aware Optimizations	2
SortCache	2
Memory-Aware Functional IR for Higher-Level Synthesis of Accelerators	2
Leveraging Value Equality Prediction for Value Speculation	2
COX : Exposing CUDA Warp-level Functions to CPUs	2
Network Interface Architecture for Remote Indirect Memory Access (RIMA) in Datacenters	2
Irregular Register Allocation for Translation of Test-pattern Programs	2
Locality-Aware CTA Scheduling for Gaming Applications	2
FlexHM: A Practical System for Heterogeneous Memory with Flexible and Efficient Performance Optimizations	2
A Model-Based Software Solution for Simultaneous Multiple Kernels on GPUs	2
MetaSys: A Practical Open-source Metadata Management System to Implement and Evaluate Cross-layer Optimizations	2
Scenario-Aware Program Specialization for Timing Predictability	2
A Fast and Flexible FPGA-based Accelerator for Natural Language Processing Neural Networks	2
Triangle Dropping: An Occluded-geometry Predictor for Energy-efficient Mobile GPUs	2
Design and Evaluation of an Ultra Low-power Human-quality Speech Recognition System	2
WaFFLe	2
A Distributed Hardware Monitoring System for Runtime Verification on Multi-Tile MPSoCs	1
Hierarchical Model Parallelism for Optimizing Inference on Many-core Processor via Decoupled 3D-CNN Structure	1
SHASTA	1
An Application-oblivious Memory Scheduling System for DNN Accelerators	1
Design and Implementation for Nonblocking Execution in GraphBLAS: Tradeoffs and Performance	1
SMT-Based Contention-Free Task Mapping and Scheduling on 2D/3D SMART NoC with Mixed Dimension-Order Routing	1
Efficient Nearest-Neighbor Data Sharing in GPUs	1
MAPPER: Managing Application Performance via Parallel Efficiency Regulation	1
Advancing Direct Convolution Using Convolution Slicing Optimization and ISA Extensions	1
Reliability-aware Garbage Collection for Hybrid HBM-DRAM Memories	1
Towards Enhanced System Efficiency while Mitigating Row Hammer	1
Online Application Guidance for Heterogeneous Memory Systems	1
Building a Fast and Efficient LSM-tree Store by Integrating Local Storage with Cloud Storage	1
Accelerating Convolutional Neural Network by Exploiting Sparsity on GPUs	1
Reliability Analysis for Unreliable FSM Computations	1
SG ^XL	1
Iterative Compilation Optimization Based on Metric Learning and Collaborative Filtering	1
FPD etect	1
FASA-DRAM: Reducing DRAM Latency with Destructive Activation and Delayed Restoration	1
TokenSmart: Distributed, Scalable Power Management in the Many-core Era	1
ACTION: Adaptive Cache Block Migration in Distributed Cache Architectures	1
At the Locus of Performance: Quantifying the Effects of Copious 3D-Stacked Cache on HPC Workloads	1
Accelerating Video Captioning on Heterogeneous System Architectures	1
Source Matching and Rewriting for MLIR Using String-Based Automata	1
SpecTerminator: Blocking Speculative Side Channels Based on Instruction Classes on RISC-V	1
Delay-on-Squash: Stopping Microarchitectural Replay Attacks in Their Tracks	1
Performance-Energy Trade-off in Modern CMPs	1
PETRA	1
PRISM	1
Improving Memory Efficiency in Heterogeneous MPSoCs through Row-Buffer Locality-aware Forwarding	1
CIB-HIER	1
Cooperative Slack Management: Saving Energy of Multicore Processors by Trading Performance Slack Between QoS-Constrained Applications	1
Runtime Design Space Exploration and Mapping of DCNNs for the Ultra-Low-Power Orlando SoC	1
Reducing Minor Page Fault Overheads through Enhanced Page Walker	1