ACM Transactions on Architecture and Code Optimization

Papers
(The H4-Index of ACM Transactions on Architecture and Code Optimization is 14. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2021-04-01 to 2025-04-01.)
ArticleCitations
Sniper: Exploiting Spatial and Temporal Sampling for Large-Scale Performance Analysis35
TransCL: An Automatic CUDA-to-OpenCL Programs Transformation Framework30
SMT-Based Contention-Free Task Mapping and Scheduling on 2D/3D SMART NoC with Mixed Dimension-Order Routing29
SRSparse: Generating Codes for High-Performance Sparse Matrix-Vector Semiring Computations29
VersaTile: Flexible Tiled Architectures via Associative Processors28
Ceiba: An Efficient and Scalable DNN Scheduler for Spatial Accelerators25
MemoriaNova: Optimizing Memory-Aware Model Inference for Edge Computing23
MasterPlan: A Reinforcement Learning Based Scheduler for Archive Storage21
Performance Evaluation of Intel Optane Memory for Managed Workloads16
An Intelligent Scheduling Approach on Mobile OS for Optimizing UI Smoothness and Power16
Mapi-Pro: An Energy Efficient Memory Mapping Technique for Intermittent Computing15
ASM: An Adaptive Secure Multicore for Co-located Mutually Distrusting Processes15
PIMSAB: A Processing-In-Memory System with Spatially-Aware Communication and Bit-Serial-Aware Computation15
MemHC: An Optimized GPU Memory Management Framework for Accelerating Many-body Correlation14
Multiply-and-Fire: An Event-Driven Sparse Neural Network Accelerator14
D 2 Comp: Efficient Offload of LSM-tree Compaction with Data Processing Units on Disaggregated Storage14
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