ACM Transactions on Embedded Computing Systems

Article	Citations
Model-based Toolchain for Core Flight System (cFS) Embedded Systems	98
REC: REtime Convolutional Layers to Fully Exploit Harvested Energy for ReRAM-based CNN Accelerators	83
FLASH: Deadline-Aware Flexible LLC Arbitration and Scheduling for Hardware Accelerators	76
Optimizing AES-GCM on 32-Bit ARM Cortex-M4 Microcontrollers: Fixslicing and FACE-Based Approach	74
Directed Real-time Linux Fuzzing with Configuration Awareness	73
Contention Grading and Adaptive Model Selection for Machine Vision in Embedded Systems	72
A Novel Lattice-Based Fault Injection Attack Targeting the Nonce in the SM2 Digital Signature Algorithm	67
A Design of Network Reconfigurable Universal CNN Accelerator Based on FPGA	65
SideDRAM: Integrating SoftSIMD Datapaths near DRAM Banks for Energy-Efficient Variable Precision Computation	61
Energy-Efficient LLM-Based Decompilation via a Two-Stage Pipeline on Constrained Hardware	55
A Unified Programmable Edge Matrix Processor for Deep Neural Networks and Matrix Algebra	55
Using Learning with Rounding to Instantiate Post-Quantum Cryptographic Algorithms	45
ViT4Mal: Lightweight Vision Transformer for Malware Detection on Edge Devices	44
CapDYN : Adaptive Self-Scaling Energy Storage for Powering Batteryless IoT	41
Formal Synthesis of Neural Barrier Certificates for Continuous Systems via Counterexample Guided Learning	41
Graph Transformations for Memory Peak Minimization by Scheduling	40
A Comprehensive Survey on Deep Learning-based Predictive Maintenance	40
WasmAndroid: A Cross-Platform Runtime for Native Programming Languages on Android	37
SENTRY: Protecting System-on-Chip Designs against Supply-Chain Attacks	37
PolyARBerNN: A Neural Network Guided Solver and Optimizer for Bounded Polynomial Inequalities	36
Neural Abstraction-Based Controller Synthesis and Deployment	35
A Self-Sustained CPS Design for Reliable Wildfire Monitoring	34
More Is Less: Model Augmentation for Intermittent Deep Inference	31
IoV-Fog-Assisted Framework for Accident Detection and Classification	31
Large or Small: Harnessing the Erase Duality of Emerging Bit-Alterable NAND Flash to Suppress Tail Latency	31

SHiELD: Functional Obfuscation of DSP Cores Using HLS Based One-Way Random Function and Reconfigurable Composite Switching Obfuscation Cells	30
VoxDepth : Rectification of Depth Images on Edge Devices	29
TAFP-ViT: A Transformer Accelerator via QKV Computational Fusion and Adaptive Pruning for Vision Transformer	29
Distributed Task Offloading and Resource Purchasing in NOMA-Enabled Mobile Edge Computing: Hierarchical Game Theoretical Approaches	27
Enhancing the Energy Efficiency and Robustness of tinyML Computer Vision Using Coarsely-quantized Log-gradient Input Images	25
Transformative Energy-Efficient Edge-Optimised Multimodal Deep Learning Framework for Pest Management and Severity Analysis in Tea Plants	24
DyCo: Dynamic, Contextualized AI Models	24
Kryptonite: Worst-Case Program Interference Estimation on Multi-Core Embedded Systems	24
Automatic Generation of Resource and Accuracy Configurable Processing Elements	24
Deep Learning Based Side-Channel Attack on Polynomial Multiplication in Post-Quantum Cryptography	24
Formal Modeling of Hybrid System Based on Semi-continuous Colored Petri Net: A Case Study of Adaptive Cruise Control System	24
Star-Set Based Efficient Reachable Set Computation of Anytime Sensing-Based Neural Network-Controlled Dynamical Systems	23
DynHaMo: Dynamic Hardware-Based Monitoring Dedicated to Attacks Detection	23
Scalable Binary Neural Network Applications in Oblivious Inference	22
Unleashing Cross-Domain Potential: Side-Channel Analysis with Autoencoder for Domain Adaptation	22
Automatic Generation of Fast and Accurate Performance Models for Deep Neural Network Accelerators	22
CADAS: Communication-Aware Dynamic Scheduler on CGRAs for Large-Volume and Real-Time Processing	22
Unlocking the Full Potential of Dual-Interface SSDs: A Comprehensive Hardware and Software Perspective	22
RVV-Morpher: A Semantic-Aware Static Binary Rewriter for Cross-Version Portability in RVV	20
Formally Verified Loop-Invariant Code Motion and Assorted Optimizations	20
Towards Building Verifiable CPS using Lingua Franca	20
Reg-Tune: A Regression-Focused Fine-Tuning Approach for Profiling Low Energy Consumption and Latency	20
An Efficient and Flexible Stochastic CGRA Mapping Approach	19
Mining Hyperproperties using Temporal Logics	19
FSIMR: File-system-aware Data Management for Interlaced Magnetic Recording	18
Performance Modeling of Computer Vision-based CNN on Edge GPUs	18
DHF: A Generative AI Approach to Data-Efficient Signal Separation for Wearable Embedded Systems	18
RPFF-PA : Reliable and Parallel Fault-tolerant Framework for Path Latency Reduction Deployed in Register Arrays	17
Evolution Function Based Reach-Avoid Verification for Time-varying Systems with Disturbances	17
Early DSE and Automatic Generation of Coarse-grained Merged Accelerators	17
CARIn: Constraint-Aware and Responsive Inference on Heterogeneous Devices for Single- and Multi-DNN Workloads	17
Improving Worst-case TSN Communication Times of Large Sensor Data Samples by Exploiting Synchronization	17
Securing Pacemakers Using Runtime Monitors over Physiological Signals	17
Specifying and Compiling Scalable Networks of Actors for Software and Hardware Platforms	16
Reaction Latency Analysis of Message Synchronization in Edge-assisted Autonomous Driving	16
Boosting Cryptographic ICs’ Side-Channel Resistance: A Formal Framework for Automatic Identification and Protection of Leaky Paths	16
EXPRESS: A Framework for Execution Time Prediction of Concurrent CNNs on Xilinx DPU Accelerator	16
SecuPilot: A Security Coprocessor-Integrated Platform for Autonomous UAV Security	16
BASS: Safe Deep Tissue Optical Sensing for Wearable Embedded Systems	15
Robustness in TinyML: A Systematic Literature Review	15
System Scenario-Based Design of the Last-Level Cache in Advanced Interconnect-Dominant Technology Nodes	15
Supervisory Control for Dynamic Feature Configuration in Product Lines	15
FC-GPU: Feedback Control GPU Scheduling for Real-time Embedded Systems	15
DTRL: Decision Tree-based Multi-Objective Reinforcement Learning for Runtime Task Scheduling in Domain-Specific System-on-Chips	14
PEak: A Single Source of Truth for Hardware Design and Verification	14
A Write-Related and Read-Related DRAM Allocation Strategy Inside Solid-State Drives (SSDs)	14
Multi-Compression Scale DNN Inference Acceleration based on Cloud-Edge-End Collaboration	14
AVB-Aware Optimized Routing and Scheduling of Time-Triggered Traffic in Time-Sensitive Networks	14
Criticality-aware Monitoring and Orchestration for Containerized Industry 4.0 Environments	14
Federated Self-training for Semi-supervised Audio Recognition	14

Optimus: An Operator Fusion Framework for Deep Neural Networks	14
Leveraging Computational Storage for Power-Efficient Distributed Data Analytics	13
WARM-tree: Making Quadtrees Write-efficient and Space-economic on Persistent Memories	13
A Hierarchical Classification Method for High-accuracy Instruction Disassembly with Near-field EM Measurements	13
Middleware for Distributed Applications in a LoRa Mesh Network	13
CIMFlow: Modelling Dataflow in Cross-Layer Compute-in-Memory Deep Learning Accelerators	13
Elements of Timed Pattern Matching	12
Coarse-Grained Task Parallelization by Dynamic Profiling for Heterogeneous SoC-Based Embedded System	12
Analog In-memory Circuit Design of Polynomial Multiplication for Lattice Cipher Acceleration Application	12
Introduction to the Special Issue on Accelerating AI on the Edge – Part 1	12
Cache Abstraction for Data Race Detection in Heterogeneous Systems with Non-coherent Accelerators	12
Efficient and Robust Edge AI: Software, Hardware, and the Co-design	11
AdaTest: Reinforcement Learning and Adaptive Sampling for On-chip Hardware Trojan Detection	11
DOCTOR: A Multi-Disease Detection Continual Learning Framework Based on Wearable Medical Sensors	11
Global Scheduling of Weakly-Hard Real-Time Tasks using Job-Level Priority Classes	11
A Robust and Energy Efficient Hyperdimensional Computing System for Voltage-scaled Circuits	11
XimSwap: Many-to-Many Face Swapping for TinyML	11
ZIP-CNN: Design Space Exploration for CNN Implementation within a MCU	11
A Highly Hardware Efficient ML-KEM Accelerator with Optimised Architectural Layers	11
VADF: V ersatile A pproximate D ata F ormats for Energy-Efficient Computing	10
A Predictable QoS-aware Memory Request Scheduler for Soft Real-time Systems	10
Probabilistic Reaction Time Analysis	10
Enhancing Deadline Miss Early Detection for DAG Tasks with Variable Probabilistic Thresholds	10
Faster Implementation of Ideal Lattice-Based Cryptography Using AVX512	10
DiGiT: A Diffusion-based Modular Geophysical Toolkit for On-device Multi-modal Data Generation	10
CABARRE: Request Response Arbitration for Shared Cache Management	10
Virtualizing a Post-Moore’s Law Analog Mesh Processor: The Case of a Photonic PDE Accelerator	10
DynO: Dynamic Onloading of Deep Neural Networks from Cloud to Device	10
TreeHouse: An MLIR-based Compilation Flow for Real-Time Tree-based Inference	10
Latency-Aware Pruning and Quantization of Self-Supervised Speech Transformers for Edge Devices	10
Application-Level Evaluation of IEEE 802.1AS Synchronized Time and Linux for Distributed Real-Time Systems	10
Fast Loosely-Timed Deep Neural Network Models with Accurate Memory Contention	10
Tutorial: A Novel Runtime Environment for Accelerator-Rich Heterogeneous Architectures	10
A Load-Balanced Collaborative Repair Algorithm for Single-Disk Failures in Erasure Coded Storage Systems	10
Challenges and Opportunities of Security-Aware EDA	9
An Intermediate-Centric Dataflow for Transposed Convolution Acceleration on FPGA	9
Domain-Specific Architectures: Research Problems and Promising Approaches	9
TAB: Unified and Optimized Ternary, Binary, and Mixed-precision Neural Network Inference on the Edge	9
Power Side-channel Attack Resistant Circuit Designs of ARX Ciphers Using High-level Synthesis	9
Introduction to the Special Issue on Domain-Specific System-on-Chip Architectures and Run-Time Management Techniques	9
Selective Subarray Isolation for Mitigating RowHammer Attack	9
Toward Optimal Softcore Carry-aware Approximate Multipliers on Xilinx FPGAs	9
HDLRuby: A Ruby Extension for Hardware Description and Its Translation to Synthesizable Verilog HDL	9
RegKey: A Register-based Implementation of ECC Signature Algorithms Against One-shot Memory Disclosure	9
SHARP: An Adaptable, Energy-Efficient Accelerator for Recurrent Neural Networks	9
Optimal Control for Industrial Multi-Component CPS via Path-Encoding-Based Joint Optimization	9
RTPL: A Real-Time Communication Protocol for LoRa Network	9
Hierarchical Resource Orchestration Framework for Real-time Containers	9
Wireless Perceptual Space Modeling Method for Cross-Domain Human Activity Recognition	9
Florets for Chiplets: Data Flow-aware High-Performance and Energy-efficient Network-on-Interposer for CNN Inference Tasks	9
A Comprehensive Analysis of DOMREP-II with Respect to SCA-NFA	8
????????????????????????: Utilizing Hyperdimensional Computing for a More Robust and Efficient Machine Learning System	8
Analysis of EM Fault Injection on Bit-sliced Number Theoretic Transform Software in Dilithium	8
Design Flow for Scheduling Spiking Deep Convolutional Neural Networks on Heterogeneous Neuromorphic System-on-chip	8
Code Generation for Neural Networks Based on Fixed-point Arithmetic	8
Dataflow Driven Partitioning of Machine Learning Applications for Optimal Energy Use in Batteryless Systems	8
GINA: Exploiting Graph Neural Network Layer Features for Energy Efficient Inferencing in NVM-based PIM Accelerators	8
FT-DAG: An Efficient Full-Topology DAG Generator with Controllable Parameters	8
A Tree-Shaped Tableau for Checking the Satisfiability of Signal Temporal Logic with Bounded Temporal Operators	8
Designing High-Performance and Thermally Feasible Multi-Chiplet Architectures Enabled by Non-Bendable Glass Interposer	8
COBRRA: COntention-aware cache Bypass with Request-Response Arbitration	8
Register Blocking: A Source-to-Source Analytical Modelling Approach for Affine Loop Kernels	8
A Compact and Parallel Swap-Based Shuffler Based on Butterfly Network and Its Complexity Against Side Channel Analysis	8
A Survey of Cloud-Edge Collaborative Scheduling Strategies for Cyber-Physical Production Systems	8
Rectifying Skewed Kernel Page Reclamation in Mobile Devices for Improving User-Perceivable Latency	8
Lightweight Champions of the World: Side-Channel Resistant Open Hardware for Finalists in the NIST Lightweight Cryptography Standardization Process	8
Robust Embedded Autonomous Driving Positioning System Fusing LiDAR and Inertial Sensors	8
An Investigation on Hardware-Aware Vision Transformer Scaling	8
TimelyNet: Adaptive Neural Architecture for Autonomous Driving with Dynamic Deadline	8
Regular Composite Resource Partitioning and Reconfiguration in Open Systems	8
ASTRA: A Stochastic Transformer Neural Network Accelerator with Silicon Photonics	7
High-Level Approaches to Hardware Security: A Tutorial	7
SentinelEdge: An Attention-Based Defense for Real-Time Mitigation of Adversarial Thermal Manipulations in System-on-Chips	7
SPHINCSLET: An Area-Efficient Accelerator for the Full SPHINCS+ Digital Signature Algorithm	7
HeterogeneousRTOS: A CPU-FPGA Real-Time OS for Fault Tolerance on COTS at Near-Zero Timing Cost	7
Combining Weight Approximation, Sharing and Retraining for Neural Network Model Compression	7
RIMMS: Runtime Integrated Memory Management System for Heterogeneous Computing	7
Optimal Checkpointing Strategy for Real-time Systems with Both Logical and Timing Correctness	7
Virtual Environment Model Generation for CPS Goal Verification using Imitation Learning	7
Let Coarse-Grained Resources Be Shared: Mapping Entire Neural Networks on FPGAs	7

DaCapo: An On-Device Learning Scheme for Memory-Constrained Embedded Systems	7
CrossTalk : Making Low-Latency Fault Tolerance Cheap by Exploiting Redundant Networks	7
Introduction to the Special Issue on Specification and Design Languages	7
AHPS: Improving Memory Access Performance via Adaptive Huge Page Splitting in Tiered Memory Systems	7
Software Optimization and Design Methodology for Low Power Computer Vision Systems	7
Efficient Addition-Based Sparse GEMM for Fast Ternary Large Language Model Inference on Edge Devices	7
HSPA: High-Throughput Sparse Polynomial Multiplication for Code-based Post-Quantum Cryptography	7
Improving Robustness in IoT Malware Detection through Execution Order Analysis	7
MaGrIP: Magnitude and Gradient-Informed Pruning for Task-Agnostic Large Language Models	7