ACM Transactions on Embedded Computing Systems

Papers
(The TQCC of ACM Transactions on Embedded Computing Systems is 6. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2021-11-01 to 2025-11-01.)
ArticleCitations
A Novel Lattice-Based Fault Injection Attack Targeting the Nonce in the SM2 Digital Signature Algorithm72
REC: REtime Convolutional Layers to Fully Exploit Harvested Energy for ReRAM-based CNN Accelerators56
Model-based Toolchain for Core Flight System (cFS) Embedded Systems56
SideDRAM: Integrating SoftSIMD Datapaths near DRAM Banks for Energy-Efficient Variable Precision Computation53
Formal Synthesis of Neural Barrier Certificates for Continuous Systems via Counterexample Guided Learning53
Introduction to the Special Issue on Memory and Storage Systems for Embedded and IoT Applications51
A Comprehensive Survey on Deep Learning-based Predictive Maintenance50
CapDYN : Adaptive Self-Scaling Energy Storage for Powering Batteryless IoT48
ViT4Mal: Lightweight Vision Transformer for Malware Detection on Edge Devices43
Contention Grading and Adaptive Model Selection for Machine Vision in Embedded Systems41
A Unified Programmable Edge Matrix Processor for Deep Neural Networks and Matrix Algebra41
FLASH: Deadline-Aware Flexible LLC Arbitration and Scheduling for Hardware Accelerators40
Optimizing AES-GCM on 32-Bit ARM Cortex-M4 Microcontrollers: Fixslicing and FACE-Based Approach39
Holistic Resource Allocation Under Federated Scheduling for Parallel Real-time Tasks37
TAFP-ViT: A Transformer Accelerator via QKV Computational Fusion and Adaptive Pruning for Vision Transformer34
WasmAndroid: A Cross-Platform Runtime for Native Programming Languages on Android31
Graph Transformations for Memory Peak Minimization by Scheduling31
Neural Abstraction-Based Controller Synthesis and Deployment30
A Self-Sustained CPS Design for Reliable Wildfire Monitoring29
PolyARBerNN: A Neural Network Guided Solver and Optimizer for Bounded Polynomial Inequalities29
Large or Small: Harnessing the Erase Duality of Emerging Bit-Alterable NAND Flash to Suppress Tail Latency28
IoV-Fog-Assisted Framework for Accident Detection and Classification25
More Is Less: Model Augmentation for Intermittent Deep Inference24
VoxDepth : Rectification of Depth Images on Edge Devices24
Distributed Task Offloading and Resource Purchasing in NOMA-Enabled Mobile Edge Computing: Hierarchical Game Theoretical Approaches23
FSIMR: File-system-aware Data Management for Interlaced Magnetic Recording22
Reg-Tune: A Regression-Focused Fine-Tuning Approach for Profiling Low Energy Consumption and Latency22
Securing Pacemakers Using Runtime Monitors over Physiological Signals22
Towards Building Verifiable CPS using Lingua Franca21
Kryptonite: Worst-Case Program Interference Estimation on Multi-Core Embedded Systems21
Scalable Binary Neural Network Applications in Oblivious Inference21
An Efficient and Flexible Stochastic CGRA Mapping Approach19
Unlocking the Full Potential of Dual-Interface SSDs: A Comprehensive Hardware and Software Perspective19
Formally Verified Loop-Invariant Code Motion and Assorted Optimizations19
Formal Modeling of Hybrid System Based on Semi-continuous Colored Petri Net: A Case Study of Adaptive Cruise Control System18
Automatic Generation of Resource and Accuracy Configurable Processing Elements18
DyCo: Dynamic, Contextualized AI Models18
Mining Hyperproperties using Temporal Logics18
Enhancing the Energy Efficiency and Robustness of tinyML Computer Vision Using Coarsely-quantized Log-gradient Input Images17
Performance Modeling of Computer Vision-based CNN on Edge GPUs17
IoT-Fog-Cloud Centric Earthquake Monitoring and Prediction17
Star-Set Based Efficient Reachable Set Computation of Anytime Sensing-Based Neural Network-Controlled Dynamical Systems16
DynHaMo: Dynamic Hardware-Based Monitoring Dedicated to Attacks Detection16
Supervisory Control for Dynamic Feature Configuration in Product Lines15
Automatic Generation of Fast and Accurate Performance Models for Deep Neural Network Accelerators15
CARIn: Constraint-Aware and Responsive Inference on Heterogeneous Devices for Single- and Multi-DNN Workloads15
BASS: Safe Deep Tissue Optical Sensing for Wearable Embedded Systems15
EXPRESS: A Framework for Execution Time Prediction of Concurrent CNNs on Xilinx DPU Accelerator15
Optimus: An Operator Fusion Framework for Deep Neural Networks15
Middleware for Distributed Applications in a LoRa Mesh Network14
RPFF-PA : Reliable and Parallel Fault-tolerant Framework for Path Latency Reduction Deployed in Register Arrays14
PEak: A Single Source of Truth for Hardware Design and Verification14
Boosting Cryptographic ICs’ Side-Channel Resistance: A Formal Framework for Automatic Identification and Protection of Leaky Paths14
Evolution Function Based Reach-Avoid Verification for Time-varying Systems with Disturbances14
Reaction Latency Analysis of Message Synchronization in Edge-assisted Autonomous Driving14
FC-GPU: Feedback Control GPU Scheduling for Real-time Embedded Systems14
Software-Managed Read and Write Wear-Leveling for Non-Volatile Main Memory13
DTRL: Decision Tree-based Multi-Objective Reinforcement Learning for Runtime Task Scheduling in Domain-Specific System-on-Chips13
Improving Worst-case TSN Communication Times of Large Sensor Data Samples by Exploiting Synchronization13
Multi-Compression Scale DNN Inference Acceleration based on Cloud-Edge-End Collaboration13
Early DSE and Automatic Generation of Coarse-grained Merged Accelerators12
Criticality-aware Monitoring and Orchestration for Containerized Industry 4.0 Environments12
A Write-Related and Read-Related DRAM Allocation Strategy Inside Solid-State Drives (SSDs)12
System Scenario-Based Design of the Last-Level Cache in Advanced Interconnect-Dominant Technology Nodes12
SecuPilot: A Security Coprocessor-Integrated Platform for Autonomous UAV Security12
WARM-tree: Making Quadtrees Write-efficient and Space-economic on Persistent Memories11
CIMFlow: Modelling Dataflow in Cross-Layer Compute-in-Memory Deep Learning Accelerators11
Leveraging Computational Storage for Power-Efficient Distributed Data Analytics11
AdaTest: Reinforcement Learning and Adaptive Sampling for On-chip Hardware Trojan Detection11
A Highly Hardware Efficient ML-KEM Accelerator with Optimised Architectural Layers11
Latency-Aware Pruning and Quantization of Self-Supervised Speech Transformers for Edge Devices11
Federated Self-training for Semi-supervised Audio Recognition11
A Hierarchical Classification Method for High-accuracy Instruction Disassembly with Near-field EM Measurements11
Introduction to the Special Issue on Accelerating AI on the Edge – Part 111
Cache Abstraction for Data Race Detection in Heterogeneous Systems with Non-coherent Accelerators10
An Energy-Efficient DRAM Cache Architecture for Mobile Platforms With PCM-Based Main Memory10
Elements of Timed Pattern Matching10
Telomere: Real-Time NAND Flash Storage10
Analog In-memory Circuit Design of Polynomial Multiplication for Lattice Cipher Acceleration Application10
A Robust and Energy Efficient Hyperdimensional Computing System for Voltage-scaled Circuits10
ZIP-CNN: Design Space Exploration for CNN Implementation within a MCU10
XimSwap: Many-to-Many Face Swapping for TinyML10
Coarse-Grained Task Parallelization by Dynamic Profiling for Heterogeneous SoC-Based Embedded System10
Efficient and Robust Edge AI: Software, Hardware, and the Co-design9
HDLRuby: A Ruby Extension for Hardware Description and Its Translation to Synthesizable Verilog HDL9
Virtualizing a Post-Moore’s Law Analog Mesh Processor: The Case of a Photonic PDE Accelerator9
Application-Level Evaluation of IEEE 802.1AS Synchronized Time and Linux for Distributed Real-Time Systems9
Probabilistic Reaction Time Analysis9
A Predictable QoS-aware Memory Request Scheduler for Soft Real-time Systems9
Hierarchical Resource Orchestration Framework for Real-time Containers9
Toward Optimal Softcore Carry-aware Approximate Multipliers on Xilinx FPGAs9
DOCTOR: A Multi-Disease Detection Continual Learning Framework Based on Wearable Medical Sensors9
Store-n-Learn: Classification and Clustering with Hyperdimensional Computing across Flash Hierarchy9
TAB: Unified and Optimized Ternary, Binary, and Mixed-precision Neural Network Inference on the Edge9
Wireless Perceptual Space Modeling Method for Cross-Domain Human Activity Recognition9
RTPL: A Real-Time Communication Protocol for LoRa Network9
A Load-Balanced Collaborative Repair Algorithm for Single-Disk Failures in Erasure Coded Storage Systems8
An Efficient CNN Accelerator for Low-Cost Edge Systems8
CABARRE: Request Response Arbitration for Shared Cache Management8
Florets for Chiplets: Data Flow-aware High-Performance and Energy-efficient Network-on-Interposer for CNN Inference Tasks8
Tutorial: A Novel Runtime Environment for Accelerator-Rich Heterogeneous Architectures8
Fast Loosely-Timed Deep Neural Network Models with Accurate Memory Contention8
VADF: V ersatile A pproximate D ata F ormats for Energy-Efficient Computing8
TreeHouse: An MLIR-based Compilation Flow for Real-Time Tree-based Inference8
RegKey: A Register-based Implementation of ECC Signature Algorithms Against One-shot Memory Disclosure8
Faster Implementation of Ideal Lattice-Based Cryptography Using AVX5128
DynO: Dynamic Onloading of Deep Neural Networks from Cloud to Device8
Domain-Specific Architectures: Research Problems and Promising Approaches7
Verifying Stochastic Hybrid Systems with Temporal Logic Specifications via Model Reduction7
An Intermediate-Centric Dataflow for Transposed Convolution Acceleration on FPGA7
Rectifying Skewed Kernel Page Reclamation in Mobile Devices for Improving User-Perceivable Latency7
FT-DAG: An Efficient Full-Topology DAG Generator with Controllable Parameters7
A Tree-Shaped Tableau for Checking the Satisfiability of Signal Temporal Logic with Bounded Temporal Operators7
Power Side-channel Attack Resistant Circuit Designs of ARX Ciphers Using High-level Synthesis7
Challenges and Opportunities of Security-Aware EDA7
Optimal Control for Industrial Multi-Component CPS via Path-Encoding-Based Joint Optimization7
Lightweight Champions of the World: Side-Channel Resistant Open Hardware for Finalists in the NIST Lightweight Cryptography Standardization Process7
Designing High-Performance and Thermally Feasible Multi-Chiplet Architectures Enabled by Non-Bendable Glass Interposer7
????????????????????????: Utilizing Hyperdimensional Computing for a More Robust and Efficient Machine Learning System7
Introduction to the Special Issue on Domain-Specific System-on-Chip Architectures and Run-Time Management Techniques7
Dataflow Driven Partitioning of Machine Learning Applications for Optimal Energy Use in Batteryless Systems7
Analysis of EM Fault Injection on Bit-sliced Number Theoretic Transform Software in Dilithium7
Selective Subarray Isolation for Mitigating RowHammer Attack7
Robust Embedded Autonomous Driving Positioning System Fusing LiDAR and Inertial Sensors7
SHARP: An Adaptable, Energy-Efficient Accelerator for Recurrent Neural Networks7
CORIDOR: Using CO herence and Tempo R al Local I ty to Mitigate Read D isurb6
Improving Robustness in IoT Malware Detection through Execution Order Analysis6
Attack-resilient Fusion of Sensor Data with Uncertain Delays6
COBRRA: COntention-aware cache Bypass with Request-Response Arbitration6
High-Level Approaches to Hardware Security: A Tutorial6
A Compact and Parallel Swap-Based Shuffler Based on Butterfly Network and Its Complexity Against Side Channel Analysis6
SPHINCSLET: An Area-Efficient Accelerator for the Full SPHINCS+ Digital Signature Algorithm6
TimelyNet: Adaptive Neural Architecture for Autonomous Driving with Dynamic Deadline6
HeterogeneousRTOS: A CPU-FPGA Real-Time OS for Fault Tolerance on COTS at Near-Zero Timing Cost6
Benchmarking and Configuring Security Levels in Intermittent Computing6
Verified Compilation of Synchronous Dataflow with State Machines6
Combining Weight Approximation, Sharing and Retraining for Neural Network Model Compression6
An Investigation on Hardware-Aware Vision Transformer Scaling6
Code Generation for Neural Networks Based on Fixed-point Arithmetic6
HSPA: High-Throughput Sparse Polynomial Multiplication for Code-based Post-Quantum Cryptography6
Design Flow for Scheduling Spiking Deep Convolutional Neural Networks on Heterogeneous Neuromorphic System-on-chip6
Register Blocking: A Source-to-Source Analytical Modelling Approach for Affine Loop Kernels6
Virtual Environment Model Generation for CPS Goal Verification using Imitation Learning6
MaGrIP: Magnitude and Gradient-Informed Pruning for Task-Agnostic Large Language Models6
Software Optimization and Design Methodology for Low Power Computer Vision Systems6
GINA: Exploiting Graph Neural Network Layer Features for Energy Efficient Inferencing in NVM-based PIM Accelerators6
Let Coarse-Grained Resources Be Shared: Mapping Entire Neural Networks on FPGAs6
Regular Composite Resource Partitioning and Reconfiguration in Open Systems6
DaCapo: An On-Device Learning Scheme for Memory-Constrained Embedded Systems6
A Survey of Blockchain Data Management Systems6
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