ACM Transactions on Embedded Computing Systems

Article	Citations
Model-based Toolchain for Core Flight System (cFS) Embedded Systems	92
REC: REtime Convolutional Layers to Fully Exploit Harvested Energy for ReRAM-based CNN Accelerators	71
FLASH: Deadline-Aware Flexible LLC Arbitration and Scheduling for Hardware Accelerators	68
SideDRAM: Integrating SoftSIMD Datapaths near DRAM Banks for Energy-Efficient Variable Precision Computation	67
Using Learning with Rounding to Instantiate Post-Quantum Cryptographic Algorithms	66
Formal Synthesis of Neural Barrier Certificates for Continuous Systems via Counterexample Guided Learning	63
A Comprehensive Survey on Deep Learning-based Predictive Maintenance	63
A Unified Programmable Edge Matrix Processor for Deep Neural Networks and Matrix Algebra	62
Contention Grading and Adaptive Model Selection for Machine Vision in Embedded Systems	59
A Novel Lattice-Based Fault Injection Attack Targeting the Nonce in the SM2 Digital Signature Algorithm	56
Optimizing AES-GCM on 32-Bit ARM Cortex-M4 Microcontrollers: Fixslicing and FACE-Based Approach	50
Directed Real-time Linux Fuzzing with Configuration Awareness	49
CapDYN : Adaptive Self-Scaling Energy Storage for Powering Batteryless IoT	45
A Design of Network Reconfigurable Universal CNN Accelerator Based on FPGA	42
ViT4Mal: Lightweight Vision Transformer for Malware Detection on Edge Devices	41
Graph Transformations for Memory Peak Minimization by Scheduling	41
TAFP-ViT: A Transformer Accelerator via QKV Computational Fusion and Adaptive Pruning for Vision Transformer	40
IoV-Fog-Assisted Framework for Accident Detection and Classification	39
More Is Less: Model Augmentation for Intermittent Deep Inference	36
WasmAndroid: A Cross-Platform Runtime for Native Programming Languages on Android	34
Large or Small: Harnessing the Erase Duality of Emerging Bit-Alterable NAND Flash to Suppress Tail Latency	34
PolyARBerNN: A Neural Network Guided Solver and Optimizer for Bounded Polynomial Inequalities	34
A Self-Sustained CPS Design for Reliable Wildfire Monitoring	32
VoxDepth : Rectification of Depth Images on Edge Devices	31
Distributed Task Offloading and Resource Purchasing in NOMA-Enabled Mobile Edge Computing: Hierarchical Game Theoretical Approaches	30

SENTRY: Protecting System-on-Chip Designs against Supply-Chain Attacks	29
Neural Abstraction-Based Controller Synthesis and Deployment	29
SHiELD: Functional Obfuscation of DSP Cores Using HLS Based One-Way Random Function and Reconfigurable Composite Switching Obfuscation Cells	28
Reg-Tune: A Regression-Focused Fine-Tuning Approach for Profiling Low Energy Consumption and Latency	27
FSIMR: File-system-aware Data Management for Interlaced Magnetic Recording	27
Kryptonite: Worst-Case Program Interference Estimation on Multi-Core Embedded Systems	26
Formally Verified Loop-Invariant Code Motion and Assorted Optimizations	24
DyCo: Dynamic, Contextualized AI Models	24
Formal Modeling of Hybrid System Based on Semi-continuous Colored Petri Net: A Case Study of Adaptive Cruise Control System	24
Mining Hyperproperties using Temporal Logics	24
Automatic Generation of Resource and Accuracy Configurable Processing Elements	24
DynHaMo: Dynamic Hardware-Based Monitoring Dedicated to Attacks Detection	23
Star-Set Based Efficient Reachable Set Computation of Anytime Sensing-Based Neural Network-Controlled Dynamical Systems	22
Automatic Generation of Fast and Accurate Performance Models for Deep Neural Network Accelerators	22
Unlocking the Full Potential of Dual-Interface SSDs: A Comprehensive Hardware and Software Perspective	22
CADAS: Communication-Aware Dynamic Scheduler on CGRAs for Large-Volume and Real-Time Processing	21
Scalable Binary Neural Network Applications in Oblivious Inference	21
An Efficient and Flexible Stochastic CGRA Mapping Approach	21
Enhancing the Energy Efficiency and Robustness of tinyML Computer Vision Using Coarsely-quantized Log-gradient Input Images	21
Towards Building Verifiable CPS using Lingua Franca	20
Performance Modeling of Computer Vision-based CNN on Edge GPUs	20
Securing Pacemakers Using Runtime Monitors over Physiological Signals	19
A Write-Related and Read-Related DRAM Allocation Strategy Inside Solid-State Drives (SSDs)	18
Supervisory Control for Dynamic Feature Configuration in Product Lines	18
Unleashing Cross-Domain Potential: Side-Channel Analysis with Autoencoder for Domain Adaptation	18
CARIn: Constraint-Aware and Responsive Inference on Heterogeneous Devices for Single- and Multi-DNN Workloads	18
Evolution Function Based Reach-Avoid Verification for Time-varying Systems with Disturbances	17
EXPRESS: A Framework for Execution Time Prediction of Concurrent CNNs on Xilinx DPU Accelerator	17
Improving Worst-case TSN Communication Times of Large Sensor Data Samples by Exploiting Synchronization	16
RPFF-PA : Reliable and Parallel Fault-tolerant Framework for Path Latency Reduction Deployed in Register Arrays	16
Early DSE and Automatic Generation of Coarse-grained Merged Accelerators	16
Boosting Cryptographic ICs’ Side-Channel Resistance: A Formal Framework for Automatic Identification and Protection of Leaky Paths	16
Multi-Compression Scale DNN Inference Acceleration based on Cloud-Edge-End Collaboration	16
FC-GPU: Feedback Control GPU Scheduling for Real-time Embedded Systems	16
SecuPilot: A Security Coprocessor-Integrated Platform for Autonomous UAV Security	16
Federated Self-training for Semi-supervised Audio Recognition	16
Middleware for Distributed Applications in a LoRa Mesh Network	15
Specifying and Compiling Scalable Networks of Actors for Software and Hardware Platforms	15
Reaction Latency Analysis of Message Synchronization in Edge-assisted Autonomous Driving	15
DTRL: Decision Tree-based Multi-Objective Reinforcement Learning for Runtime Task Scheduling in Domain-Specific System-on-Chips	15
Criticality-aware Monitoring and Orchestration for Containerized Industry 4.0 Environments	15
PEak: A Single Source of Truth for Hardware Design and Verification	15
System Scenario-Based Design of the Last-Level Cache in Advanced Interconnect-Dominant Technology Nodes	14
Optimus: An Operator Fusion Framework for Deep Neural Networks	14
BASS: Safe Deep Tissue Optical Sensing for Wearable Embedded Systems	14
A Hierarchical Classification Method for High-accuracy Instruction Disassembly with Near-field EM Measurements	13
CIMFlow: Modelling Dataflow in Cross-Layer Compute-in-Memory Deep Learning Accelerators	13
Coarse-Grained Task Parallelization by Dynamic Profiling for Heterogeneous SoC-Based Embedded System	13
WARM-tree: Making Quadtrees Write-efficient and Space-economic on Persistent Memories	13
Introduction to the Special Issue on Accelerating AI on the Edge – Part 1	13

DiGiT: A Diffusion-based Modular Geophysical Toolkit for On-device Multi-modal Data Generation	12
Elements of Timed Pattern Matching	12
A Highly Hardware Efficient ML-KEM Accelerator with Optimised Architectural Layers	12
Analog In-memory Circuit Design of Polynomial Multiplication for Lattice Cipher Acceleration Application	12
DOCTOR: A Multi-Disease Detection Continual Learning Framework Based on Wearable Medical Sensors	12
Cache Abstraction for Data Race Detection in Heterogeneous Systems with Non-coherent Accelerators	12
XimSwap: Many-to-Many Face Swapping for TinyML	12
Efficient and Robust Edge AI: Software, Hardware, and the Co-design	11
AdaTest: Reinforcement Learning and Adaptive Sampling for On-chip Hardware Trojan Detection	11
RTPL: A Real-Time Communication Protocol for LoRa Network	11
A Robust and Energy Efficient Hyperdimensional Computing System for Voltage-scaled Circuits	11
HDLRuby: A Ruby Extension for Hardware Description and Its Translation to Synthesizable Verilog HDL	11
Latency-Aware Pruning and Quantization of Self-Supervised Speech Transformers for Edge Devices	11
ZIP-CNN: Design Space Exploration for CNN Implementation within a MCU	11
Global Scheduling of Weakly-Hard Real-Time Tasks using Job-Level Priority Classes	11
Leveraging Computational Storage for Power-Efficient Distributed Data Analytics	11
Virtualizing a Post-Moore’s Law Analog Mesh Processor: The Case of a Photonic PDE Accelerator	10
A Load-Balanced Collaborative Repair Algorithm for Single-Disk Failures in Erasure Coded Storage Systems	10
Application-Level Evaluation of IEEE 802.1AS Synchronized Time and Linux for Distributed Real-Time Systems	10
VADF: V ersatile A pproximate D ata F ormats for Energy-Efficient Computing	10
Tutorial: A Novel Runtime Environment for Accelerator-Rich Heterogeneous Architectures	10
Toward Optimal Softcore Carry-aware Approximate Multipliers on Xilinx FPGAs	10
TreeHouse: An MLIR-based Compilation Flow for Real-Time Tree-based Inference	10
Probabilistic Reaction Time Analysis	10
Fast Loosely-Timed Deep Neural Network Models with Accurate Memory Contention	9
CABARRE: Request Response Arbitration for Shared Cache Management	9
Power Side-channel Attack Resistant Circuit Designs of ARX Ciphers Using High-level Synthesis	9
Introduction to the Special Issue on Domain-Specific System-on-Chip Architectures and Run-Time Management Techniques	9
Florets for Chiplets: Data Flow-aware High-Performance and Energy-efficient Network-on-Interposer for CNN Inference Tasks	9
Wireless Perceptual Space Modeling Method for Cross-Domain Human Activity Recognition	9
Hierarchical Resource Orchestration Framework for Real-time Containers	9
A Predictable QoS-aware Memory Request Scheduler for Soft Real-time Systems	9
Dataflow Driven Partitioning of Machine Learning Applications for Optimal Energy Use in Batteryless Systems	9
Store-n-Learn: Classification and Clustering with Hyperdimensional Computing across Flash Hierarchy	9
TAB: Unified and Optimized Ternary, Binary, and Mixed-precision Neural Network Inference on the Edge	9
Faster Implementation of Ideal Lattice-Based Cryptography Using AVX512	9
DynO: Dynamic Onloading of Deep Neural Networks from Cloud to Device	9
Domain-Specific Architectures: Research Problems and Promising Approaches	9
A Tree-Shaped Tableau for Checking the Satisfiability of Signal Temporal Logic with Bounded Temporal Operators	9
RegKey: A Register-based Implementation of ECC Signature Algorithms Against One-shot Memory Disclosure	9
An Efficient CNN Accelerator for Low-Cost Edge Systems	9
Selective Subarray Isolation for Mitigating RowHammer Attack	8
Challenges and Opportunities of Security-Aware EDA	8
Analysis of EM Fault Injection on Bit-sliced Number Theoretic Transform Software in Dilithium	8
An Intermediate-Centric Dataflow for Transposed Convolution Acceleration on FPGA	8
SPHINCSLET: An Area-Efficient Accelerator for the Full SPHINCS+ Digital Signature Algorithm	8
A Compact and Parallel Swap-Based Shuffler Based on Butterfly Network and Its Complexity Against Side Channel Analysis	8
Efficient Addition-Based Sparse GEMM for Fast Ternary Large Language Model Inference on Edge Devices	8
????????????????????????: Utilizing Hyperdimensional Computing for a More Robust and Efficient Machine Learning System	8
FT-DAG: An Efficient Full-Topology DAG Generator with Controllable Parameters	8
Designing High-Performance and Thermally Feasible Multi-Chiplet Architectures Enabled by Non-Bendable Glass Interposer	8
Rectifying Skewed Kernel Page Reclamation in Mobile Devices for Improving User-Perceivable Latency	8
COBRRA: COntention-aware cache Bypass with Request-Response Arbitration	8
A Survey of Blockchain Data Management Systems	8
HSPA: High-Throughput Sparse Polynomial Multiplication for Code-based Post-Quantum Cryptography	8
Optimal Control for Industrial Multi-Component CPS via Path-Encoding-Based Joint Optimization	8
Robust Embedded Autonomous Driving Positioning System Fusing LiDAR and Inertial Sensors	8
SHARP: An Adaptable, Energy-Efficient Accelerator for Recurrent Neural Networks	8
Lightweight Champions of the World: Side-Channel Resistant Open Hardware for Finalists in the NIST Lightweight Cryptography Standardization Process	8
Code Generation for Neural Networks Based on Fixed-point Arithmetic	8
Design Flow for Scheduling Spiking Deep Convolutional Neural Networks on Heterogeneous Neuromorphic System-on-chip	8
Regular Composite Resource Partitioning and Reconfiguration in Open Systems	8
RAD-FS: Remote Timing and Power SCA Security in DVFS-augmented Ultra-Low-Power Embedded Systems	7
Benchmarking and Configuring Security Levels in Intermittent Computing	7
SentinelEdge: An Attention-Based Defense for Real-Time Mitigation of Adversarial Thermal Manipulations in System-on-Chips	7
Let Coarse-Grained Resources Be Shared: Mapping Entire Neural Networks on FPGAs	7
High-Level Approaches to Hardware Security: A Tutorial	7
CrossTalk : Making Low-Latency Fault Tolerance Cheap by Exploiting Redundant Networks	7
Verified Compilation of Synchronous Dataflow with State Machines	7
Combining Weight Approximation, Sharing and Retraining for Neural Network Model Compression	7
HeterogeneousRTOS: A CPU-FPGA Real-Time OS for Fault Tolerance on COTS at Near-Zero Timing Cost	7
Optimal Checkpointing Strategy for Real-time Systems with Both Logical and Timing Correctness	7
Attack-resilient Fusion of Sensor Data with Uncertain Delays	7
TimelyNet: Adaptive Neural Architecture for Autonomous Driving with Dynamic Deadline	7
Register Blocking: A Source-to-Source Analytical Modelling Approach for Affine Loop Kernels	7
DaCapo: An On-Device Learning Scheme for Memory-Constrained Embedded Systems	7
MaPHeA: A Framework for Lightweight Memory Hierarchy-aware Profile-guided Heap Allocation	7
Improving Robustness in IoT Malware Detection through Execution Order Analysis	7
MaGrIP: Magnitude and Gradient-Informed Pruning for Task-Agnostic Large Language Models	7
A Configurable CRYSTALS-Kyber Hardware Implementation with Side-Channel Protection	7

Virtual Environment Model Generation for CPS Goal Verification using Imitation Learning	7
Software Optimization and Design Methodology for Low Power Computer Vision Systems	7
An Investigation on Hardware-Aware Vision Transformer Scaling	7
GINA: Exploiting Graph Neural Network Layer Features for Energy Efficient Inferencing in NVM-based PIM Accelerators	7
RIMMS: Runtime Integrated Memory Management System for Heterogeneous Computing	7
Introduction to the Special Issue on Specification and Design Languages	7
ASTRA: A Stochastic Transformer Neural Network Accelerator with Silicon Photonics	7