ACM Transactions on Embedded Computing Systems

Papers
(The median citation count of ACM Transactions on Embedded Computing Systems is 2. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2021-02-01 to 2025-02-01.)
ArticleCitations
Analysis of EM Fault Injection on Bit-sliced Number Theoretic Transform Software in Dilithium49
A Space-Grained Cleaning Method to Reduce Long-Tail Latency of DM-SMR Disks44
ViT4Mal: Lightweight Vision Transformer for Malware Detection on Edge Devices42
PUF-Dilithium: Design of a PUF-Based Dilithium Architecture Benchmarked on ARM Processors37
EC-ECC: Accelerating Elliptic Curve Cryptography for Edge Computing on Embedded GPU TX229
Abnormality Detection Using Power Rising and Descending Signature (PRIDES)29
Hardware Performance Counters: Ready-Made vs Tailor-Made28
Towards Analysing Cache-Related Preemption Delay in Non-Inclusive Cache Hierarchies28
Robust Embedded Autonomous Driving Positioning System Fusing LiDAR and Inertial Sensors27
Evaluating Controlled Memory Request Injection for Efficient Bandwidth Utilization and Predictable Execution in Heterogeneous SoCs26
Excluding Parallel Execution to Improve Global Fixed Priority Response Time Analysis26
Introduction to the Special Issue on Domain-Specific System-on-Chip Architectures and Run-Time Management Techniques24
Synaptic Activity and Hardware Footprint of Spiking Neural Networks in Digital Neuromorphic Systems23
????????????????????????: Utilizing Hyperdimensional Computing for a More Robust and Efficient Machine Learning System21
Tailor-made Virtualization Monitor Design for CPU Virtualization on LEON Processors21
Formal Synthesis of Neural Barrier Certificates for Continuous Systems via Counterexample Guided Learning21
Holistic Resource Allocation Under Federated Scheduling for Parallel Real-time Tasks20
Risk of Stochastic Systems for Temporal Logic Specifications20
Special Issue on Post-Quantum Cryptography for Embedded Systems20
Sound Mixed Fixed-Point Quantization of Neural Networks20
An Intermediate-Centric Dataflow for Transposed Convolution Acceleration on FPGA19
Synthesis-guided Adversarial Scenario Generation for Gray-box Feedback Control Systems with Sensing Imperfections18
Hephaestus : Codesigning and Automating 3D Image Registration on Reconfigurable Architectures17
HW-FlowQ: A Multi-Abstraction Level HW-CNN Co-design Quantization Methodology17
Challenges and Opportunities of Security-Aware EDA17
Verifying Stochastic Hybrid Systems with Temporal Logic Specifications via Model Reduction16
Probabilistic Risk-Aware Scheduling with Deadline Constraint for Heterogeneous SoCs16
Minimal-Overlap Centrality for Multi-Gateway Designation in Real-Time TSCH Networks16
Lightweight Champions of the World: Side-Channel Resistant Open Hardware for Finalists in the NIST Lightweight Cryptography Standardization Process15
SHARP: An Adaptable, Energy-Efficient Accelerator for Recurrent Neural Networks15
Rectifying Skewed Kernel Page Reclamation in Mobile Devices for Improving User-Perceivable Latency15
Efficient External Sorting for Memory-Constrained Embedded Devices with Flash Memory14
Hardware Acceleration for Embedded Keyword Spotting: Tutorial and Survey14
Design and Scaffolded Training of an Efficient DNN Operator for Computer Vision on the Edge14
Mobile or FPGA? A Comprehensive Evaluation on Energy Efficiency and a Unified Optimization Framework14
Precise Correlation Extraction for IoT Fault Detection With Concurrent Activities14
ACDSE: A Design Space Exploration Method for CNN Accelerator based on Adaptive Compression Mechanism14
Specification Guided Automated Synthesis of Feedback Controllers14
Introduction to the Special Issue on Memory and Storage Systems for Embedded and IoT Applications14
CRIMP: C ompact & R eliable DNN Inference on I n- M emory 14
FD-CNN: A Frequency-Domain FPGA Acceleration Scheme for CNN-Based Image-Processing Applications13
A Hierarchical Hybrid Locking Protocol for Parallel Real-Time Tasks13
XploreNAS : Explore Adversarially Robust and Hardware-efficient Neural Architectures for Non-ideal Xbars13
A Hardware Approach For Accelerating Inductive Learning In Description Logic13
On the RTL Implementation of FINN Matrix Vector Unit12
Thermal-aware Adaptive Platform Management for Heterogeneous Embedded Systems12
A Unified Programmable Edge Matrix Processor for Deep Neural Networks and Matrix Algebra12
Exploring Efficient Architectures on Remote In-Memory NVM over RDMA12
UBAR12
Dataflow Driven Partitioning of Machine Learning Applications for Optimal Energy Use in Batteryless Systems12
TCX: A RISC Style Tensor Computing Extension and a Programmable Tensor Processor12
Model-based Toolchain for Core Flight System (cFS) Embedded Systems11
Power Side-channel Attack Resistant Circuit Designs of ARX Ciphers Using High-level Synthesis11
An Approach to the Systematic Characterization of Multitask Accelerated CNN Inference in Edge MPSoCs11
Energy Management for Fault-tolerant (m,k)-constrained Real-time Systems That Use Standby-Sparing11
QUAREM: Maximising QoE Through Adaptive Resource Management in Mobile MPSoC Platforms11
Toward Adversary-aware Non-iterative Model Pruning through D ynamic N etwork R ewiring of DNNs11
REC: REtime Convolutional Layers to Fully Exploit Harvested Energy for ReRAM-based CNN Accelerators10
Hercules: Enabling Atomic Durability for Persistent Memory with Transient Persistence Domain10
RiSA: A Reinforced Systolic Array for Depthwise Convolutions and Embedded Tensor Reshaping10
Real-time Attack-recovery for Cyber-physical Systems Using Linear-quadratic Regulator10
SPIMulator: A Spintronic Processing-in-memory Simulator for Racetracks10
MaxTracker: Continuously Tracking the Maximum Computation Progress for Energy Harvesting ReRAM-based CNN Accelerators10
Survey of Control-flow Integrity Techniques for Real-time Embedded Systems10
SLEXNet: Adaptive Inference Using Slimmable Early Exit Neural Networks10
Contention Grading and Adaptive Model Selection for Machine Vision in Embedded Systems10
Chauffeur: Benchmark Suite for Design and End-to-End Analysis of Self-Driving Vehicles on Embedded Systems9
Toward Object-oriented Modeling in SCCharts9
Agile Acceleration of Stateful Hash-based Signatures in Hardware9
Lightweight Hardware-Based Cache Side-Channel Attack Detection for Edge Devices (Edge-CaSCADe)9
Edge-SLAM: Edge-Assisted Visual Simultaneous Localization and Mapping9
TyBox: An Automatic Design and Code Generation Toolbox for TinyML Incremental On-Device Learning9
Energy-Aware Adaptive Mixed-Criticality Scheduling with Semi-Clairvoyance and Graceful Degradation9
Human Activity Recognition on Microcontrollers with Quantized and Adaptive Deep Neural Networks9
On-device Online Learning and Semantic Management of TinyML Systems8
TinyNS: Platform-aware Neurosymbolic Auto Tiny Machine Learning8
Killing Processes or Killing Flash? Escaping from the Dilemma Using Lightweight, Compression-Aware Swap for Mobile Devices8
Towards a Rust-Like Borrow Checker for C8
FirmCAN: Sensitive CAN Knowledge Leakage from Automotive ECUs8
Look-up the Rainbow: Table-based Implementation of Rainbow Signature on 64-bit ARMv8 Processors8
A Composable Monitoring System for Heterogeneous Embedded Platforms8
ZPP: A Dynamic Technique to Eliminate Cache Pollution in NoC based MPSoCs8
Performance and Power Estimation of STT-MRAM Main Memory with Reliable System-level Simulation8
SAGE: A Split-Architecture Methodology for Efficient End-to-End Autonomous Vehicle Control8
Neural Abstraction-Based Controller Synthesis and Deployment8
ObNoCs : Protecting Network-on-Chip Fabrics Against Reverse-Engineering Attacks8
Edge Intelligence: Concepts, Architectures, Applications, and Future Directions8
Regular Composite Resource Partitioning and Reconfiguration in Open Systems8
Code Generation for Neural Networks Based on Fixed-point Arithmetic7
COBRRA: COntention-aware cache Bypass with Request-Response Arbitration7
QUIDAM: A Framework for Qu ant i zation-aware D NN A ccelerator and 7
Constrained Tiny Machine Learning for Predicting Gas Concentration with I4.0 Low-cost Sensors7
Synchronised Shared Memory and Model Checking7
Scheduling Dynamic Software Updates in Mobile Robots7
Introduction to the Special Issue on Specification and Design Languages (FDL 2019)7
CEDR: A Compiler-integrated, Extensible DSSoC Runtime7
Declarative Power Sequencing7
A Design Flow for Scheduling Spiking Deep Convolutional Neural Networks on Heterogeneous Neuromorphic System-on-Chip7
Microcontroller Fingerprinting Using Partially Erased NOR Flash Memory Cells7
Probabilistic Black-Box Checking via Active MDP Learning6
SystemC Implementation of Stochastic Petri Nets for Simulation and Parameterization of Biological Networks6
Hardware Area Efficient and Real-Time FPGA Implementation of PHMMRGB.6
Let Coarse-Grained Resources Be Shared: Mapping Entire Neural Networks on FPGAs6
Neural Network Compression for Noisy Storage Devices6
Introduction to the Special Issue on Accelerating AI on the Edge – Part 26
PArtNNer: Platform-Agnostic Adaptive Edge-Cloud DNN Partitioning for Minimizing End-to-End Latency6
Protecting Network-on-Chip Intellectual Property Using Timing Channel Fingerprinting6
HSPA: High-Throughput Sparse Polynomial Multiplication for Code-based Post-Quantum Cryptography6
WasmAndroid: A Cross-Platform Runtime for Native Programming Languages on Android6
Model-Based Diagnosis of Real-Time Systems: Robustness Against Varying Latency, Clock Drift, and Out-of-Order Observations6
Efficient Realization of Decision Trees for Real-Time Inference6
Attack-resilient Fusion of Sensor Data with Uncertain Delays6
A Self-Sustained CPS Design for Reliable Wildfire Monitoring6
Software Optimization and Design Methodology for Low Power Computer Vision Systems6
Editorial6
MARS: mmWave-based Assistive Rehabilitation System for Smart Healthcare6
MSYNC: A Generalized Formal Design Pattern for Virtually Synchronous Multirate Cyber-physical Systems6
Special Issue: “Approximation at the Edge”6
An Investigation on Hardware-Aware Vision Transformer Scaling5
Customized FPGA Implementation of Authenticated Lightweight Cipher Fountain for IoT Systems5
Intelligent Caching for Vehicular Dew Computing in Poor Network Connectivity Environments5
Synergistically Exploiting CNN Pruning and HLS Versioning for Adaptive Inference on Multi-FPGAs at the Edge5
HMT: A Hardware-centric Hybrid Bonsai Merkle Tree Algorithm for High-performance Authentication5
A Survey of Blockchain Data Management Systems5
Mapping Computations in Heterogeneous Multicore Systems with Statistical Regression on Program Inputs5
STDF: Spatio-Temporal Deformable Fusion for Video Quality Enhancement on Embedded Platforms5
EdgeWise: Energy-efficient CNN Computation on Edge Devices under Stochastic Communication Delays5
SG-Float: Achieving Memory Access and Computing Power Reduction Using Self-Gating Float in CNNs5
Improving Variational Autoencoder based Out-of-Distribution Detection for Embedded Real-time Applications5
ATCN: Resource-efficient Processing of Time Series on Edge5
Bridging the Abstraction Gap: A Systematic Approach to Rule-Based Transformational Design for Embedded Systems5
PolyARBerNN: A Neural Network Guided Solver and Optimizer for Bounded Polynomial Inequalities5
Consistency vs. Availability in Distributed Cyber-Physical Systems5
LPWAN in the TV White Spaces5
Energy-efficient and Reliable Inference in Nonvolatile Memory under Extreme Operating Conditions5
Compact Instruction Set Extensions for Dilithium5
Efficient-Grad: Efficient Training Deep Convolutional Neural Networks on Edge Devices with Grad ient Optimizations4
Predictive Monitoring with Logic-Calibrated Uncertainty for Cyber-Physical Systems4
IoV-Fog-Assisted Framework for Accident Detection and Classification4
TinyM 2 Net-V2: A Compact Low-power Software Hardware Architecture for M ulti m odal Deep Neural Networ4
OffloaD: Detection Failure-based Scheduler for Offloading Object Detection4
Code-size-aware Scheduling of Synchronous Dataflow Graphs on Multicore Systems4
High-Level Approaches to Hardware Security: A Tutorial4
Static Scheduling of Weight Programming for DNN Acceleration with Resource Constrained PIM4
Dynamic Thermal Management of 3D Memory through Rotating Low Power States and Partial Channel Closure4
Design Space Exploration for Secure IoT Devices and Cyber-Physical Systems4
AppAxO : Designing App lication-specific A ppro x imate O 4
Transient Fault Detection in Tensor Cores for Modern GPUs4
Trust Based Active Game Data Collection Scheme in Smart Cities4
DaCapo: An On-Device Learning Scheme for Memory-Constrained Embedded Systems4
ANV-PUF: Machine-Learning-Resilient NVM-Based Arbiter PUF4
A Comprehensive Study of Systems Challenges in Visual Simultaneous Localization and Mapping Systems4
Edge-AI-Driven Framework with Efficient Mobile Network Design for Facial Expression Recognition4
Design-Technology Co-Optimization for NVM-Based Neuromorphic Processing Elements4
Formally Verified Next-generation Airborne Collision Avoidance Games in ACAS X4
AMP: Total Variation Reduction for Lossless Compression via Approximate Median-based Preconditioning4
More Is Less: Model Augmentation for Intermittent Deep Inference4
HMDS: A Makespan Minimizing DAG Scheduler for Heterogeneous Distributed Systems4
Multi-bit Data Flow Error Detection Method Based on SDC Vulnerability Analysis4
MVLevelDB + : Meeting Relative Consistency Requirements of Temporal Queries in Sensor Stream Databases4
Schedulability Analysis for Timed Automata With Tasks4
SLAQA4
PhiNets: A Scalable Backbone for Low-power AI at the Edge4
Introduction to Special Issue on In/Near Memory and Storage Computing for Embedded Systems4
ReSG: A Data Structure for Verification of Majority-based In-memory Computing on ReRAM Crossbars4
PHiLIP on the HiL: Automated Multi-Platform OS Testing With External Reference Devices4
MLTL Multi-type: A Typed Logic for Cyber-Physical Systems3
Side-channel and Fault-injection attacks over Lattice-based Post-quantum Schemes (Kyber, Dilithium): Survey and New Results3
Real-Time Fixed Priority Scheduling Synthesis using Affine DataFlow Graphs: from Theory to Practice3
Real-time, High-resolution Depth Upsampling on Embedded Accelerators3
Cross-Layer Adaptation with Safety-Assured Proactive Task Job Skipping3
DirectNVM: Hardware-accelerated NVMe SSDs for High-performance Embedded Computing3
Two Birds With One Stone: Boosting Both Search and Write Performance for Tree Indices on Persistent Memory3
Predictable GPU Wavefront Splitting for Safety-Critical Systems3
An Interpretable Machine Learning Model Enhanced Integrated CPU-GPU DVFS Governor3
Verified Compilation of Synchronous Dataflow with State Machines3
Vector Extensions in COTS Processors to Increase Guaranteed Performance in Real-Time Systems3
LaDy: Enabling L ocality- a ware D eduplication Technolog y on Shingled Magn3
RT-ZooKeeper: Taming the Recovery Latency of a Coordination Service3
Graph Transformations for Memory Peak Minimization by Scheduling3
Lane Compression3
Enhancing the Energy Efficiency and Robustness of tinyML Computer Vision Using Coarsely-quantized Log-gradient Input Images3
Keep in Balance: Runtime-reconfigurable Intermittent Deep Inference3
Optimal Checkpointing Strategy for Real-time Systems with Both Logical and Timing Correctness3
Reachability Analysis of Sigmoidal Neural Networks3
CrossTalk : Making Low-Latency Fault Tolerance Cheap by Exploiting Redundant Networks3
Real-Time Guarantees in Routerless Networks-on-Chip3
Federated Scheduling of Sporadic DAGs on Unrelated Multiprocessors3
HLS-based High-throughput and Work-efficient Synthesizable Graph Processing Template Pipeline3
Reliability-aware Scheduling and Routing for Messages in Time-sensitive Networking3
Horizontal Side-Channel Vulnerabilities of Post-Quantum Key Exchange and Encapsulation Protocols3
MaPHeA: A Framework for Lightweight Memory Hierarchy-aware Profile-guided Heap Allocation3
Improving Performance-Power-Programmability in Space Avionics with Edge Devices: VBN on Myriad2 SoC3
Read Refresh Scheduling and Data Reallocation against Read Disturb in SSDs3
Rethinking the Interactivity of OS and Device Layers in Memory Management3
LanCeX: A Versatile and Lightweight Defense Method against Condensed Adversarial Attacks in Image and Audio Recognition3
FSIMR: File-system-aware Data Management for Interlaced Magnetic Recording3
Distributed Task Offloading and Resource Purchasing in NOMA-Enabled Mobile Edge Computing: Hierarchical Game Theoretical Approaches3
Mining Hyperproperties using Temporal Logics3
Securing Pacemakers using Runtime Monitors over Physiological Signals2
Scalable Binary Neural Network Applications in Oblivious Inference2
An Efficient and Flexible Stochastic CGRA Mapping Approach2
A Construction Kit for Efficient Low Power Neural Network Accelerator Designs2
Accelerated Fire Detection and Localization at Edge2
Integrated Hardware Garbage Collection2
LL-GNN: Low Latency Graph Neural Networks on FPGAs for High Energy Physics2
Tolerating Defects in Low-Power Neural Network Accelerators Via Retraining-Free Weight Approximation2
DASS: Differentiable Architecture Search for Sparse Neural Networks2
Improving Robustness in IoT Malware Detection through Execution Order Analysis2
Test Generation for Hardware Trojan Detection Using Correlation Analysis and Genetic Algorithm2
Automatic Generation of Resource and Accuracy Configurable Processing Elements2
CORIDOR: Using CO herence and Tempo R al Local I ty to Mitigate Read D isurb2
Time-Series Forecasting and Sequence Learning Using Memristor-based Reservoir System2
Leveraging HLS to Design a Versatile & High-Performance Classic McEliece Accelerator2
Early DSE and Automatic Generation of Coarse-grained Merged Accelerators2
HeterogeneousRTOS: A CPU-FPGA Real-Time OS for Fault Tolerance on COTS at Near-Zero Timing Cost2
Hardware-friendly User-specific Machine Learning for Edge Devices2
Scabbard: An Exploratory Study on Hardware Aware Design Choices of Learning with Rounding-based Key Encapsulation Mechanisms2
Energy-Efficient Communications for Improving Timely Progress of Intermittent-Powered BLE Devices2
Asynchronous Compaction Acceleration Scheme for Near-data Processing-enabled LSM-tree-based KV Stores2
AQuA: A New Image Quality Metric for Optimizing Video Analytics Systems2
Regime Inference for Sound Floating-Point Optimizations2
IoT-Fog-Cloud Centric Earthquake Monitoring and Prediction2
DyCo: Dynamic, Contextualized AI Models2
Reg-Tune: A Regression-Focused Fine-Tuning Approach for Profiling Low Energy Consumption and Latency2
FedHIL: Heterogeneity Resilient Federated Learning for Robust Indoor Localization with Mobile Devices2
C o -A pproximator : Enabling Performance Prediction in Colocated Applications.2
An Ultra-low-power Embedded AI Fire Detection and Crowd Counting System for Indoor Areas2
SIAM: Chiplet-based Scalable In-Memory Acceleration with Mesh for Deep Neural Networks2
Physics-Driven Page Fault Handling for Customized Deception against CPS Malware2
Deadline-Aware Task Offloading for Vehicular Edge Computing Networks Using Traffic Light Data2
Automatic Generation of Fast and Accurate Performance Models for Deep Neural Network Accelerators2
SENNA: Unified Hardware/Software Space Exploration for Parametrizable Neural Network Accelerators2
TREAFET: Temperature-Aware Real-Time Task Scheduling for FinFET based Multicores2
Online Distributed Schedule Randomization to Mitigate Timing Attacks in Industrial Control Systems2
Compositional Timing Analysis of Asynchronized Distributed Cause-effect Chains2
NeuroTAP: Thermal and Memory Access Pattern-Aware Data Mapping on 3D DRAM for Maximizing DNN Performance2
Thermal Management for 3D-Stacked Systems via Unified Core-Memory Power Regulation2
Combining Weight Approximation, Sharing and Retraining for Neural Network Model Compression2
Design and Analysis of High Performance Heterogeneous Block-based Approximate Adders2
Benchmarking and Configuring Security Levels in Intermittent Computing2
An Efficient Approach for Improving Message Acceptance Rate and Link Utilization in Time-Sensitive Networking2
TEFLON: Thermally Efficient Dataflow-aware 3D NoC for Accelerating CNN Inferencing on Manycore PIM Architectures2
The Sparse Synchronous Model on Real Hardware2
Scenario Based Run-Time Switching for Adaptive CNN-Based Applications at the Edge2
Guaranteeing Timely Response to Changes of Monitored Objects by Assigning Deadlines and Periods to Tasks2
Post-Quantum Signatures on RISC-V with Hardware Acceleration2
HEART: H ybrid Memory and E nergy- A ware R eal- T 2
RAD-FS: Remote Timing and Power SCA Security in DVFS-augmented Ultra-Low-Power Embedded Systems2
A Review of Abstraction Methods Toward Verifying Neural Networks2
0.025418996810913