ACM Transactions on Embedded Computing Systems

Article	Citations
Toward a Lingua Franca for Deterministic Concurrent Systems	34
MARS: mmWave-based Assistive Rehabilitation System for Smart Healthcare	28
Game-Based Task Offloading of Multiple Mobile Devices with QoS in Mobile Edge Computing Systems of Limited Computation Capacity	26
Edge-AI-Driven Framework with Efficient Mobile Network Design for Facial Expression Recognition	25
Heuristic Computation Offloading Algorithms for Mobile Users in Fog Computing	25
TensorRT-Based Framework and Optimization Methodology for Deep Learning Inference on Jetson Boards	25
Verifying the Safety of Autonomous Systems with Neural Network Controllers	23
Side-Channel Analysis of Lattice-Based Post-Quantum Cryptography: Exploiting Polynomial Multiplication	22
Deep Ensemble Learning for Human Activity Recognition Using Wearable Sensors via Filter Activation	22
SIAM: Chiplet-based Scalable In-Memory Acceleration with Mesh for Deep Neural Networks	20
LATTE: L STM Self- Att ention based Anomaly Detection in E mbedded Automotive Platforms	18
Intermittent-Aware Neural Architecture Search	18
Edge Intelligence: Concepts, Architectures, Applications, and Future Directions	17
Distributed Task Offloading and Resource Purchasing in NOMA-Enabled Mobile Edge Computing: Hierarchical Game Theoretical Approaches	17
ROBIN: A Robust Optical Binary Neural Network Accelerator	16
Reliability-aware Scheduling and Routing for Messages in Time-sensitive Networking	16
Energy Modeling for the Bluetooth Low Energy Protocol	15
Predictive Monitoring with Logic-Calibrated Uncertainty for Cyber-Physical Systems	15
SLAQA	14
Design Space Exploration for Ultra-Low-Energy and Secure IoT MCUs	14
SNR: S queezing N umerical R ange Defuses Bit Error Vulnerability Surface in Deep Neural Networks	14
HMDS: A Makespan Minimizing DAG Scheduler for Heterogeneous Distributed Systems	14
Improving Performance-Power-Programmability in Space Avionics with Edge Devices: VBN on Myriad2 SoC	14
Edge-SLAM: Edge-Assisted Visual Simultaneous Localization and Mapping	14
MHDeep: Mental Health Disorder Detection System Based on Wearable Sensors and Artificial Neural Networks	13

SAGE: A Split-Architecture Methodology for Efficient End-to-End Autonomous Vehicle Control	13
Hardware Performance Counter-Based Fine-Grained Malware Detection	13
CAN Bus Intrusion Detection Based on Auxiliary Classifier GAN and Out-of-distribution Detection	13
TAMA	13
Algorithm-hardware Co-design of Attention Mechanism on FPGA Devices	13
Event-B Hybridation	12
AppAxO : Designing App lication-specific A ppro x imate O	12
Camaroptera: A Long-range Image Sensor with Local Inference for Remote Sensing Applications	12
Improving Power of DSP and CNN Hardware Accelerators Using Approximate Floating-point Multipliers	12
FFConv	12
DEEPEYE	11
EC-ECC: Accelerating Elliptic Curve Cryptography for Edge Computing on Embedded GPU TX2	11
CICERO: A Domain-Specific Architecture for Efficient Regular Expression Matching	10
Learning Nondeterministic Real-Time Automata	10
Horizontal Side-Channel Vulnerabilities of Post-Quantum Key Exchange and Encapsulation Protocols	10
A Survey of Blockchain Data Management Systems	10
DFSynthesizer: Dataflow-based Synthesis of Spiking Neural Networks to Neuromorphic Hardware	10
FELIX: A Ferroelectric FET Based Low Power Mixed-Signal In-Memory Architecture for DNN Acceleration	10
Improving Variational Autoencoder based Out-of-Distribution Detection for Embedded Real-time Applications	10
Real-time Attack-recovery for Cyber-physical Systems Using Linear-quadratic Regulator	10
Compositional Learning and Verification of Neural Network Controllers	10
An Interpretable Machine Learning Model Enhanced Integrated CPU-GPU DVFS Governor	10
Dealing with Uncertainty in pWCET Estimations	10
Golden Chip-Free Trojan Detection Leveraging Trojan Trigger’s Side-Channel Fingerprinting	9
CEDR: A Compiler-integrated, Extensible DSSoC Runtime	9
DynO: Dynamic Onloading of Deep Neural Networks from Cloud to Device	9
Demystifying Energy Consumption Dynamics in Transiently powered Computers	9
Design Space Exploration for Secure IoT Devices and Cyber-Physical Systems	9
Learning to Train CNNs on Faulty ReRAM-based Manycore Accelerators	9
Towards an Integrated Vehicle Management System in DriveOS	9
Thermal-aware Adaptive Platform Management for Heterogeneous Embedded Systems	9
FLASH: F ast Neura l A rchitecture S earch with H ardware	8
Fast and Energy-Efficient State Checkpointing for Intermittent Computing	8
Design-Technology Co-Optimization for NVM-Based Neuromorphic Processing Elements	8
Reducing Energy in GPGPUs through Approximate Trivial Bypassing	8
MAGNETO	8
Determinism	8
Synergistically Exploiting CNN Pruning and HLS Versioning for Adaptive Inference on Multi-FPGAs at the Edge	8
AHA: An Agile Approach to the Design of Coarse-Grained Reconfigurable Accelerators and Compilers	8
DNN Is Not All You Need: Parallelizing Non-neural ML Algorithms on Ultra-low-power IoT Processors	8
Horizontal Auto-Scaling for Multi-Access Edge Computing Using Safe Reinforcement Learning	8
RT-ZooKeeper: Taming the Recovery Latency of a Coordination Service	8
LAMBDA	7
An Energy-Efficient DRAM Cache Architecture for Mobile Platforms With PCM-Based Main Memory	7
Software-Managed Read and Write Wear-Leveling for Non-Volatile Main Memory	7
Two Birds With One Stone: Boosting Both Search and Write Performance for Tree Indices on Persistent Memory	7
SPECTRUM	7
Virtualizing a Post-Moore’s Law Analog Mesh Processor: The Case of a Photonic PDE Accelerator	7
Synthesis of Flexible Accelerators for Early Adoption of Ring-LWE Post-quantum Cryptography	7
Rtkaller: State-aware Task Generation for RTOS Fuzzing	7

A Composable Monitoring System for Heterogeneous Embedded Platforms	7
SEAMS	7
Heterogeneity-aware Multicore Synchronization for Intermittent Systems	7
Block Walsh–Hadamard Transform-based Binary Layers in Deep Neural Networks	7
Domain-specific Hybrid Mapping for Energy-efficient Baseband Processing in Wireless Networks	6
Sense Your Power	6
Tolerating Defects in Low-Power Neural Network Accelerators Via Retraining-Free Weight Approximation	6
Efficient Realization of Decision Trees for Real-Time Inference	6
QUAREM: Maximising QoE Through Adaptive Resource Management in Mobile MPSoC Platforms	6
MaxTracker: Continuously Tracking the Maximum Computation Progress for Energy Harvesting ReRAM-based CNN Accelerators	6
Energy-efficient Real-time Scheduling on Multicores	6
Winograd Convolution for Deep Neural Networks: Efficient Point Selection	6
MemFHE: End-to-End Computing with Fully Homomorphic Encryption in Memory	6
Post-Quantum Signatures on RISC-V with Hardware Acceleration	6
RiSA: A Reinforced Systolic Array for Depthwise Convolutions and Embedded Tensor Reshaping	6
Crab-tree	6
Software Hint-Driven Data Management for Hybrid Memory in Mobile Systems	6
EncoDeep	6
Side-channel and Fault-injection attacks over Lattice-based Post-quantum Schemes (Kyber, Dilithium): Survey and New Results	6
PhiNets: A Scalable Backbone for Low-power AI at the Edge	6
A TCAM-based Caching Architecture Framework for Packet Classification	6
Human Activity Recognition on Microcontrollers with Quantized and Adaptive Deep Neural Networks	6
A Distributed Real-time Scheduling System for Industrial Wireless Networks	6
Optimization of Signal Processing Applications Using Parameterized Error Models for Approximate Adders	5
Accelerating Attention Mechanism on FPGAs based on Efficient Reconfigurable Systolic Array	5
Skills Gaps in the Industry	5
DSTL	5
Probabilistic Estimation of Threat Intrusion in Embedded Systems for Runtime Detection	5
Test Generation for Hardware Trojan Detection Using Correlation Analysis and Genetic Algorithm	5
Adaptive Task Allocation and Scheduling on NoC-based Multicore Platforms with Multitasking Processors	5
??????: Utilizing Hyperdimensional Computing for a More Robust and Efficient Machine Learning System	5
HW-FlowQ: A Multi-Abstraction Level HW-CNN Co-design Quantization Methodology	5
Improving the Performance of Hybrid Caches Using Partitioned Victim Caching	5
Reliability Assessment and Safety Arguments for Machine Learning Components in System Assurance	5
Online Learning for Orchestration of Inference in Multi-user End-edge-cloud Networks	5
Optimus: An Operator Fusion Framework for Deep Neural Networks	5
Quantized Sparse Training: A Unified Trainable Framework for Joint Pruning and Quantization in DNNs	5
DIAC	5
Approximate Cache in GPGPUs	5
Toward Adversary-aware Non-iterative Model Pruning through D ynamic N etwork R ewiring of DNNs	5
Contention Grading and Adaptive Model Selection for Machine Vision in Embedded Systems	5
Domain-Specific Architectures: Research Problems and Promising Approaches	5
Temporal Robustness of Temporal Logic Specifications: Analysis and Control Design	5
GMAI	5
Beyond Cache Attacks	5
Adaptive Computation Reuse for Energy-Efficient Training of Deep Neural Networks	5
Hardware Trojan Detection Using Machine Learning: A Tutorial	5
Generalized Weakly Hard Schedulability Analysis for Real-Time Periodic Tasks	5
Chauffeur: Benchmark Suite for Design and End-to-End Analysis of Self-Driving Vehicles on Embedded Systems	5
UBAR	5
Hardware Acceleration for Embedded Keyword Spotting: Tutorial and Survey	4
TAB: Unified and Optimized Ternary, Binary, and Mixed-precision Neural Network Inference on the Edge	4
AdaTest: Reinforcement Learning and Adaptive Sampling for On-chip Hardware Trojan Detection	4
Trustworthy Autonomous System Development	4
REPAIR: Control Flow Protection based on Register Pairing Updates for SW-Implemented HW Fault Tolerance	4
Early DSE and Automatic Generation of Coarse-grained Merged Accelerators	4
A Vector-Length Agnostic Compiler for the Connex-S Accelerator with Scratchpad Memory	4
Reliable and Secure Design-Space-Exploration for Cyber-Physical Systems	4
More Is Less: Model Augmentation for Intermittent Deep Inference	4
Synthesis-guided Adversarial Scenario Generation for Gray-box Feedback Control Systems with Sensing Imperfections	4
Applying Multiple Level Cell to Non-volatile FPGAs	4
DL-RSIM: A Reliability and Deployment Strategy Simulation Framework for ReRAM-based CNN Accelerators	4
Microarchitectural Exploration of STT-MRAM Last-level Cache Parameters for Energy-efficient Devices	4
Exploiting Activation Sparsity for Fast CNN Inference on Mobile GPUs	4
Cache Interference-aware Task Partitioning for Non-preemptive Real-time Multi-core Systems	4
A Configurable CRYSTALS-Kyber Hardware Implementation with Side-Channel Protection	4
Scheduling in Real-Time Mobile Systems	4
Facilitating Human Activity Data Annotation via Context-Aware Change Detection on Smartwatches	4
Energy-efficient and Reliable Inference in Nonvolatile Memory under Extreme Operating Conditions	4
Synaptic Activity and Hardware Footprint of Spiking Neural Networks in Digital Neuromorphic Systems	4
On-device Prior Knowledge Incorporated Learning for Personalized Atrial Fibrillation Detection	4
High-performance Reconfigurable DNN Accelerator on a Bandwidth-limited Embedded System	4
ETAP: Energy-aware Timing Analysis of Intermittent Programs	4
FARSI: An Early-stage Design Space Exploration Framework to Tame the Domain-specific System-on-chip Complexity	4
Minimizing Stack Memory for Partitioned Mixed-criticality Scheduling on Multiprocessor Platforms	4
Application-centric Network Management - Addressing Safety and Real-time in V2X Applications	4
LPWAN in the TV White Spaces	4
MSYNC: A Generalized Formal Design Pattern for Virtually Synchronous Multirate Cyber-physical Systems	4
Survey of Control-flow Integrity Techniques for Real-time Embedded Systems	4
CODEBench: A Neural Architecture and Hardware Accelerator Co-Design Framework	3

Probabilistic Risk-Aware Scheduling with Deadline Constraint for Heterogeneous SoCs	3
Holistic Resource Allocation Under Federated Scheduling for Parallel Real-time Tasks	3
SIKE in 32-bit ARM Processors Based on Redundant Number System for NIST Level-II	3
Tutorial: Toward Robust Deep Learning against Poisoning Attacks	3
Comparative Analysis and Enhancement of CFG-based Hardware-Assisted CFI Schemes	3
Scenario Based Run-Time Switching for Adaptive CNN-Based Applications at the Edge	3
A Framework for Neural Network Architecture and Compile Co-optimization	3
Vector Extensions in COTS Processors to Increase Guaranteed Performance in Real-Time Systems	3
Structured Proofs for Adversarial Cyber-Physical Systems	3
SG-Float: Achieving Memory Access and Computing Power Reduction Using Self-Gating Float in CNNs	3
On the RTL Implementation of FINN Matrix Vector Unit	3
Compiling for the Worst Case	3
TrustFlow-X	3
Prepare: P owe r -Awar e A p proximate Re a l	3
Reconfigurable System-on-Chip Architectures for Robust Visual SLAM on Humanoid Robots	3
Cross-Layer Adaptation with Safety-Assured Proactive Task Job Skipping	3
How Flexible is Your Computing System?	3
Efficient-Grad: Efficient Training Deep Convolutional Neural Networks on Edge Devices with Grad ient Optimizations	3
SensorGAN: A Novel Data Recovery Approach for Wearable Human Activity Recognition	3
Performance and Power Estimation of STT-MRAM Main Memory with Reliable System-level Simulation	3
Risk of Stochastic Systems for Temporal Logic Specifications	3
Optimizing Tensor Contractions for Embedded Devices with Racetrack and DRAM Memories	3
Federated Self-training for Semi-supervised Audio Recognition	3
IoT-Fog-Cloud Centric Earthquake Monitoring and Prediction	3
Prediction Modeling for Application-Specific Communication Architecture Design of Optical NoC	3
An Efficient CNN Accelerator for Low-Cost Edge Systems	3
Formally Verified Next-generation Airborne Collision Avoidance Games in ACAS X	3
Automatic Generation of Resource and Accuracy Configurable Processing Elements	2
Formally Verified Loop-Invariant Code Motion and Assorted Optimizations	2
Integrated Hardware Garbage Collection	2
TinyNS: Platform-Aware Neurosymbolic Auto Tiny Machine Learning	2
Verified Lustre Normalization with Node Subsampling	2
Firmness Analysis of Real-time Tasks	2
Hierarchical Resource Orchestration Framework for Real-time Containers	2
ViT4Mal: Lightweight Vision Transformer for Malware Detection on Edge Devices	2
A Framework for Calculating WCET Based on Execution Decision Diagrams	2
Exploring Efficient Architectures on Remote In-Memory NVM over RDMA	2
Does SoC Hardware Development Become Agile by Saying So: A Literature Review and Mapping Study	2
Cooperative Coevolution-based Design Space Exploration for Multi-mode Dataflow Mapping	2
Killing Processes or Killing Flash? Escaping from the Dilemma Using Lightweight, Compression-Aware Swap for Mobile Devices	2
A proven translation from a UML state machine subset to timed automata	2
Supervisory Control for Dynamic Feature Configuration in Product Lines	2
DirectNVM: Hardware-accelerated NVMe SSDs for High-performance Embedded Computing	2
Regime Inference for Sound Floating-Point Optimizations	2
A review of abstraction methods towards verifying neural networks	2
Benchmarking and Configuring Security Levels in Intermittent Computing	2
Attack-resilient Fusion of Sensor Data with Uncertain Delays	2
A Passive Online Technique for Learning Hybrid Automata from Input/Output Traces	2
Application of Logical Sub-networking in Congestion-aware Deadlock-free SDmesh Routing	2
D y VED eep	2
TyBox: an automatic design and code-generation toolbox for TinyML incremental on-device learning	2
L 2 C: Combining Lossy and Lossless Compression on Memory and I/O	2
Agile Acceleration of Stateful Hash-Based Signatures in Hardware	2
Efficient External Sorting for Memory-Constrained Embedded Devices with Flash Memory	2
Brain-inspired Cognition in Next-generation Racetrack Memories	2
SHARP: An Adaptable, Energy-Efficient Accelerator for Recurrent Neural Networks	2
Resource-Efficient Continual Learning for Sensor-Based Human Activity Recognition	2
Fine-grained Hardware Acceleration for Efficient Batteryless Intermittent Inference on the Edge	2
Enhancing the Energy Efficiency and Robustness of tinyML Computer Vision Using Coarsely-Quantized Log-Gradient Input Images	2
DASS: Differentiable Architecture Search for Sparse Neural Networks	2
Compositional Timing Analysis of Asynchronized Distributed Cause-effect Chains	2
A Machine Learning Methodology for Cache Memory Design Based on Dynamic Instructions	2
A Contrastive Plan Explanation Framework for Hybrid System Models	2
Protecting Network-on-Chip Intellectual Property Using Timing Channel Fingerprinting	2
Interactive Programmatic Modeling	2
PHiLIP on the HiL: Automated Multi-Platform OS Testing With External Reference Devices	2
Trireme: Exploration of Hierarchical Multi-level Parallelism for Hardware Acceleration	2
Dataflow Driven Partitioning of Machine Learning Applications for Optimal Energy Use in Batteryless Systems	2
wfspan: Wait-free Dynamic Memory Management	2
Creating Hardware Component Knowledge Bases with Training Data Generation and Multi-task Learning	2
ACDSE: A Design Space Exploration Method for CNN Accelerator based on Adaptive Compression Mechanism	2
Experimental Demonstration of STT-MRAM-based Nonvolatile Instantly On/Off System for IoT Applications: Case Studies	2
Introduction to the Special Issue on Memory and Storage Systems for Embedded and IoT Applications	2
ARES: Persistently Secure Non-Volatile Memory with Processor-transparent and Hardware-friendly Integrity Verification and Metadata Recovery	2
HEART: H ybrid Memory and E nergy- A ware R eal- T	2
Hardware Performance Counters: Ready-Made vs Tailor-Made	1
XploreNAS : Explore Adversarially Robust and Hardware-efficient Neural Architectures for Non-ideal Xbars	1
A Unified Programmable Edge Matrix Processor for Deep Neural Networks and Matrix Algebra	1
Network-level Design Space Exploration of Resource-constrained Networks-of-Systems	1
TinyM 2 Net-V2: A Compact Low Power Software Hardware Architecture for M ulti m odal Deep Neural Networ	1
Code Generation For Neural Networks Based On Fixed-Point Arithmetic	1
Declarative Power Sequencing	1
A Hierarchical Hybrid Locking Protocol for Parallel Real-Time Tasks	1
Verifying Stochastic Hybrid Systems with Temporal Logic Specifications via Model Reduction	1
Toward Object-oriented Modeling in SCCharts	1
An Intermediate-Centric Dataflow for Transposed Convolution Acceleration on FPGA	1
Multi-bit Data Flow Error Detection Method Based on SDC Vulnerability Analysis	1
Code-size-aware Scheduling of Synchronous Dataflow Graphs on Multicore Systems	1
Neural Abstraction-Based Controller Synthesis and Deployment	1
Challenges and Opportunities of Security-Aware EDA	1
TCX: A RISC Style Tensor Computing Extension and a Programmable Tensor Processor	1
Hephaestus : Codesigning and Automating 3D Image Registration on Reconfigurable Architectures	1
Consistency vs. Availability in Distributed Cyber-Physical Systems	1
ATCN: Resource-efficient Processing of Time Series on Edge	1
Editorial	1