ACM Transactions on Embedded Computing Systems

Papers
(The median citation count of ACM Transactions on Embedded Computing Systems is 2. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2020-07-01 to 2024-07-01.)
ArticleCitations
Toward a Lingua Franca for Deterministic Concurrent Systems44
Edge-AI-Driven Framework with Efficient Mobile Network Design for Facial Expression Recognition36
TensorRT-Based Framework and Optimization Methodology for Deep Learning Inference on Jetson Boards34
MARS: mmWave-based Assistive Rehabilitation System for Smart Healthcare31
Game-Based Task Offloading of Multiple Mobile Devices with QoS in Mobile Edge Computing Systems of Limited Computation Capacity28
SIAM: Chiplet-based Scalable In-Memory Acceleration with Mesh for Deep Neural Networks27
Heuristic Computation Offloading Algorithms for Mobile Users in Fog Computing27
Deep Ensemble Learning for Human Activity Recognition Using Wearable Sensors via Filter Activation26
Verifying the Safety of Autonomous Systems with Neural Network Controllers25
Distributed Task Offloading and Resource Purchasing in NOMA-Enabled Mobile Edge Computing: Hierarchical Game Theoretical Approaches24
Side-channel Analysis of Lattice-based Post-quantum Cryptography: Exploiting Polynomial Multiplication24
Intermittent-Aware Neural Architecture Search22
Edge Intelligence: Concepts, Architectures, Applications, and Future Directions22
LATTE: L STM Self- Att ention based Anomaly Detection in E mbedded Automotive Platforms20
Algorithm-hardware Co-design of Attention Mechanism on FPGA Devices20
ROBIN: A Robust Optical Binary Neural Network Accelerator19
Reliability-aware Scheduling and Routing for Messages in Time-sensitive Networking19
Edge-SLAM: Edge-Assisted Visual Simultaneous Localization and Mapping19
Hardware Performance Counter-Based Fine-Grained Malware Detection18
SNR: S queezing N umerical R ange Defuses Bit Error Vulnerability Surface in Deep Neural Networks18
CAN Bus Intrusion Detection Based on Auxiliary Classifier GAN and Out-of-distribution Detection18
MHDeep: Mental Health Disorder Detection System Based on Wearable Sensors and Artificial Neural Networks17
A Survey of Blockchain Data Management Systems17
SLAQA17
HMDS: A Makespan Minimizing DAG Scheduler for Heterogeneous Distributed Systems16
Predictive Monitoring with Logic-Calibrated Uncertainty for Cyber-Physical Systems16
Learning Nondeterministic Real-Time Automata15
Camaroptera: A Long-range Image Sensor with Local Inference for Remote Sensing Applications15
Event-B Hybridation14
AppAxO : Designing App lication-specific A ppro x imate O 14
TAMA14
Real-time Attack-recovery for Cyber-physical Systems Using Linear-quadratic Regulator14
DFSynthesizer: Dataflow-based Synthesis of Spiking Neural Networks to Neuromorphic Hardware14
Improving Performance-Power-Programmability in Space Avionics with Edge Devices: VBN on Myriad2 SoC14
FELIX: A Ferroelectric FET Based Low Power Mixed-Signal In-Memory Architecture for DNN Acceleration13
SAGE: A Split-Architecture Methodology for Efficient End-to-End Autonomous Vehicle Control13
Towards an Integrated Vehicle Management System in DriveOS13
PhiNets: A Scalable Backbone for Low-power AI at the Edge13
Improving Power of DSP and CNN Hardware Accelerators Using Approximate Floating-point Multipliers13
Dealing with Uncertainty in pWCET Estimations13
RT-ZooKeeper: Taming the Recovery Latency of a Coordination Service12
Compositional Learning and Verification of Neural Network Controllers12
EC-ECC: Accelerating Elliptic Curve Cryptography for Edge Computing on Embedded GPU TX212
Post-Quantum Signatures on RISC-V with Hardware Acceleration12
Improving Variational Autoencoder based Out-of-Distribution Detection for Embedded Real-time Applications11
CICERO: A Domain-Specific Architecture for Efficient Regular Expression Matching11
Horizontal Side-Channel Vulnerabilities of Post-Quantum Key Exchange and Encapsulation Protocols11
DynO: Dynamic Onloading of Deep Neural Networks from Cloud to Device11
An Interpretable Machine Learning Model Enhanced Integrated CPU-GPU DVFS Governor11
AHA: An Agile Approach to the Design of Coarse-Grained Reconfigurable Accelerators and Compilers11
DNN Is Not All You Need: Parallelizing Non-neural ML Algorithms on Ultra-low-power IoT Processors10
Hardware Trojan Detection Using Machine Learning: A Tutorial10
A Composable Monitoring System for Heterogeneous Embedded Platforms10
Golden Chip-Free Trojan Detection Leveraging Trojan Trigger’s Side-Channel Fingerprinting10
Determinism10
CEDR: A Compiler-integrated, Extensible DSSoC Runtime10
Fast and Energy-Efficient State Checkpointing for Intermittent Computing10
Online Learning for Orchestration of Inference in Multi-user End-edge-cloud Networks10
Demystifying Energy Consumption Dynamics in Transiently powered Computers10
Human Activity Recognition on Microcontrollers with Quantized and Adaptive Deep Neural Networks10
FLASH: F ast Neura l A rchitecture S earch with H ardware9
Two Birds With One Stone: Boosting Both Search and Write Performance for Tree Indices on Persistent Memory9
Design Space Exploration for Secure IoT Devices and Cyber-Physical Systems9
Learning to Train CNNs on Faulty ReRAM-based Manycore Accelerators9
Heterogeneity-aware Multicore Synchronization for Intermittent Systems9
Side-channel and Fault-injection attacks over Lattice-based Post-quantum Schemes (Kyber, Dilithium): Survey and New Results9
Thermal-aware Adaptive Platform Management for Heterogeneous Embedded Systems9
Winograd Convolution for Deep Neural Networks: Efficient Point Selection9
Block Walsh–Hadamard Transform-based Binary Layers in Deep Neural Networks9
Horizontal Auto-Scaling for Multi-Access Edge Computing Using Safe Reinforcement Learning9
Trustworthy Autonomous System Development8
Design-Technology Co-Optimization for NVM-Based Neuromorphic Processing Elements8
Reducing Energy in GPGPUs through Approximate Trivial Bypassing8
Software Hint-Driven Data Management for Hybrid Memory in Mobile Systems8
SEAMS8
Optimus: An Operator Fusion Framework for Deep Neural Networks8
MemFHE: End-to-end Computing with Fully Homomorphic Encryption in Memory8
Synergistically Exploiting CNN Pruning and HLS Versioning for Adaptive Inference on Multi-FPGAs at the Edge8
Virtualizing a Post-Moore’s Law Analog Mesh Processor: The Case of a Photonic PDE Accelerator8
MAGNETO8
Software-Managed Read and Write Wear-Leveling for Non-Volatile Main Memory8
A Configurable CRYSTALS-Kyber Hardware Implementation with Side-Channel Protection8
Efficient Realization of Decision Trees for Real-Time Inference8
Domain-Specific Architectures: Research Problems and Promising Approaches8
An Energy-Efficient DRAM Cache Architecture for Mobile Platforms With PCM-Based Main Memory8
Test Generation for Hardware Trojan Detection Using Correlation Analysis and Genetic Algorithm7
RiSA: A Reinforced Systolic Array for Depthwise Convolutions and Embedded Tensor Reshaping7
HW-FlowQ: A Multi-Abstraction Level HW-CNN Co-design Quantization Methodology7
GMAI7
Rtkaller: State-aware Task Generation for RTOS Fuzzing7
Facilitating Human Activity Data Annotation via Context-Aware Change Detection on Smartwatches7
Chauffeur: Benchmark Suite for Design and End-to-End Analysis of Self-Driving Vehicles on Embedded Systems7
MaxTracker: Continuously Tracking the Maximum Computation Progress for Energy Harvesting ReRAM-based CNN Accelerators7
Domain-specific Hybrid Mapping for Energy-efficient Baseband Processing in Wireless Networks7
Sense Your Power7
Survey of Control-flow Integrity Techniques for Real-time Embedded Systems7
SPECTRUM7
Reliability Assessment and Safety Arguments for Machine Learning Components in System Assurance7
Energy-efficient Real-time Scheduling on Multicores6
AdaTest: Reinforcement Learning and Adaptive Sampling for On-chip Hardware Trojan Detection6
Beyond Cache Attacks6
Tolerating Defects in Low-Power Neural Network Accelerators Via Retraining-Free Weight Approximation6
Generalized Weakly Hard Schedulability Analysis for Real-Time Periodic Tasks6
Crab-tree6
Contention Grading and Adaptive Model Selection for Machine Vision in Embedded Systems6
Improving the Performance of Hybrid Caches Using Partitioned Victim Caching6
ETAP: Energy-aware Timing Analysis of Intermittent Programs6
Cache Interference-aware Task Partitioning for Non-preemptive Real-time Multi-core Systems6
SG-Float: Achieving Memory Access and Computing Power Reduction Using Self-Gating Float in CNNs6
Toward Adversary-aware Non-iterative Model Pruning through D ynamic N etwork R ewiring of DNNs6
UBAR6
??????: Utilizing Hyperdimensional Computing for a More Robust and Efficient Machine Learning System6
A Distributed Real-time Scheduling System for Industrial Wireless Networks6
Temporal Robustness of Temporal Logic Specifications: Analysis and Control Design6
EncoDeep6
DASS: Differentiable Architecture Search for Sparse Neural Networks6
Adaptive Task Allocation and Scheduling on NoC-based Multicore Platforms with Multitasking Processors6
QUAREM: Maximising QoE Through Adaptive Resource Management in Mobile MPSoC Platforms6
A TCAM-based Caching Architecture Framework for Packet Classification6
Synaptic Activity and Hardware Footprint of Spiking Neural Networks in Digital Neuromorphic Systems6
LPWAN in the TV White Spaces5
Hardware Acceleration for Embedded Keyword Spotting: Tutorial and Survey5
Hierarchical Resource Orchestration Framework for Real-time Containers5
Exploiting Activation Sparsity for Fast CNN Inference on Mobile GPUs5
Adaptive Computation Reuse for Energy-Efficient Training of Deep Neural Networks5
Minimizing Stack Memory for Partitioned Mixed-criticality Scheduling on Multiprocessor Platforms5
Multi-Compression Scale DNN Inference Acceleration based on Cloud-Edge-End Collaboration5
Application-centric Network Management - Addressing Safety and Real-time in V2X Applications5
Energy-efficient and Reliable Inference in Nonvolatile Memory under Extreme Operating Conditions5
Approximate Cache in GPGPUs5
Accelerating Attention Mechanism on FPGAs based on Efficient Reconfigurable Systolic Array5
Federated Self-training for Semi-supervised Audio Recognition5
Probabilistic Estimation of Threat Intrusion in Embedded Systems for Runtime Detection5
FARSI: An Early-stage Design Space Exploration Framework to Tame the Domain-specific System-on-chip Complexity5
Compositional Timing Analysis of Asynchronized Distributed Cause-effect Chains5
Vector Extensions in COTS Processors to Increase Guaranteed Performance in Real-Time Systems5
More Is Less: Model Augmentation for Intermittent Deep Inference5
Optimization of Signal Processing Applications Using Parameterized Error Models for Approximate Adders5
Skills Gaps in the Industry5
DSTL5
Quantized Sparse Training: A Unified Trainable Framework for Joint Pruning and Quantization in DNNs5
Comparative Analysis and Enhancement of CFG-based Hardware-Assisted CFI Schemes5
DIAC5
FedHIL: Heterogeneity Resilient Federated Learning for Robust Indoor Localization with Mobile Devices4
TinyNS: Platform-aware Neurosymbolic Auto Tiny Machine Learning4
MSYNC: A Generalized Formal Design Pattern for Virtually Synchronous Multirate Cyber-physical Systems4
Does SoC Hardware Development Become Agile by Saying So: A Literature Review and Mapping Study4
Introduction to the Special Issue on Memory and Storage Systems for Embedded and IoT Applications4
TAB: Unified and Optimized Ternary, Binary, and Mixed-precision Neural Network Inference on the Edge4
High-performance Reconfigurable DNN Accelerator on a Bandwidth-limited Embedded System4
CODEBench: A Neural Architecture and Hardware Accelerator Co-Design Framework4
Tutorial: Toward Robust Deep Learning against Poisoning Attacks4
Experimental Demonstration of STT-MRAM-based Nonvolatile Instantly On/Off System for IoT Applications: Case Studies4
Enhancing the Energy Efficiency and Robustness of tinyML Computer Vision Using Coarsely-quantized Log-gradient Input Images4
A Vector-Length Agnostic Compiler for the Connex-S Accelerator with Scratchpad Memory4
Efficient-Grad: Efficient Training Deep Convolutional Neural Networks on Edge Devices with Grad ient Optimizations4
Performance and Power Estimation of STT-MRAM Main Memory with Reliable System-level Simulation4
Agile Acceleration of Stateful Hash-based Signatures in Hardware4
A Passive Online Technique for Learning Hybrid Automata from Input/Output Traces4
Synthesis-guided Adversarial Scenario Generation for Gray-box Feedback Control Systems with Sensing Imperfections4
A Framework for Neural Network Architecture and Compile Co-optimization4
Microarchitectural Exploration of STT-MRAM Last-level Cache Parameters for Energy-efficient Devices4
Prepare: P owe r -Awar e A p proximate Re a l4
ARES: Persistently Secure Non-Volatile Memory with Processor-transparent and Hardware-friendly Integrity Verification and Metadata Recovery4
REPAIR: Control Flow Protection based on Register Pairing Updates for SW-Implemented HW Fault Tolerance4
Formally Verified Loop-Invariant Code Motion and Assorted Optimizations4
Scheduling in Real-Time Mobile Systems4
Formally Verified Next-generation Airborne Collision Avoidance Games in ACAS X4
On the RTL Implementation of FINN Matrix Vector Unit4
Applying Multiple Level Cell to Non-volatile FPGAs4
On-device Prior Knowledge Incorporated Learning for Personalized Atrial Fibrillation Detection4
DL-RSIM: A Reliability and Deployment Strategy Simulation Framework for ReRAM-based CNN Accelerators4
SensorGAN: A Novel Data Recovery Approach for Wearable Human Activity Recognition4
Secure and Lightweight Blockchain-based Truthful Data Trading for Real-Time Vehicular Crowdsensing4
Reconfigurable System-on-Chip Architectures for Robust Visual SLAM on Humanoid Robots4
Early DSE and Automatic Generation of Coarse-grained Merged Accelerators4
How Flexible is Your Computing System?3
TrustFlow-X3
OnSRAM: Efficient Inter-Node On-Chip Scratchpad Management in Deep Learning Accelerators3
Optimizing Tensor Contractions for Embedded Devices with Racetrack and DRAM Memories3
IoT-Fog-Cloud Centric Earthquake Monitoring and Prediction3
Cross-Layer Adaptation with Safety-Assured Proactive Task Job Skipping3
Code-size-aware Scheduling of Synchronous Dataflow Graphs on Multicore Systems3
Killing Processes or Killing Flash? Escaping from the Dilemma Using Lightweight, Compression-Aware Swap for Mobile Devices3
ViT4Mal: Lightweight Vision Transformer for Malware Detection on Edge Devices3
Holistic Resource Allocation Under Federated Scheduling for Parallel Real-time Tasks3
An Efficient CNN Accelerator for Low-Cost Edge Systems3
L 2 C: Combining Lossy and Lossless Compression on Memory and I/O3
A Framework for Calculating WCET Based on Execution Decision Diagrams3
A proven translation from a UML state machine subset to timed automata3
Hardware-friendly User-specific Machine Learning for Edge Devices3
Scenario Based Run-Time Switching for Adaptive CNN-Based Applications at the Edge3
Multi-bit Data Flow Error Detection Method Based on SDC Vulnerability Analysis3
Hardware Performance Counters: Ready-Made vs Tailor-Made3
ObNoCs : Protecting Network-on-Chip Fabrics Against Reverse-Engineering Attacks3
Probabilistic Risk-Aware Scheduling with Deadline Constraint for Heterogeneous SoCs3
Structured Proofs for Adversarial Cyber-Physical Systems3
SIKE in 32-bit ARM Processors Based on Redundant Number System for NIST Level-II3
A Write-Related and Read-Related DRAM Allocation Strategy Inside Solid-State Drives (SSDs)3
Energy-Efficient Approximate Edge Inference Systems3
Regime Inference for Sound Floating-Point Optimizations3
Prediction Modeling for Application-Specific Communication Architecture Design of Optical NoC3
Attack-resilient Fusion of Sensor Data with Uncertain Delays3
SHARP: An Adaptable, Energy-Efficient Accelerator for Recurrent Neural Networks3
Exploring Efficient Architectures on Remote In-Memory NVM over RDMA3
Risk of Stochastic Systems for Temporal Logic Specifications3
ACDSE: A Design Space Exploration Method for CNN Accelerator based on Adaptive Compression Mechanism2
Cryptographic Engineering a Fast and Efficient SIKE in FPGA2
Kryptonite: Worst-Case Program Interference Estimation on Multi-Core Embedded Systems2
A Review of Abstraction Methods Toward Verifying Neural Networks2
Mining Hyperproperties using Temporal Logics2
Optimal Checkpointing Strategy for Real-time Systems with Both Logical and Timing Correctness2
Benchmarking and Configuring Security Levels in Intermittent Computing2
IoV-Fog-Assisted Framework for Accident Detection and Classification2
HMT: A Hardware-centric Hybrid Bonsai Merkle Tree Algorithm for High-performance Authentication2
Cooperative Coevolution-based Design Space Exploration for Multi-mode Dataflow Mapping2
Firmness Analysis of Real-time Tasks2
Brain-inspired Cognition in Next-generation Racetrack Memories2
Hephaestus : Codesigning and Automating 3D Image Registration on Reconfigurable Architectures2
Improving Worst-case TSN Communication Times of Large Sensor Data Samples by Exploiting Synchronization2
TyBox: An Automatic Design and Code Generation Toolbox for TinyML Incremental On-Device Learning2
Resource-demand Estimation for Edge Tensor Processing Units2
DTRL: Decision Tree-based Multi-Objective Reinforcement Learning for Runtime Task Scheduling in Domain-Specific System-on-Chips2
Read Refresh Scheduling and Data Reallocation against Read Disturb in SSDs2
DirectNVM: Hardware-accelerated NVMe SSDs for High-performance Embedded Computing2
LL-GNN: Low Latency Graph Neural Networks on FPGAs for High Energy Physics2
Integrated Hardware Garbage Collection2
An Ultra-low-power Embedded AI Fire Detection and Crowd Counting System for Indoor Areas2
Schedulability Analysis for Timed Automata With Tasks2
Protecting Network-on-Chip Intellectual Property Using Timing Channel Fingerprinting2
XimSwap: Many-to-Many Face Swapping for TinyML2
PHiLIP on the HiL: Automated Multi-Platform OS Testing With External Reference Devices2
Criticality-aware Monitoring and Orchestration for Containerized Industry 4.0 Environments2
Creating Hardware Component Knowledge Bases with Training Data Generation and Multi-task Learning2
Supervisory Control for Dynamic Feature Configuration in Product Lines2
Efficient External Sorting for Memory-Constrained Embedded Devices with Flash Memory2
Overflow-free Compute Memories for Edge AI Acceleration2
HEART: H ybrid Memory and E nergy- A ware R eal- T 2
DyCo: Dynamic, Contextualized AI Models2
The Sparse Synchronous Model on Real Hardware2
Automatic Generation of Resource and Accuracy Configurable Processing Elements2
Lane Compression2
TinyM 2 Net-V2: A Compact Low-power Software Hardware Architecture for M ulti m odal Deep Neural Networ2
Code Generation For Neural Networks Based On Fixed-Point Arithmetic2
Neural Network Compression for Noisy Storage Devices2
Online Processing of Vehicular Data on the Edge Through an Unsupervised TinyML Regression Technique2
High-Level Approaches to Hardware Security: A Tutorial2
Resource-Efficient Continual Learning for Sensor-Based Human Activity Recognition2
Dataflow Driven Partitioning of Machine Learning Applications for Optimal Energy Use in Batteryless Systems2
Fine-grained Hardware Acceleration for Efficient Batteryless Intermittent Inference on the Edge2
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