OOIR: Observatory of International Research

Papers

(The H4-Index of ACM Transactions on Design Automation of Electronic Systems is 19. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2022-06-01 to 2026-06-01.)

Article	Citations
Layout Synthesis for Quantum Circuits Considering Toffoli Gate Decomposition	170
Reduced On-chip Storage of Seeds for Built-in Test Generation	40
Multi-Row Guiding Template Design for Lamellar Directed Self-Assembly with Self-Aligned Via Process	39
Exploring Large Language Models for Hierarchical Hardware Circuit and Testbench Generation	33
InterAxNN: Reconfigurable and Approximate in-Memory Processing Accelerator for Ultra-Low-Power Binary Neural Network Inference in Intermittently Powered Systems	32
Introduction to the Special Issue on Machine Learning for CAD, Part I	29
DNA: DC Nodal Analysis Attack for Evaluation of Analog Obfuscation Techniques	25
ARDiS: A Portable and Unified Resource Management Framework in Real Hardware Systems	25
IDeSyDe: Systematic Design Space Exploration via Design Space Identification	24
Scalable Yield Analysis of SRAM and Analog Circuits Using Multi-Kernel Sparse Representation	24
Inferencing on Edge Devices: A Time- and Space-aware Co-scheduling Approach	22
Fast Area Optimization Approach for XNOR/OR-based Fixed Polarity Reed-Muller Logic Circuits based on Multi-strategy Wolf Pack Algorithm	22
A Problem-tailored Adversarial Deep Neural Network-Based Attack Model for Feed-Forward Physical Unclonable Functions	22
EnVector: Encoding using Pattern based Vectors for Energy Efficient Non-Volatile Main Memories	19
DyLDPC: A Dynamic LDPC Code with Variable Correction Capability to Improve Decoding Performance for 3D NAND Flash Memory	19
A Mixed-Criticality Traffic Scheduler with Mitigating Congestion for CAN-to-TSN Gateway	19
PAPlace: Performance-Driven Differentiable Analog Placement	19
A High-Performance Accelerator for Real-Time Super-Resolution on Edge FPGAs	19
Graph Neural Networks for High-Level Synthesis Design Space Exploration	19