Formal Methods in System Design

Papers
(The median citation count of Formal Methods in System Design is 0. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2020-03-01 to 2024-03-01.)
ArticleCitations
Reluplex: a calculus for reasoning about deep neural networks18
Automatic verification of concurrent stochastic systems11
Boolean functional synthesis: hardness and practical algorithms6
Debug-localize-repair: a symbiotic construction for heap manipulations5
Distributed bounded model checking5
SAT modulo discrete event simulation applied to railway design capacity analysis5
Gray-box monitoring of hyperproperties with an application to privacy4
Abstraction and subsumption in modular verification of C programs4
Integrating formal specifications into applications: the ProB Java API4
Temporal prophecy for proving temporal properties of infinite-state systems3
On solving quantified bit-vector constraints using invertibility conditions3
Compositional verification of concurrent systems by combining bisimulations3
Multi-scale verification of distributed synchronisation3
Practical algebraic calculus and Nullstellensatz with the checkers Pacheck and Pastèque and Nuss-Checker2
Faster algorithms for quantitative verification in bounded treewidth graphs2
Learning inductive invariants by sampling from frequency distributions2
A relational shape abstract domain2
Bridging the gap between single- and multi-model predictive runtime verification2
Pegasus: sound continuous invariant generation2
Interpolating bit-vector formulas using uninterpreted predicates and Presburger arithmetic2
Two SAT solvers for solving quantified Boolean formulas with an arbitrary number of quantifier alternations2
Static detection of uncoalesced accesses in GPU programs2
Model checking boot code from AWS data centers2
Mining definitions in Kissat with Kittens2
Rely-guarantee bound analysis of parameterized concurrent shared-memory programs2
Symbolic encoding of LL(1) parsing and its applications2
Equivalence checking and intersection of deterministic timed finite state machines2
Certifying proofs for SAT-based model checking2
Stochastic games with lexicographic objectives1
Quasi-optimal partial order reduction1
Integrating ADTs in KeY and their application to history-based reasoning about collection1
Stratified guarded first-order transition systems1
Control strategies for off-line testing of timed systems1
SMT-based verification of program changes through summary repair1
Preface of the special issue on the conference on formal methods in computer aided design 20181
The complexity gap in the static analysis of cache accesses grows if procedure calls are added1
Introducing robust reachability1
Markov automata with multiple objectives1
LTL model checking of self modifying code1
Compositional runtime enforcement revisited1
Vacuity in synthesis1
Exact quantitative probabilistic model checking through rational search1
Extended bounded response LTL: a new safety fragment for efficient reactive synthesis1
Assumption-based Runtime Verification1
Formal methods: practical applications and foundations0
2018 CAV award0
The probabilistic termination tool amber0
Abstraction refinement and antichains for trace inclusion of infinite state systems0
Interpolation with guided refinement: revisiting incrementality in SAT-based unbounded model checking0
Extending rely-guarantee thinking to handle real-time scheduling0
Towards efficient verification of population protocols0
Synbit: synthesizing bidirectional programs using unidirectional sketches0
Functional synthesis via input–output separation0
Automated repair for timed systems0
Termination of triangular polynomial loops0
Incremental design-space model checking via reusable reachable state approximations0
Cut-off theorems for the PV-model0
On monitoring linear temporal properties0
Church synthesis on register automata over linearly ordered data domains0
Global guidance for local generalization in model checking0
Parameterized verification of leader/follower systems via first-order temporal logic0
From LTL to unambiguous Büchi automata via disambiguation of alternating automata0
Distributed parametric model checking timed automata under non-Zenoness assumption0
Relational abstract interpretation of arrays in assembly code0
Automated repair by example for firewalls0
Fingerprinting and analysis of Bluetooth devices with automata learning0
Memory access protocols: certified data-race freedom for GPU kernels0
Bounded-memory runtime enforcement with probabilistic and performance analysis0
Finite-trace and generalized-reactivity specifications in temporal synthesis0
Information-flow control on ARM and POWER multicore processors0
Preface for the formal methods in system design special issue on SYNT 20210
Preface of the special issue on the Conference on Formal Methods in Computer-Aided Design 20170
Specifiable robustness in reactive synthesis0
On multi-language abstraction: Towards a static analysis of multi-language programs0
Colored nested words0
Round- and context-bounded control of dynamic pushdown systems0
Achieving high coverage in hardware equivalence checking via concolic verification0
Machine learning and logic: a new frontier in artificial intelligence0
Certified SAT solving with GPU accelerated inprocessing0
Verification modulo theories0
Compositional verification of priority systems using sharp bisimulation0
Isla: integrating full-scale ISA semantics and axiomatic concurrency models (extended version)0
Correction: Parameterized verification of leader/follower systems via first-order temporal logic0
Automatic proofs of memory deallocation for a Whiley-to-C Compiler0
Edmund Melson Clarke, Jr. (1945–2020)0
Preface for the formal methods in system design special issue on ‘Formal Methods 2021’0
Hashing-based approximate counting of minimal unsatisfiable subsets0
Dissecting ltlsynt0
Static analysis for detecting high-level races in RTOS kernels0
Special Issue on Syntax-Guided Synthesis Preface0
Runtime verification of real-time event streams using the tool HStriver0
Partial bounding for recursive function synthesis0
Preface of the special issue on the conference on computer-aided verification 20180
From LTL to rLTL monitoring: improved monitorability through robust semantics0
Porous invariants for linear systems0
Enhancing active model learning with equivalence checking using simulation relations0
Concise outlines for a complex logic: a proof outline checker for TaDA0
Parameter synthesis for Markov models: covering the parameter space0
Formal methods: practical applications and foundations0
Thread-modular counter abstraction: automated safety and termination proofs of parameterized software by reduction to sequential program verification0
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