Analog Integrated Circuits and Signal Processing

Papers
(The TQCC of Analog Integrated Circuits and Signal Processing is 3. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2021-02-01 to 2025-02-01.)
ArticleCitations
A design approach for class-AB operational amplifier using the gm/ID methodology38
Parametric analysis on DC and analog/linearity response of multi-channel FinFET (Mch-FinFET) with spacer engineering32
Correlated multiple sampling technique - a discrete Fourier Transform analysis aimed for CMOS image sensors30
A 1 V 10-bit highly linear and monotonic digital-to-time converter with 0.066-LSB DNL utilizing a glitch-free dual reset method and switchable supply regulation scheme24
Exact design for the settling time of two-stage Miller compensated operational amplifiers22
Fpga implementation of an efficient phase shift beamformer for narrow band sub-GHz applications21
Dual polarized patch antenna array with improved isolation and gain for full-duplex wireless communications20
Hardware optimized digital down converter for multi-standard radio receiver19
Medical images transmission over Wireless Multimedia Sensor Networks with high data rate19
Battery voltage transfer method for multi-cells Li-ion battery pack protection chips17
Cadmium sulfide deposition suited for photo pattern-based SAW device16
Low input-resistance low-power transimpedance amplifier design for biomedical applications15
Deep and shallow fast embedded capsule networks: going faster with capsules15
A three-stage OTA with transistor impendence modulation compensation for ultra-large load applications15
Guest editorial15
An optimization of a non-volatile latch using memristors for sequential circuit applications14
A 25Gb/s VCSEL driver with overshoot suppression in 0.13$$\mu$$m SiGe BiCMOS technology14
Analysis of strong-arm comparator with auxiliary pair for offset calibration14
A fast transient response low-dropout regulator with all-NPN push–pull buffer in 0.6-μm bipolar process14
A compact adderless feed-forward incremental $$\varDelta \varSigma $$ with multiple global references for CMOS image sensors14
Analysis and design of sub-6 beam steerable antenna array using meta-material loaded vivaldi elements13
A picowatt, 3.88 ppm/°C, 0.011%/V subthreshold CMOS voltage reference biased by GSCC current source13
A TIQ based 6-bit 8 Gs/s time interleaved ADC design12
Design procedure for noise and power optimisation of CMOS folded-cascode operational transconductance amplifier based on the inversion coefficient12
A DTMOS-based power efficient recycling folded cascode operational transconductance amplifier11
A novel analog circuit fault diagnosis method based on multi-channel 1D-resnet and wavelet packet transform11
Sleepy keeper style based Low Power VLSI Architecture of a Viterbi Decoder applying for the Wireless LAN Operation sustainability11
Active and passive sensitivity analysis for the second-order active RC filter families using operational amplifier: a review11
Design of a low power and robust VLSI power line interference canceler with optimized arithmetic operators11
A 0.25–1.0 V fully synthesizable three-stage dynamic voltage comparator based XOR&XNOR&NAND&NOR logic11
Design of a tunable delay line with on-chip calibration to generate process-invariant PWM signal for in-memory computing11
FPGA-based implementation and verification of hybrid security algorithm for NoC architecture11
Hardware and coding efficiency assessment of 3D-HEVC DIS tool using alternative similarity criteria11
A novel read decoupled 8T1M nvSRAM cell with improved read/write margin11
A general purpose, low power, analog integrated image edge detector, based on a current-mode Gaussian function circuit10
An improved 1.8 V 4.05 ppm/°C curvature corrected bandgap reference circuit10
A 12-bit 10-MS/s SAR ADC with a weighted sampling time technique applied to C-DAC10
A programmable gain amplifier based on a two-level CNTFET op amp with optimized trans-conductance to drain current ratio9
A novel memristor-based method to compute eigenpairs9
$$\Delta \Sigma$$ Time-to-digital converter with current-steering vernier time integrator9
Design of energy efficient VCO for PLL application9
Novel architecture of four quadrant analog multiplier/divider circuit employing single CFOA9
A low-power 10Gb/s CMOS clock and data recovery circuit with a quarter-rate phase detector8
Memristive discrete chaotic neural network and its application in associative memory8
Energy efficient enhanced all pass transformation fostered variable digital filter design based on approximate adder and approximate multiplier for eradicating sensor nodes noise8
Linearization of microwave power amplifier using multi-port receiver with machine learning techniques in X-band8
Chip implementation of low-power high-efficient buck converter for battery-powered IOT applications8
Electronically tunable high frequency single output OTA and DVCC based meminductor8
A Novel Low Power 4:2 Compressor using FinFET Devices8
An 18–28 GHz dual-mode down-converter IC for 5G applications8
Tunable bandpass filter using double resistive feedback floating active inductor for 5 GHz wireless LAN Applications8
Recursive adaptive filtering algorithms for sparse channel identification and acoustic noise reduction7
Design and implementation of compact ultra-wideband vivaldi antenna with directors for microwave-based imaging of breast cancer7
CMOS realization of OTA based tunable grounded meminductor7
A mixed-mode on-chip automatic frequency tuning technique for biopotential amplifiers7
Grounded inductance simulator realization with single VDDDA7
SIFO–VM/TIM universal biquad filter using single DVCCTA with fully CMOS realization7
Bootstrapping techniques for energy-efficient successive approximation ADC7
Spectral efficiency of hybrid precoding and combining design for mm-Wave multi-user massive MIMO systems7
A 2.55-mW on-chip passive balun-LNA in 180-nm CMOS7
Memcapacitor emulator using VDTA-memristor7
Performance analysis of DD-DPMZM based RoF link for emerging wireless networks6
Rail-to-rail input/output bulk driven class AB operational amplifier with improved composite transistors6
An ultrawideband balanced antipodal vivaldi antenna for medical imaging applications with performance analysis for different surface finish materials6
A 9T high-stable and Low-Energy Half-Select-Free SRAM Cell Design using TMDFETs6
Design of high-performance quaternary half adder, full adder, and multiplier6
Correction: A floating memristor emulator for analog and digital applications with experimental results6
Third order quadrature oscillator and its application using CDBA6
A power-efficient high GBW operational amplifier with its analog baseband IC implementation in 40-nm CMOS technology6
Powerline interference reduction in ECG signals using variable notch filter designed via variational mode decomposition6
FPGA design and implementation of TRNG architecture using ADPLL based on fir as loop filter6
Low-power Relaxation Oscillator with Temperature-compensated Thyristor Decision Elements6
MEMS tunable filters based on DGS and waveguide structures: a literature review6
Design of DTMOS based third-order G$$_m$$-C filter for fast locking PLL6
Analog circuit architecture for max and min pooling methods on image6
A new dual memristor hyperchaotic system: dynamic properties, electronic circuit, and image encryption6
Finding all DC operating points of nonlinear circuits using interval linearization based method6
Chronos-v: a many-core high-level model with support for management techniques5
A multi-objective optimization of sensitivity and bandwidth of a 3-D MEMS bionic vector hydrophone5
Optimization of an SSHC-based full active rectifier for piezoelectric energy harvesting5
Design of low power single-stage bias current control technique- based DVGA for LTE receivers5
Systematic approach for IG-FinFET amplifier design using gm/Id method5
A fast configurable AGC for front-end of digital hearing aids5
28 GHz coupled-line-based CMOS power combiners and phase shifter, and power amplifiers with the power combiners5
Design and analysis of noninverting single-spiral CMOS Wilkinson power dividers and their quadrature couplers and baluns5
3–5 GHz FSK-OOK ultra wideband transmitter based on memristive ring oscillator5
Application of intermediate CMOS layer-based defected ground structure to design a dual-band on-chip antenna with improved gain5
A 350 mV, 2 MHz, 16-kb SRAM with programmable wordline boosting in the 65 nm CMOS technology5
Design analysis of GOS-HEFET on lower Subthreshold Swing SOI5
A deterministic digital calibration technique for pipelined ADCs using a non-nested algorithm5
A low-noise high-precision analog front end system for biopotential signals recording application5
Modelling of efficient nano-scale code converters using quantum dot cellular automata4
Realization of floating triple crossing memristor emulator with dual inflection point static characteristics4
An on-chip partial self-healing calibration technique for 10-bit reused distributed current steering DAC4
Optimal characterization of a microwave transistor using grey wolf algorithms4
Reliable set of random number generation using Astable Multivibrator PUF4
Correction to: Range resolution enhancement technique for dual demodulator continuous-time frequency modulation processing4
Design of a high precision CMOS programmable gain and data rate delta sigma ADC4
Current mode instrumentation amplifier with CDCCC4
A comprehensive review: ultra-low power all-digital phase-locked loop RF transceivers for biomedical monitoring applications4
Design and analysis of nonagonal patch unite with rectangular shaped 4-element UWB-MIMO antenna for portable wireless device applications4
Phase locked loop-based clock synthesizer for reconfigurable analog-to-digital converters4
Concentric semi-circular ring loaded multi-band antenna for wireless applications4
Power controlled system for self-sustained RF energy harvesting sensors4
3-D graphics of digital multiplier with Kogge-Stone adder4
A circuit-level methodology for leakage power reduction of high-efficient compressors in 22-nm CMOS technology4
Efficient hardware implementations of Lopez–Dahab projective co-ordinate based scalar multiplication of ECC4
Germanium pocket based tunnel FET with underlap: design and simulation4
Compact and asymmetric fed modified hexagonal shaped multiple-input multiple-output (MIMO) antenna for 5G sub: 6 GHz (N77/N78 & N79) and WLAN applications4
A power-aware task scheduler for energy harvesting-based wearable biomedical systems using snake optimizer4
CNTFET based inductance simulator circuits employing single CFOA and its filter applications4
Dual iterative algorithm for hybrid beamforming in mmWave downlink massive multi-user MIMO systems4
A novel microstrip antenna loaded with EBG and ELC for bandwidth enhancement4
A current limiter for satellite power protection4
OptiPlace: optimized placement solution for mixed-size designs4
SBCCI’2021 Guest Editorial4
Modeling and simulation of high flow medical CO2 insufflator using PID-P, PID-PQT, and MPC-PQT controllers4
Realization of inverse filters using second generation voltage conveyor (VCII)4
Rail-to-rail split-output SET tolerant digital gates4
Phase noise reduction by resistor abutment in differential ring VCOs4
A dual-input extended-dynamic-PCE rectifier for dedicated far-field RF energy harvesting systems4
A 13.56 MHz reconfigurable step-up switched capacitor converter for wireless power transfer system in implantable medical devices4
High isolation (300–3000) GHz MIMO antenna4
An innovative interconnect structure with improved Elmore delay estimation model for deep submicron technology3
Miniaturized uni-planar CSRR based quad-band antenna-analysis and investigation3
Low leakage 10T SRAM cell with improved data stability in deep sub-micron technologies3
A 2.28mW 100 MS/s 10-bit ping-pong configuration SAR-assisted pipeline ADC3
Design and implementation of high-performance 20-T hybrid full adder circuit3
Infrared image segmentation for circuit board based on active contour and fuzzy clustering3
Hard-disk drive read-channel design trade-offs for areal densities beyond 2 Tb/in23
A 223-$$\mu W$$ single-to-differential RF mixer with 8.6dBm IIP3 using current-bleeding and body-effect for sub-6 GHz 5G applications3
Flower shaped frequency coded chipless RFID tag for low cost item tracking3
Adaptive double recycling folded cascode amplifier3
A low-power differential readout interface for capacitive accelerometer-based SHM applications3
Evaluating FPGA-based denoising techniques for improved signal quality in electrocardiograms3
A circuit-level inverter-based switched capacitor integrator model justified by post-layout simulations of an incremental sigma-delta converter3
A 34.3 dB SNDR, 2.3GS/s, Sub-radix pipeline ADC using incomplete settling technique with background radix detector3
Low-voltage dynamic comparator using positive feedback bulk effect on a floating inverter amplifier3
Estimation of polarization diversity in CPW fed compact dual band dual sense antenna with horn slot structure: 5G and WLAN applications3
Design and analysis of a very low imbalance broadband active balun3
Fused empirical mode decomposition with spectral flatness and adaptive filtering technique for denoising of ECG signals3
A simple anti-parallel diodes based chaotic jerk circuit with arcsinh function: theoretical analysis and experimental verification3
Correction: A 9T high-stable and Low-Energy Half-Select-Free SRAM Cell Design using TMDFETs3
CNTFET based comparators: design, simulation and comparative analysis3
Sharing SIMD execution units with decoupled offloader in asymmetric multicores3
Novel single-trit comparator circuits in ternary quantum-dot cellular automata3
Design and verification of a high performance analog switch circuit3
Supplementary MOSFET-C transimpedance mode filters for wireless systems3
An optimization approach control of EV solar charging system with step-up DC–DC converter3
Compact fractal based UWB mimo antenna with dual band dispensation3
Design of a delay locked loop with low power and high operating frequency range characteristics in 180-nm CMOS process3
Extended Noise shaping of Cross-Coupled Sigma-Delta Modulator using optimized coefficients3
Adaptive self-threshold strategy of high speed comparator-based relaxation oscillator using 0.18-μm low-power CMOS design3
Design and applications of adjustable 2D digital filters with elliptical and circular symmetry3
A novel wide-band, small size and high gain patch antenna array for 5G mm-wave applications using adaptive neuro-fuzzy inference system3
Design and analysis of a SET tolerant single-phase clocked double-tail dynamic comparator3
An ultra low power analog integrated radial basis function classifier for smart IoT systems3
Thermally-aware circuit model and performance analysis of MLGNR for nano-interconnect application3
TSPC-HNTL: True Single Phase Clock technique for High speed, Noise Tolerance, and Low power3
Digitally controlled PWM buck converter employing counter and VCOs3
Fast DSE of reconfigurable accelerator systems via ensemble machine learning3
Model and design of an efficient controller for microgrid connected HRES system with integrated DC–DC converters: ATLA-GBDT approach3
VCSEL driver with synthesis of 25-Gb/s PAM-4 signal in 90-nm CMOS technology3
Analog circuit diagnosis based on support vector machine with parameter optimization by improved NKCGWO3
Signal dynamic range expansion and power supply voltage reduction for an exponentiation conversion IC3
A simple chaotic circuit based on memristor and its analyzation of bifurcation3
VDDDA based low power filter using 32 nm CNTFET technology3
Thermal readout noise comparison of classical constant bias APS and switching bias APS used in CMOS image sensors3
Implementation of novel full-wave rectifier using second generation current conveyor (CCII)3
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