OOIR: Observatory of International Research

Papers

(The TQCC of Journal of Electronic Testing-Theory and Applications is 3. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2022-08-01 to 2026-08-01.)

Article	Citations
Using both Stable and Unstable SRAM Bits for the Physical Unclonable Function	54
Achieving Agility in Projects Through Hierarchical Divisive Clustering Algorithm	22
Analysis of Combinational Circuit Failure Rate based on Graph Partitioning and Probabilistic Binomial Approach	19
Comparison of Single Event Effect and Space Electrostatic Discharge Effect on FPGA Signal Transmission	18
Read & Write Stability of CNTFET 6T SRAM Cell: A Comprehensive Analysis	16
On the Use of the Indirect Test Strategy for Lifetime Performance Monitoring of RF Circuits	16
Artificial Neural Network Based Prediction Model for IR Drop Measurement in a VLSI Power Delivery Network	12
Design and Verification of an Asynchronous NoC Router Architecture for GALS Systems	11
Design and Simulation of a Dependable Architecture Using Triple Modular Redundancy for Embedded Cyber-Physical Systems	11
Wafer-level Adaptive Testing Based on Dual-Predictor Collaborative Decision	10
Smell Detection Agent Optimization Approach to Path Generation in Automated Software Testing	10
Diagnosis of Analog and Digital Circuit Faults Using Exponential Deep Learning Neural Network	9
Logic Locking Based Configurable Obfuscation Cell for Enhanced IC Security	9
A Program-Output Estimator for Software Testing Using Program Analysis and Deep Learning Algorithms	8
A Feature-Adaptive and Scalable Hardware Trojan Detection Framework For Third-party IPs Utilizing Multilevel Feature Analysis and Random Forest	8
Investigation of Single Event Effects in a Resistive RAM Memory Array by Coupling TCAD and SPICE Simulations	8
Inherent Hardware Identifiers: Advancing IC Traceability and Provenance in the Multi-Die Era	8
A New Approximate 4-2 Compressor using Merged Sum and Carry	7
The Newsletter of the Test Technology Technical Council of the IEEE Computer Society	7
Performance Efficient and Fault Tolerant Approximate Adder	7
Enhanced Moth Flame Optimization Algorithm Entropy-Based Centroid SVM-Based Software Defect Prediction	7
Test Case Optimization using Machine Learning based Hybrid Meta-Heuristic Approach	7
SFFHO: Development of Statistical Fitness-based Fire Hawk Optimizer for Software Testing and Maintenance Approach using Adaptive Deep Learning Method	6
Hardware Trojan Detection Method Based on Dual Discriminator Assisted Conditional Generation Adversarial Network	6
Network-on-Chip and Photonic Network-on-Chip Basic Concepts: A Survey	6

Editorial	6
An End-to-End Mutually Exclusive Autoencoder Method for Analog Circuit Fault Diagnosis	6
Cost-Effective Path Delay Defect Testing Using Voltage/Temperature Analysis Based on Pattern Permutation	6
A Flexible Concurrent Testing Scheme for Non-Feedback and Feedback Bridging Faults in Integrated Circuits	6
Editorial	6
Editorial	5
Influence of Printed Circuit Board Dynamics on the Fretting Wear of Electronic Connectors: A Dynamic Analysis Approach	5
2021 JETTA-TTTC Best Paper Award	5
A Multi-Objective Test Scenario Prioritization Method Based on UML Activity Diagram	5
Development of a Simplified Programming Kit Based 16LF18856 for Embedded Systems Testing and Education in Developing Countries	5
GHOST: Graph-based Hardware Ownership Security through Traceability	5
Increased Detection of Hard-to-Detect Stuck-at Faults during Scan Shift	5
Advancing Low Power BIST Architecture with GAN-Driven Test Pattern Optimization	5
Firmware-Driven Adaptive Clock Tuning for Electromagnetic Interference Tolerance in Automotive Systems	5
Fault Modeling and Countermeasures for DRAM–Targeted Electromagnetic Fault Injection	5
Self Healing Controllers to Mitigate SEU in the Control Path of FPGA Based System: A Complete Intrinsic Evolutionary Approach	5
Interleaved Counter Matrix Code in SRAM Memories for Continuous Adjacent Multiple Bit Upset Correction	4
Chebyshev-based Algorithm: Achieving Fast ADC Static Parameter Testing Using a Low-precision Signal Source	4
Fault Diagnosis of Analog Circuits Using an Improved BiTCN Combined with BiLSTM	4
Syntactic and Semantic Analysis of Temporal Assertions to Support the Approximation of RTL Designs	4
2022 Reviewers	4
Real-time Embedded System Fault Injector Framework for Micro-architectural State Based Reliability Assessment	4
Test Technology Newsletter	4
A Method of Redundant Feature Suppression in Circuit Output Positions for Analog Circuit Soft and Hard Fault Diagnosis	4
A Quadruple-Node Upsets Hardened Latch Design Based on Cross-Coupled Elements	4
An Investigation into the Failure Characteristics of External PCB Traces with Different Angle Bends	4
PrecIRisc: A High-Precision and Low-Bloat Dynamic Binary Instrumentation Tailored for RISC Architectures	4
Instant Test and Repair for TSVs using Differential Signaling	4
Formal Verification of Universal Numbers using Theorem Proving	3
Beyond Power Side Channels: Impedance as a Cryptographic Threat	3
A Tunable Concurrent BIST Design Based on Reconfigurable LFSR	3
A Design for Single Event Transient Pulse Width Measurement in CMOS Technology	3
Efficient Test and Characterization of Space Transmit-Receive Modules Using Scalable and Multipurpose Automated Test System	3
Multi-modal Pre-silicon Evaluation of Hardware Masking Styles	3
Modular Test Kit – A Modular Approach for Efficient and Function-Oriented Testing	3
Automated Design Error Debugging of Digital VLSI Circuits	3
Investigation of Silicon Aging Effects in Dopingless PUF for Reliable Security Solution	3
ATPG Optimization for Bridging Faults in Incomplete Testing of SoCs	3
Design of INV/BUFF Logic Locking For Enhancing the Hardware Security	3
Equivalent Circuit and Damage Threshold Study of Communication Interfaces under HEMP	3
Towards the Detection of Hardware Trojans with Cost Effective Test Vectors using Genetic Algorithm	3
New Second-order Threshold Implementation of Sm4 Block Cipher	3
Dynamic Smartcard Protection and SSELUR-GRU-Based Attack Stage Identification in Industrial IoT	3