Journal of Electronic Testing-Theory and Applications

Papers
(The TQCC of Journal of Electronic Testing-Theory and Applications is 2. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2021-05-01 to 2025-05-01.)
ArticleCitations
Read & Write Stability of CNTFET 6T SRAM Cell: A Comprehensive Analysis20
Achieving Agility in Projects Through Hierarchical Divisive Clustering Algorithm20
Measurement and Simulation of the Near Magnetic Field Radiated by Integrated Magnetic Inductors15
Comparison of Single Event Effect and Space Electrostatic Discharge Effect on FPGA Signal Transmission15
Using both Stable and Unstable SRAM Bits for the Physical Unclonable Function15
Analysis of Combinational Circuit Failure Rate based on Graph Partitioning and Probabilistic Binomial Approach14
Retesting Defective Circuits to Allow Acceptable Faults for Yield Enhancement12
Design and Simulation of a Dependable Architecture Using Triple Modular Redundancy for Embedded Cyber-Physical Systems12
Resistance of the Montgomery Ladder Against Simple SCA: Theory and Practice11
On the Use of the Indirect Test Strategy for Lifetime Performance Monitoring of RF Circuits10
Analysis of Security Vulnerability Levels of In-Vehicle Network Topologies Applying Graph Representations10
A Secure and Robust PUF-based Key Generation with Wiretap Polar Coset Codes9
Design and Verification of an Asynchronous NoC Router Architecture for GALS Systems9
Spectrum Analyzer Based on a Dynamic Filter8
A Source-code Aware Method for Software Mutation Testing Using Artificial Bee Colony Algorithm7
Smell Detection Agent Optimization Approach to Path Generation in Automated Software Testing7
Diagnosis of Analog and Digital Circuit Faults Using Exponential Deep Learning Neural Network7
Inherent Hardware Identifiers: Advancing IC Traceability and Provenance in the Multi-Die Era6
Logic Locking Based Configurable Obfuscation Cell for Enhanced IC Security6
A New Approximate 4-2 Compressor using Merged Sum and Carry6
Performance Efficient and Fault Tolerant Approximate Adder6
Wafer-level Adaptive Testing Based on Dual-Predictor Collaborative Decision6
A Feature-Adaptive and Scalable Hardware Trojan Detection Framework For Third-party IPs Utilizing Multilevel Feature Analysis and Random Forest5
Network-on-Chip and Photonic Network-on-Chip Basic Concepts: A Survey5
Editorial5
Design of Radiation Hardened Latch and Flip-Flop with Cost-Effectiveness for Low-Orbit Aerospace Applications5
Investigation of Single Event Effects in a Resistive RAM Memory Array by Coupling TCAD and SPICE Simulations5
Advancing Low Power BIST Architecture with GAN-Driven Test Pattern Optimization5
Test Case Optimization using Machine Learning based Hybrid Meta-Heuristic Approach5
The Newsletter of the Test Technology Technical Council of the IEEE Computer Society5
Test Technology Newsletter5
Neuro-Fuzzy Evaluation of the Software Reliability Models by Adaptive Neuro Fuzzy Inference System4
A Flexible Concurrent Testing Scheme for Non-Feedback and Feedback Bridging Faults in Integrated Circuits4
Comparison of the Output Parameters of the Memristor-based Op-amp Model and the Traditional Op-amp Model4
Editorial4
An End-to-End Mutually Exclusive Autoencoder Method for Analog Circuit Fault Diagnosis4
Influence of Printed Circuit Board Dynamics on the Fretting Wear of Electronic Connectors: A Dynamic Analysis Approach4
Hardware Trojan Detection Method Based on Dual Discriminator Assisted Conditional Generation Adversarial Network4
Cost-Effective Path Delay Defect Testing Using Voltage/Temperature Analysis Based on Pattern Permutation4
CMOS Implementation and Performance Analysis of Known Approximate 4:2 Compressors4
2021 Reviewers3
Editorial3
Deep Soft Error Propagation Modeling Using Graph Attention Network3
Development of a Simplified Programming Kit Based 16LF18856 for Embedded Systems Testing and Education in Developing Countries3
2020 JETTA-TTTC Best Paper Award3
2022 Reviewers3
An Investigation into the Failure Characteristics of External PCB Traces with Different Angle Bends3
2021 JETTA-TTTC Best Paper Award3
Self Healing Controllers to Mitigate SEU in the Control Path of FPGA Based System: A Complete Intrinsic Evolutionary Approach3
Cross-PUF Attacks: Targeting FPGA Implementation of Arbiter-PUFs3
Interleaved Counter Matrix Code in SRAM Memories for Continuous Adjacent Multiple Bit Upset Correction3
Increased Detection of Hard-to-Detect Stuck-at Faults during Scan Shift3
A Quadruple-Node Upsets Hardened Latch Design Based on Cross-Coupled Elements2
Equivalent Circuit and Damage Threshold Study of Communication Interfaces under HEMP2
A Tunable Concurrent BIST Design Based on Reconfigurable LFSR2
New Second-order Threshold Implementation of Sm4 Block Cipher2
Test Technology Newsletter2
Syntactic and Semantic Analysis of Temporal Assertions to Support the Approximation of RTL Designs2
Hardware Efficient Approximate Multiplier Architecture for Image Processing Applications2
Automated Design Error Debugging of Digital VLSI Circuits2
Research on the Mechanical Properties of Magnetorheological Damping and the Performance of Microprobe Test Process2
Modular Test Kit – A Modular Approach for Efficient and Function-Oriented Testing2
Towards the Detection of Hardware Trojans with Cost Effective Test Vectors using Genetic Algorithm2
Built-In Self-Test for Multi-Threshold NULL Convention Logic Asynchronous Circuits using Pipeline Stage Parallelism2
Test Technology Newsletter2
Instant Test and Repair for TSVs using Differential Signaling2
Investigation of Silicon Aging Effects in Dopingless PUF for Reliable Security Solution2
Multi-modal Pre-silicon Evaluation of Hardware Masking Styles2
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