IEEE Transactions on Semiconductor Manufacturing

(The TQCC of IEEE Transactions on Semiconductor Manufacturing is 3. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2020-07-01 to 2024-07-01.)
A Deep Convolutional Neural Network for Wafer Defect Identification on an Imbalanced Dataset in Semiconductor Manufacturing Processes118
Deformable Convolutional Networks for Efficient Mixed-Type Wafer Defect Pattern Recognition92
A Light-Weight Neural Network for Wafer Map Classification Based on Data Augmentation59
Deep Learning-Based Domain Adaptation Method for Fault Diagnosis in Semiconductor Manufacturing51
Self-Supervised Representation Learning for Wafer Bin Map Defect Pattern Classification42
Semi-Supervised Multi-Label Learning for Classification of Wafer Bin Maps With Mixed-Type Defect Patterns40
SMT2020—A Semiconductor Manufacturing Testbed32
Memory-Augmented Convolutional Neural Networks With Triplet Loss for Imbalanced Wafer Defect Pattern Classification31
Model-Free Adaptive Iterative Learning Control Method for the Czochralski Silicon Monocrystalline Batch Process30
Variational Deep Clustering of Wafer Map Patterns30
Machine Learning-Based Detection Method for Wafer Test Induced Defects30
Data-Driven Framework for Tool Health Monitoring and Maintenance Strategy for Smart Manufacturing27
Temporal Convolution-Based Long-Short Term Memory Network With Attention Mechanism for Remaining Useful Life Prediction26
Support Weighted Ensemble Model for Open Set Recognition of Wafer Map Defects26
Applying Data Augmentation and Mask R-CNN-Based Instance Segmentation Method for Mixed-Type Wafer Maps Defect Patterns Classification26
Advanced Quality Control (AQC) of Silicon Wafer Specifications for Yield Enhancement for Smart Manufacturing23
Perspectives on Black Silicon in Semiconductor Manufacturing: Experimental Comparison of Plasma Etching, MACE, and Fs-Laser Etching22
CNNs Combined With a Conditional GAN for Mura Defect Classification in TFT-LCDs22
Adversarial Defect Detection in Semiconductor Manufacturing Process20
Deep Learning Approach to Inverse Grain Pattern of Nanosized Metal Gate for Multichannel Gate-All-Around Silicon Nanosheet MOSFETs20
Run-to-Run Control of Chemical Mechanical Polishing Process Based on Deep Reinforcement Learning20
Optimal Feature Selection for Defect Classification in Semiconductor Wafers19
Redefining Monitoring Rules for Intelligent Fault Detection and Classification via CNN Transfer Learning for Smart Manufacturing18
Methodology for Important Sensor Screening for Fault Detection and Classification in Semiconductor Manufacturing17
Use of Plasma Information in Machine-Learning-Based Fault Detection and Classification for Advanced Equipment Control17
An Improved Capsule Network (WaferCaps) for Wafer Bin Map Classification Based on DCGAN Data Upsampling17
Two-Stage Transfer Learning for Fault Prognosis of Ion Mill Etching Process15
Qualitative and Quantitative Analysis of Multi-Pattern Wafer Bin Maps15
Wafer Defect Pattern Labeling and Recognition Using Semi-Supervised Learning15
Integration of 650 V GaN Power ICs on 200 mm Engineered Substrates15
Development of a World Class Silicon Carbide Substrate Manufacturing Capability13
Mixed-Type Wafer Defect Recognition With Multi-Scale Information Fusion Transformer13
Wafer Bin Map Recognition With Autoencoder-Based Data Augmentation in Semiconductor Assembly Process12
Data-Driven Model Predictive Control of Cz Silicon Single Crystal Growth Process With V/G Value Soft Measurement Model12
Dynamic Clustering for Wafer Map Patterns Using Self-Supervised Learning on Convolutional Autoencoders12
Virtual Metrology for Etch Profile in Silicon Trench Etching With SF₆/O₂/Ar Plasma11
Machine Learning-Based Process-Level Fault Detection and Part-Level Fault Classification in Semiconductor Etch Equipment11
Application of ANN for Fault Detection in Overhead Transport Systems for Semiconductor Fab11
Fuzzy Selection Model for Quality-Based IC Packaging Process Outsourcers11
Locally Adaptive Statistical Background Modeling With Deep Learning-Based False Positive Rejection for Defect Detection in Semiconductor Units10
Hidden Wafer Scratch Defects Projection for Diagnosis and Quality Enhancement10
Flow Analysis and Relative Humidity (RH) Measurement in the Horizontal Plane of a Front Opening Unified Pod (FOUP)10
Detection and Recognition of Mixed-Type Defect Patterns in Wafer Bin Maps via Tensor Voting10
One Class Process Anomaly Detection Using Kernel Density Estimation Methods10
The Environmental Footprint of IC Production: Review, Analysis, and Lessons From Historical Trends10
Development of Diaphragm and Microtunnel Structures for MEMS Piezoelectric Sensors10
Adaptive Cautious Regularized Run-to-Run Controller for Lithography Process10
Deep Learning-Based Positioning Error Fault Diagnosis of Wire Bonding Equipment and an Empirical Study for IC Packaging9
CMP Process Optimization Engineering by Machine Learning9
Optimizing the Isotropic Etching Nature and Etch Profile of Si, Ge and Si0.8Ge0.2 by Controlling CF4 Atmosphere With Ar and O2 Additives in ICP9
Noncyclic Scheduling of Multi-Cluster Tools With Residency Constraints Based on Pareto Optimization9
Efficient and Refined Deep Convolutional Features Network for the Crack Segmentation of Solar Cell Electroluminescence Images9
TestDNA: Novel Wafer Defect Signature for Diagnosis and Pattern Recognition9
A Graph-Theoretic Approach for Spatial Filtering and Its Impact on Mixed-Type Spatial Pattern Recognition in Wafer Bin Maps8
Atomic Layer Processes for Material Growth and Etching—A Review8
A Sequential Search Method of Dispatching Rules for Scheduling of LCD Manufacturing Systems8
Similarity Search on Wafer Bin Map Through Nonparametric and Hierarchical Clustering8
Machine Learning Models for Edge Placement Error Based Etch Bias8
Combination of Convolutional and Generative Adversarial Networks for Defect Image Demoiréing of Thin-Film Transistor Liquid-Crystal Display Image8
Discovery of Resource-Oriented Transition Systems for Yield Enhancement in Semiconductor Manufacturing8
Planned Maintenance Schedule Update Method for Predictive Maintenance of Semiconductor Plasma Etcher8
Wafer Reflectance Prediction for Complex Etching Process Based on K-Means Clustering and Neural Network7
Semi-Supervised Learning for Simultaneous Location Detection and Classification of Mixed-Type Defect Patterns in Wafer Bin Maps7
Data Visualization of Anomaly Detection in Semiconductor Processing Tools7
Synthesis of Lithography Test Patterns Using Machine Learning Model7
Unrelated Parallel Machine Photolithography Scheduling Problem With Dual Resource Constraints6
Data-Driven and Mechanism-Based Hybrid Model for Semiconductor Silicon Monocrystalline Quality Prediction in the Czochralski Process6
Attention Mechanism-Based Root Cause Analysis for Semiconductor Yield Enhancement Considering the Order of Manufacturing Processes6
Performance-Based Active Wafer Clamp Design for Wafer Heating Effects in EUV Lithography6
Optical Proximity Correction Using Bidirectional Recurrent Neural Network With Attention Mechanism6
Influence and Suppression of Harmful Effects Due to By-Product in CVD Reactor for 4H-SiC Epitaxy6
A Real-Time Monitoring Framework for Wafer Fabrication Processes With Run-to-Run Variations6
A Study on the Impact of Mid-Gap Defects on Vertical GaN Diodes6
Edge Effects of an Eddy-Current Thickness Sensor During Chemical Mechanical Polishing6
A Comparative Study on Velocity Fields, Humidity and Oxygen Concentration in a Front Opening Unified Pod (FOUP) During Purge5
Customer Order Behavior Classification Via Convolutional Neural Networks in the Semiconductor Industry5
Feature Selection for Waiting Time Predictions in Semiconductor Wafer Fabs5
Effective Variational-Autoencoder-Based Generative Models for Highly Imbalanced Fault Detection Data in Semiconductor Manufacturing5
An Autoencoder-Based Approach for Fault Detection in Multi-Stage Manufacturing: A Sputter Deposition and Rapid Thermal Processing Case Study5
Improvement of Multi-Lines Bridge Defect Classification by Hierarchical Architecture in Artificial Intelligence Automatic Defect Classification5
Improved Color Defect Detection With Machine Learning for After Develop Inspections in Lithography5
Adaptive Weight Tuning of EWMA Controller via Model-Free Deep Reinforcement Learning5
Prediction of Highly Imbalanced Semiconductor Chip-Level Defects in Module Tests Using Multimodal Fusion and Logit Adjustment5
Development of SiGe Indentation Process Control for Gate-All-Around FET Technology Enablement5
A New Stage-Wise Control Release Policy for Semiconductor Wafer Fabrication Systems4
Optimal Cyclic Scheduling of Wafer-Residency-Time-Constrained Dual-Arm Cluster Tools by Configuring Processing Modules and Robot Waiting Time4
Improvement of Virtual Diagnostics Performance for Plasma Density in Semiconductor Etch Equipment Using Variational Auto-Encoder4
Nano-Scale Depth Profiles of Electrical Properties of Phosphorus Doped Silicon for Ultra-Shallow Junction Evaluation4
Quality-Oriented Statistical Process Control Utilizing Bayesian Modeling4
The Effect of Purge Flow Rate and Wafer Arrangement on Humidity Invasion Into a Loaded Front Opening Unified Pod (FOUP)4
CNN-Based Layout Segment Classification for Analysis of Layout-Induced Failures4
Decrease in Particles by Substituting Conductive Magnesium-Oxide Based Ceramics for Conventional Electrode Materials Used in Process Chamber of Plasma Etching4
Enhancement of Diffraction-Based Overlay Model for Overlay Target With Asymmetric Sidewall4
A One-Shot Learning Approach for Similarity Retrieval of Wafer Bin Maps With Unknown Failure Pattern4
Minimizing Convolutional Neural Network Training Data With Proper Data Augmentation for Inline Defect Classification4
A Fine-Grained, End-to-End Feature-Scale CMP Modeling Paradigm Based on Fully Convolutional Neural Networks4
Study on Mechanical Cleavage Mechanism of GaAs via Anisotropic Stress Field and Experiments4
An Advanced Finite Element Model for BiCMOS Process Oriented Ultra-Thin Wafer Deformation4
Exploiting 2D Coordinates as Bayesian Priors for Deep Learning Defect Classification of SEM Images4
High Accuracy Simulation of Silicon Oxynitride Film Grown by Plasma Enhanced Chemical Vapor Deposition3
Matheuristics for Qualification Management Decisions in Wafer Fabs3
Investigation of the HfON Tunneling Layer of MONOS Device for Low-Voltage and High-Speed Operation Nonvolatile Memory Application3
Automatic Defect Detection in Epitaxial Layers by Micro Photoluminescence Imaging3
Shear Force Classification Before Wire Bonding Based on Probe Mark 2-D Images Using Machine Learning Methods3
Anomaly Detection in Batch Manufacturing Processes Using Localized Reconstruction Errors From 1-D Convolutional AutoEncoders3
A Deep Learning Analysis Framework for Complex Wafer Bin Map Classification3
Correlated Bayesian Co-Training for Virtual Metrology3
Optimization and Application of TiO2 Hollow Microsphere Modified Scattering Layer for the Photovoltaic Conversion Efficiency of Dye-Sensitized Solar Cell3
Machine Learning-Based Edge Placement Error Analysis and Optimization: A Systematic Review3
Improving Liquid Film Thickness Uniformity of Semiconductor Etching Equipment Using Flow Field Visualization and CFD Simulation3
Self-Assured Deep Learning With Minimum Pre-Labeled Data for Wafer Pattern Classification3
Joint Dynamic Dispatching and Preventive Maintenance for Unrelated Parallel Machines With Equipment Health Considerations3
Advanced Low Pin Count Test Architecture for Efficient Multi-Site Testing3
RoIA: Region of Interest Attention Network for Surface Defect Detection3
Improvement of ZnO/Si Heterojunctions With a Coaxial Circular Transmission Line Model Applicable to Both Ohmic and Schottky3
A Self-Test Method of Structural Failures of Uncooled Infrared Focal Plane Array3
Precise Pattern Alignment for Die-to-Database Inspection Based on the Generative Adversarial Network3
Understanding and Improving Virtual Metrology Systems Using Bayesian Methods3
Modeling and Optimizing the Impact of Process and Equipment Parameters in Sputtering Deposition Systems Using a Gaussian Process Machine Learning Framework3
Double Coating Process Using the Single Photoresist and the Thickness Prediction3
Process Optimization and Modeling of the Silicon Growth in Trichlorosilane-Hydrogen Gas Mixture in a Planetary CVD Reactor3
EveSyncIAI: Event Synchronization Industrial Augmented Intelligence for Fault Diagnosis3
Which Spare Parts Service Measure to Choose for a Front-End Wafer Fab?3
Semiconductor Defect Pattern Classification by Self-Proliferation-and-Attention Neural Network3