IEEE Transactions on Semiconductor Manufacturing

Papers
(The TQCC of IEEE Transactions on Semiconductor Manufacturing is 3. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2020-11-01 to 2024-11-01.)
ArticleCitations
Deformable Convolutional Networks for Efficient Mixed-Type Wafer Defect Pattern Recognition108
A Light-Weight Neural Network for Wafer Map Classification Based on Data Augmentation60
Self-Supervised Representation Learning for Wafer Bin Map Defect Pattern Classification47
Semi-Supervised Multi-Label Learning for Classification of Wafer Bin Maps With Mixed-Type Defect Patterns41
Model-Free Adaptive Iterative Learning Control Method for the Czochralski Silicon Monocrystalline Batch Process37
Machine Learning-Based Detection Method for Wafer Test Induced Defects34
SMT2020—A Semiconductor Manufacturing Testbed32
Memory-Augmented Convolutional Neural Networks With Triplet Loss for Imbalanced Wafer Defect Pattern Classification31
Data-Driven Framework for Tool Health Monitoring and Maintenance Strategy for Smart Manufacturing30
Applying Data Augmentation and Mask R-CNN-Based Instance Segmentation Method for Mixed-Type Wafer Maps Defect Patterns Classification27
Temporal Convolution-Based Long-Short Term Memory Network With Attention Mechanism for Remaining Useful Life Prediction27
Support Weighted Ensemble Model for Open Set Recognition of Wafer Map Defects27
Perspectives on Black Silicon in Semiconductor Manufacturing: Experimental Comparison of Plasma Etching, MACE, and Fs-Laser Etching25
Advanced Quality Control (AQC) of Silicon Wafer Specifications for Yield Enhancement for Smart Manufacturing23
Adversarial Defect Detection in Semiconductor Manufacturing Process22
CNNs Combined With a Conditional GAN for Mura Defect Classification in TFT-LCDs22
Optimal Feature Selection for Defect Classification in Semiconductor Wafers21
Deep Learning Approach to Inverse Grain Pattern of Nanosized Metal Gate for Multichannel Gate-All-Around Silicon Nanosheet MOSFETs21
Redefining Monitoring Rules for Intelligent Fault Detection and Classification via CNN Transfer Learning for Smart Manufacturing20
Use of Plasma Information in Machine-Learning-Based Fault Detection and Classification for Advanced Equipment Control19
An Improved Capsule Network (WaferCaps) for Wafer Bin Map Classification Based on DCGAN Data Upsampling18
Mixed-Type Wafer Defect Recognition With Multi-Scale Information Fusion Transformer17
Methodology for Important Sensor Screening for Fault Detection and Classification in Semiconductor Manufacturing17
The Environmental Footprint of IC Production: Review, Analysis, and Lessons From Historical Trends17
Wafer Defect Pattern Labeling and Recognition Using Semi-Supervised Learning16
Two-Stage Transfer Learning for Fault Prognosis of Ion Mill Etching Process15
Qualitative and Quantitative Analysis of Multi-Pattern Wafer Bin Maps15
Development of a World Class Silicon Carbide Substrate Manufacturing Capability15
Integration of 650 V GaN Power ICs on 200 mm Engineered Substrates15
Data-Driven Model Predictive Control of Cz Silicon Single Crystal Growth Process With V/G Value Soft Measurement Model14
Machine Learning-Based Process-Level Fault Detection and Part-Level Fault Classification in Semiconductor Etch Equipment14
Wafer Bin Map Recognition With Autoencoder-Based Data Augmentation in Semiconductor Assembly Process13
Virtual Metrology for Etch Profile in Silicon Trench Etching With SF₆/O₂/Ar Plasma12
Dynamic Clustering for Wafer Map Patterns Using Self-Supervised Learning on Convolutional Autoencoders12
CMP Process Optimization Engineering by Machine Learning12
Detection and Recognition of Mixed-Type Defect Patterns in Wafer Bin Maps via Tensor Voting11
Fuzzy Selection Model for Quality-Based IC Packaging Process Outsourcers11
A Graph-Theoretic Approach for Spatial Filtering and Its Impact on Mixed-Type Spatial Pattern Recognition in Wafer Bin Maps11
One Class Process Anomaly Detection Using Kernel Density Estimation Methods11
Adaptive Cautious Regularized Run-to-Run Controller for Lithography Process11
Similarity Search on Wafer Bin Map Through Nonparametric and Hierarchical Clustering11
Semi-Supervised Learning for Simultaneous Location Detection and Classification of Mixed-Type Defect Patterns in Wafer Bin Maps11
Deep Learning-Based Positioning Error Fault Diagnosis of Wire Bonding Equipment and an Empirical Study for IC Packaging10
Effective Variational-Autoencoder-Based Generative Models for Highly Imbalanced Fault Detection Data in Semiconductor Manufacturing10
Development of Diaphragm and Microtunnel Structures for MEMS Piezoelectric Sensors10
Flow Analysis and Relative Humidity (RH) Measurement in the Horizontal Plane of a Front Opening Unified Pod (FOUP)10
Hidden Wafer Scratch Defects Projection for Diagnosis and Quality Enhancement10
Optimizing the Isotropic Etching Nature and Etch Profile of Si, Ge and Si0.8Ge0.2 by Controlling CF4 Atmosphere With Ar and O2 Additives in ICP9
Influence and Suppression of Harmful Effects Due to By-Product in CVD Reactor for 4H-SiC Epitaxy9
Atomic Layer Processes for Material Growth and Etching—A Review9
Planned Maintenance Schedule Update Method for Predictive Maintenance of Semiconductor Plasma Etcher9
Efficient and Refined Deep Convolutional Features Network for the Crack Segmentation of Solar Cell Electroluminescence Images9
Wafer Reflectance Prediction for Complex Etching Process Based on K-Means Clustering and Neural Network8
Discovery of Resource-Oriented Transition Systems for Yield Enhancement in Semiconductor Manufacturing8
A Sequential Search Method of Dispatching Rules for Scheduling of LCD Manufacturing Systems8
Machine Learning Models for Edge Placement Error Based Etch Bias8
An Autoencoder-Based Approach for Fault Detection in Multi-Stage Manufacturing: A Sputter Deposition and Rapid Thermal Processing Case Study7
Data Visualization of Anomaly Detection in Semiconductor Processing Tools7
Development of SiGe Indentation Process Control for Gate-All-Around FET Technology Enablement7
A Fine-Grained, End-to-End Feature-Scale CMP Modeling Paradigm Based on Fully Convolutional Neural Networks7
Synthesis of Lithography Test Patterns Using Machine Learning Model7
Attention Mechanism-Based Root Cause Analysis for Semiconductor Yield Enhancement Considering the Order of Manufacturing Processes7
Data-Driven and Mechanism-Based Hybrid Model for Semiconductor Silicon Monocrystalline Quality Prediction in the Czochralski Process7
A Real-Time Monitoring Framework for Wafer Fabrication Processes With Run-to-Run Variations7
Optical Proximity Correction Using Bidirectional Recurrent Neural Network With Attention Mechanism6
Unrelated Parallel Machine Photolithography Scheduling Problem With Dual Resource Constraints6
A Study on the Impact of Mid-Gap Defects on Vertical GaN Diodes6
Decrease in Particles by Substituting Conductive Magnesium-Oxide Based Ceramics for Conventional Electrode Materials Used in Process Chamber of Plasma Etching6
Edge Effects of an Eddy-Current Thickness Sensor During Chemical Mechanical Polishing6
A One-Shot Learning Approach for Similarity Retrieval of Wafer Bin Maps With Unknown Failure Pattern5
Prediction of Highly Imbalanced Semiconductor Chip-Level Defects in Module Tests Using Multimodal Fusion and Logit Adjustment5
Improved Color Defect Detection With Machine Learning for After Develop Inspections in Lithography5
A New Stage-Wise Control Release Policy for Semiconductor Wafer Fabrication Systems5
Nano-Scale Depth Profiles of Electrical Properties of Phosphorus Doped Silicon for Ultra-Shallow Junction Evaluation5
Improvement of Multi-Lines Bridge Defect Classification by Hierarchical Architecture in Artificial Intelligence Automatic Defect Classification5
A Comparative Study on Velocity Fields, Humidity and Oxygen Concentration in a Front Opening Unified Pod (FOUP) During Purge5
Optimal Cyclic Scheduling of Wafer-Residency-Time-Constrained Dual-Arm Cluster Tools by Configuring Processing Modules and Robot Waiting Time5
Customer Order Behavior Classification Via Convolutional Neural Networks in the Semiconductor Industry5
Feature Selection for Waiting Time Predictions in Semiconductor Wafer Fabs5
Adaptive Weight Tuning of EWMA Controller via Model-Free Deep Reinforcement Learning5
RoIA: Region of Interest Attention Network for Surface Defect Detection4
Study on Mechanical Cleavage Mechanism of GaAs via Anisotropic Stress Field and Experiments4
Understanding and Improving Virtual Metrology Systems Using Bayesian Methods4
Improvement of Virtual Diagnostics Performance for Plasma Density in Semiconductor Etch Equipment Using Variational Auto-Encoder4
Automatic Defect Classification Using Semi-Supervised Learning With Defect Localization4
Shear Force Classification Before Wire Bonding Based on Probe Mark 2-D Images Using Machine Learning Methods4
Wafer Scratch Pattern Reconstruction for High Diagnosis Accuracy and Yield Optimization4
On the Fly Ellipsometry Imaging for Process Deviation Detection4
Which Spare Parts Service Measure to Choose for a Front-End Wafer Fab?4
A Deep Learning Analysis Framework for Complex Wafer Bin Map Classification4
Exploiting 2D Coordinates as Bayesian Priors for Deep Learning Defect Classification of SEM Images4
Improving Liquid Film Thickness Uniformity of Semiconductor Etching Equipment Using Flow Field Visualization and CFD Simulation4
An Advanced Finite Element Model for BiCMOS Process Oriented Ultra-Thin Wafer Deformation4
Anomaly Detection in Batch Manufacturing Processes Using Localized Reconstruction Errors From 1-D Convolutional AutoEncoders4
Minimizing Convolutional Neural Network Training Data With Proper Data Augmentation for Inline Defect Classification4
Practical Q-Learning-Based Route-Guidance and Vehicle Assignment for OHT Systems in Semiconductor Fabs4
High Accuracy Simulation of Silicon Oxynitride Film Grown by Plasma Enhanced Chemical Vapor Deposition4
Thermal and Electrical Analysis of the Electrostatic Chuck for the Etch Equipment4
The Effect of Purge Flow Rate and Wafer Arrangement on Humidity Invasion Into a Loaded Front Opening Unified Pod (FOUP)4
TestDNA-E: Wafer Defect Signature for Pattern Recognition by Ensemble Learning4
Quality-Oriented Statistical Process Control Utilizing Bayesian Modeling4
CNN-Based Layout Segment Classification for Analysis of Layout-Induced Failures4
Improvement of ZnO/Si Heterojunctions With a Coaxial Circular Transmission Line Model Applicable to Both Ohmic and Schottky3
A Self-Test Method of Structural Failures of Uncooled Infrared Focal Plane Array3
Correlated Bayesian Co-Training for Virtual Metrology3
Matheuristics for Qualification Management Decisions in Wafer Fabs3
Investigation of the HfON Tunneling Layer of MONOS Device for Low-Voltage and High-Speed Operation Nonvolatile Memory Application3
Double Coating Process Using the Single Photoresist and the Thickness Prediction3
Joint Dynamic Dispatching and Preventive Maintenance for Unrelated Parallel Machines With Equipment Health Considerations3
Vehicle Look-Ahead Dispatching for Overhead Hoist Transport System in Semiconductor Manufacturing3
EveSyncIAI: Event Synchronization Industrial Augmented Intelligence for Fault Diagnosis3
Semiconductor Defect Pattern Classification by Self-Proliferation-and-Attention Neural Network3
A Practical Approach for Managing End-of-Life Systems in Semiconductor Manufacturing Using Health Index3
Iterative Learning-Based Predictive Control Method for Electronic Grade Silicon Single Crystal Batch Process3
SWaCo: Safe Wafer Bin Map Classification With Self-Supervised Contrastive Learning3
Chamber and Recipe-Independent FDC Indicator in High-Mix Semiconductor Manufacturing3
Automatic Defect Detection in Epitaxial Layers by Micro Photoluminescence Imaging3
Fast and Precise Temperature Control for a Semiconductor Vertical Furnace via Heater-Cooler Integration3
Precise Pattern Alignment for Die-to-Database Inspection Based on the Generative Adversarial Network3
Optimization and Application of TiO2 Hollow Microsphere Modified Scattering Layer for the Photovoltaic Conversion Efficiency of Dye-Sensitized Solar Cell3
Machine Learning-Based Edge Placement Error Analysis and Optimization: A Systematic Review3
Modeling and Optimizing the Impact of Process and Equipment Parameters in Sputtering Deposition Systems Using a Gaussian Process Machine Learning Framework3
A Modified Lasso Model for Yield Analysis Considering the Interaction Effect in a Multistage Manufacturing Line3
Process Optimization and Modeling of the Silicon Growth in Trichlorosilane-Hydrogen Gas Mixture in a Planetary CVD Reactor3
Self-Assured Deep Learning With Minimum Pre-Labeled Data for Wafer Pattern Classification3
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