IEEE Transactions on Semiconductor Manufacturing

Papers
(The TQCC of IEEE Transactions on Semiconductor Manufacturing is 3. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2020-04-01 to 2024-04-01.)
ArticleCitations
A Deep Convolutional Neural Network for Wafer Defect Identification on an Imbalanced Dataset in Semiconductor Manufacturing Processes108
Deformable Convolutional Networks for Efficient Mixed-Type Wafer Defect Pattern Recognition82
A Light-Weight Neural Network for Wafer Map Classification Based on Data Augmentation53
Deep Learning-Based Domain Adaptation Method for Fault Diagnosis in Semiconductor Manufacturing48
Active Learning of Convolutional Neural Network for Cost-Effective Wafer Map Pattern Classification38
Self-Supervised Representation Learning for Wafer Bin Map Defect Pattern Classification37
Semi-Supervised Multi-Label Learning for Classification of Wafer Bin Maps With Mixed-Type Defect Patterns33
SMT2020—A Semiconductor Manufacturing Testbed31
Model-Free Adaptive Iterative Learning Control Method for the Czochralski Silicon Monocrystalline Batch Process29
Memory-Augmented Convolutional Neural Networks With Triplet Loss for Imbalanced Wafer Defect Pattern Classification28
Machine Learning-Based Detection Method for Wafer Test Induced Defects28
Data-Driven Framework for Tool Health Monitoring and Maintenance Strategy for Smart Manufacturing27
Variational Deep Clustering of Wafer Map Patterns26
Applying Data Augmentation and Mask R-CNN-Based Instance Segmentation Method for Mixed-Type Wafer Maps Defect Patterns Classification23
Advanced Quality Control (AQC) of Silicon Wafer Specifications for Yield Enhancement for Smart Manufacturing22
Support Weighted Ensemble Model for Open Set Recognition of Wafer Map Defects22
CNNs Combined With a Conditional GAN for Mura Defect Classification in TFT-LCDs19
Run-to-Run Control of Chemical Mechanical Polishing Process Based on Deep Reinforcement Learning19
Deep Learning Approach to Inverse Grain Pattern of Nanosized Metal Gate for Multichannel Gate-All-Around Silicon Nanosheet MOSFETs18
Perspectives on Black Silicon in Semiconductor Manufacturing: Experimental Comparison of Plasma Etching, MACE, and Fs-Laser Etching18
Adversarial Defect Detection in Semiconductor Manufacturing Process18
Optimal Feature Selection for Defect Classification in Semiconductor Wafers17
Temporal Convolution-Based Long-Short Term Memory Network With Attention Mechanism for Remaining Useful Life Prediction17
Use of Plasma Information in Machine-Learning-Based Fault Detection and Classification for Advanced Equipment Control16
Redefining Monitoring Rules for Intelligent Fault Detection and Classification via CNN Transfer Learning for Smart Manufacturing16
Methodology for Important Sensor Screening for Fault Detection and Classification in Semiconductor Manufacturing15
Integration of 650 V GaN Power ICs on 200 mm Engineered Substrates15
Qualitative and Quantitative Analysis of Multi-Pattern Wafer Bin Maps15
Two-Stage Transfer Learning for Fault Prognosis of Ion Mill Etching Process14
Mixed-Type Wafer Defect Recognition With Multi-Scale Information Fusion Transformer12
Investigation of Dye-Sensitized Solar Cell With Photoanode Modified by TiO₂-ZnO Nanofibers12
Development of a World Class Silicon Carbide Substrate Manufacturing Capability12
Data-Driven Model Predictive Control of Cz Silicon Single Crystal Growth Process With V/G Value Soft Measurement Model11
Extracting Voltage Dependence of BTI-induced Degradation Without Temporal Factors by Using BTI-Sensitive and BTI-Insensitive Ring Oscillators11
Performance of Different Front-Opening Unified Pod (FOUP) Moisture Removal Techniques With Local Exhaust Ventilation System11
An Improved Capsule Network (WaferCaps) for Wafer Bin Map Classification Based on DCGAN Data Upsampling11
Virtual Metrology for Etch Profile in Silicon Trench Etching With SF₆/O₂/Ar Plasma11
Application of ANN for Fault Detection in Overhead Transport Systems for Semiconductor Fab11
Wafer Bin Map Recognition With Autoencoder-Based Data Augmentation in Semiconductor Assembly Process10
Wafer Defect Pattern Labeling and Recognition Using Semi-Supervised Learning10
Sensitivity Enhancement of SiO2Plasma Etching Endpoint Detection Using Modified Gaussian Mixture Model10
Development of Diaphragm and Microtunnel Structures for MEMS Piezoelectric Sensors10
Adaptive Cautious Regularized Run-to-Run Controller for Lithography Process10
Locally Adaptive Statistical Background Modeling With Deep Learning-Based False Positive Rejection for Defect Detection in Semiconductor Units9
Machine Learning-Based Process-Level Fault Detection and Part-Level Fault Classification in Semiconductor Etch Equipment9
Hidden Wafer Scratch Defects Projection for Diagnosis and Quality Enhancement9
Flow Analysis and Relative Humidity (RH) Measurement in the Horizontal Plane of a Front Opening Unified Pod (FOUP)9
Noncyclic Scheduling of Multi-Cluster Tools With Residency Constraints Based on Pareto Optimization9
Combination of Convolutional and Generative Adversarial Networks for Defect Image Demoiréing of Thin-Film Transistor Liquid-Crystal Display Image8
TestDNA: Novel Wafer Defect Signature for Diagnosis and Pattern Recognition8
A Sequential Search Method of Dispatching Rules for Scheduling of LCD Manufacturing Systems8
Dynamic Clustering for Wafer Map Patterns Using Self-Supervised Learning on Convolutional Autoencoders8
Deep Learning-Based Positioning Error Fault Diagnosis of Wire Bonding Equipment and an Empirical Study for IC Packaging8
Machine Learning Models for Edge Placement Error Based Etch Bias8
Detection and Recognition of Mixed-Type Defect Patterns in Wafer Bin Maps via Tensor Voting7
Atomic Layer Processes for Material Growth and Etching—A Review7
CMP Process Optimization Engineering by Machine Learning7
Dependability Assessment of Transfer Length Method to Extract the Metal–Graphene Contact Resistance7
The Environmental Footprint of IC Production: Review, Analysis, and Lessons From Historical Trends7
Similarity Search on Wafer Bin Map Through Nonparametric and Hierarchical Clustering7
Optimizing the Isotropic Etching Nature and Etch Profile of Si, Ge and Si0.8Ge0.2 by Controlling CF4 Atmosphere With Ar and O2 Additives in ICP7
An On-Chip Micromachined Test Structure to Study the Tribological Behavior of Deep-RIE MEMS Sidewall Surfaces7
Data Visualization of Anomaly Detection in Semiconductor Processing Tools7
A Graph-Theoretic Approach for Spatial Filtering and Its Impact on Mixed-Type Spatial Pattern Recognition in Wafer Bin Maps7
Discovery of Resource-Oriented Transition Systems for Yield Enhancement in Semiconductor Manufacturing7
Planned Maintenance Schedule Update Method for Predictive Maintenance of Semiconductor Plasma Etcher7
Measurement and Modeling of Ambient-Air-Induced Degradation in Organic Thin-Film Transistor6
Optical Proximity Correction Using Bidirectional Recurrent Neural Network With Attention Mechanism6
A Study on the Impact of Mid-Gap Defects on Vertical GaN Diodes6
Synthesis of Lithography Test Patterns Using Machine Learning Model6
One Class Process Anomaly Detection Using Kernel Density Estimation Methods6
Unrelated Parallel Machine Photolithography Scheduling Problem With Dual Resource Constraints6
Wafer Reflectance Prediction for Complex Etching Process Based on K-Means Clustering and Neural Network6
Fuzzy Selection Model for Quality-Based IC Packaging Process Outsourcers6
Efficient and Refined Deep Convolutional Features Network for the Crack Segmentation of Solar Cell Electroluminescence Images5
Edge Effects of an Eddy-Current Thickness Sensor During Chemical Mechanical Polishing5
Performance-Based Active Wafer Clamp Design for Wafer Heating Effects in EUV Lithography5
Improvement of Multi-Lines Bridge Defect Classification by Hierarchical Architecture in Artificial Intelligence Automatic Defect Classification5
Layout Pattern Synthesis for Lithography Optimizations5
Influence and Suppression of Harmful Effects Due to By-Product in CVD Reactor for 4H-SiC Epitaxy5
A Real-Time Monitoring Framework for Wafer Fabrication Processes With Run-to-Run Variations5
Development of SiGe Indentation Process Control for Gate-All-Around FET Technology Enablement5
Attention Mechanism-Based Root Cause Analysis for Semiconductor Yield Enhancement Considering the Order of Manufacturing Processes5
Plasma Induced Damage Reduction of Ultra Low-k Dielectric by Using Source Pulsed Plasma Etching for Next BEOL Interconnect Manufacturing5
A Simple Model of Capacity Contention During New Product Introductions5
A New Stage-Wise Control Release Policy for Semiconductor Wafer Fabrication Systems4
Statistical Extraction of Normally and Lognormally Distributed Model Parameters for Power MOSFETs4
An Autoencoder-Based Approach for Fault Detection in Multi-Stage Manufacturing: A Sputter Deposition and Rapid Thermal Processing Case Study4
Abnormal Silicon-Germanium (SiGe) Epitaxial Growth in FinFETs4
Quality-Oriented Statistical Process Control Utilizing Bayesian Modeling4
Adaptive Weight Tuning of EWMA Controller via Model-Free Deep Reinforcement Learning4
CNN-Based Layout Segment Classification for Analysis of Layout-Induced Failures4
Data-Driven and Mechanism-Based Hybrid Model for Semiconductor Silicon Monocrystalline Quality Prediction in the Czochralski Process4
Nano-Scale Depth Profiles of Electrical Properties of Phosphorus Doped Silicon for Ultra-Shallow Junction Evaluation4
Feature Selection for Waiting Time Predictions in Semiconductor Wafer Fabs4
Semi-Supervised Learning for Simultaneous Location Detection and Classification of Mixed-Type Defect Patterns in Wafer Bin Maps4
Optimization of Nafion Polymer Electrolyte Membrane Design and Microfabrication4
Minimizing Convolutional Neural Network Training Data With Proper Data Augmentation for Inline Defect Classification4
Decrease in Particles by Substituting Conductive Magnesium-Oxide Based Ceramics for Conventional Electrode Materials Used in Process Chamber of Plasma Etching4
Customer Order Behavior Classification Via Convolutional Neural Networks in the Semiconductor Industry4
Exploiting 2D Coordinates as Bayesian Priors for Deep Learning Defect Classification of SEM Images4
An Advanced Finite Element Model for BiCMOS Process Oriented Ultra-Thin Wafer Deformation4
A Comparative Study on Velocity Fields, Humidity and Oxygen Concentration in a Front Opening Unified Pod (FOUP) During Purge4
Joint Dynamic Dispatching and Preventive Maintenance for Unrelated Parallel Machines With Equipment Health Considerations3
Automatic Defect Detection in Epitaxial Layers by Micro Photoluminescence Imaging3
Optimal Cyclic Scheduling of Wafer-Residency-Time-Constrained Dual-Arm Cluster Tools by Configuring Processing Modules and Robot Waiting Time3
EveSyncIAI: Event Synchronization Industrial Augmented Intelligence for Fault Diagnosis3
Precise Pattern Alignment for Die-to-Database Inspection Based on the Generative Adversarial Network3
A One-Shot Learning Approach for Similarity Retrieval of Wafer Bin Maps With Unknown Failure Pattern3
Understanding and Improving Virtual Metrology Systems Using Bayesian Methods3
Modeling and Optimizing the Impact of Process and Equipment Parameters in Sputtering Deposition Systems Using a Gaussian Process Machine Learning Framework3
Improved Color Defect Detection With Machine Learning for After Develop Inspections in Lithography3
Increasing the Utilization of Deep Neural Networks for SEM Measurements Through Multiple Task Formulation and Visualization3
Advanced Low Pin Count Test Architecture for Efficient Multi-Site Testing3
Anomaly Detection in Batch Manufacturing Processes Using Localized Reconstruction Errors From 1-D Convolutional AutoEncoders3
Which Spare Parts Service Measure to Choose for a Front-End Wafer Fab?3
Study on Mechanical Cleavage Mechanism of GaAs via Anisotropic Stress Field and Experiments3
Color Difference Detection of Polysilicon Wafers Using Optimized Support Vector Machine by Magnetic Bacteria Optimization Algorithm With Elitist Strategy3
Semiconductor Defect Pattern Classification by Self-Proliferation-and-Attention Neural Network3
Matheuristics for Qualification Management Decisions in Wafer Fabs3
Investigation of the HfON Tunneling Layer of MONOS Device for Low-Voltage and High-Speed Operation Nonvolatile Memory Application3
Test Structures for Developing Packaging for Implantable Sensors3
Shear Force Classification Before Wire Bonding Based on Probe Mark 2-D Images Using Machine Learning Methods3
Process Optimization and Modeling of the Silicon Growth in Trichlorosilane-Hydrogen Gas Mixture in a Planetary CVD Reactor3
Improvement of ZnO/Si Heterojunctions With a Coaxial Circular Transmission Line Model Applicable to Both Ohmic and Schottky3
A Method to Determine the Electret Charge Potential of MEMS Vibrational Energy Harvester Using Pure-White Noise3
A Self-Test Method of Structural Failures of Uncooled Infrared Focal Plane Array3
Optimization and Application of TiO2 Hollow Microsphere Modified Scattering Layer for the Photovoltaic Conversion Efficiency of Dye-Sensitized Solar Cell3
Prediction of Highly Imbalanced Semiconductor Chip-Level Defects in Module Tests Using Multimodal Fusion and Logit Adjustment3
Improvement of Virtual Diagnostics Performance for Plasma Density in Semiconductor Etch Equipment Using Variational Auto-Encoder3
The Effect of Purge Flow Rate and Wafer Arrangement on Humidity Invasion Into a Loaded Front Opening Unified Pod (FOUP)3
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