OOIR: Observatory of International Research

Papers

(The H4-Index of IEEE Transactions on Computer-Aided Design of Integrated Circuits and is 34. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2020-04-01 to 2024-04-01.)

Article	Citations
DNN+NeuroSim V2.0: An End-to-End Benchmarking Framework for Compute-in-Memory Accelerators for On-Chip Training	98
RowHammer: A Retrospective	95
Evaluating Fast Algorithms for Convolutional Neural Networks on FPGAs	89
Approximation Attacks on Strong PUFs	87
Hardware/Software Co-Exploration of Neural Architectures	82
A Memristive Synapse Control Method to Generate Diversified Multistructure Chaotic Attractors	74
High-Level Synthesis Design Space Exploration: Past, Present, and Future	65
MRIMA: An MRAM-Based In-Memory Accelerator	64
Keynote: A Disquisition on Logic Locking	63
Noise-Aware DVFS for Efficient Transitions on Battery-Powered IoT Devices	62
An Overview of Hardware Security and Trust: Threats, Countermeasures, and Design Tools	58
An Artificial Neural Network Assisted Optimization System for Analog Design Space Exploration	56
LCHR-TSV: Novel Low Cost and Highly Repairable Honeycomb-Based TSV Redundancy Architecture for Clustered Faults	55
DREAMPlace: Deep Learning Toolkit-Enabled GPU Acceleration for Modern VLSI Placement	55
RxNN: A Framework for Evaluating Deep Neural Networks on Resistive Crossbars	54
DNNVM: End-to-End Compiler Leveraging Heterogeneous Optimizations on FPGA-Based CNN Accelerators	54
High-Throughput CNN Inference on Embedded ARM Big.LITTLE Multicore Processors	53
SIMPLER MAGIC: Synthesis and Mapping of In-Memory Logic Executed in a Single Row to Improve Throughput	52
CKFO: Convolution Kernel First Operated Algorithm With Applications in Memristor-Based Convolutional Neural Network	52
SearcHD: A Memory-Centric Hyperdimensional Computing With Stochastic Training	45
GAN-OPC: Mask Optimization With Lithography-Guided Generative Adversarial Nets	43
Throughput-Conscious Energy Allocation and Reliability-Aware Task Assignment for Renewable Powered In-Situ Server Systems	42
High-Performance Accurate and Approximate Multipliers for FPGA-Based Hardware Accelerators	40
Real-Time Detection and Localization of Distributed DoS Attacks in NoC-Based SoCs	40
Truly Stripping Functionality for Logic Locking: A Fault-Based Perspective	39

QuantHD: A Quantization Framework for Hyperdimensional Computing	39
Standing on the Shoulders of Giants: Hardware and Neural Architecture Co-Search With Hot Start	39
Low Bit-Width Convolutional Neural Network on RRAM	38
A Novel Memristive Chaotic Neuron Circuit and Its Application in Chaotic Neural Networks for Associative Memory	37
Advanced Equivalence Checking for Quantum Circuits	36
A Modeling Attack Resistant Deception Technique for Securing Lightweight-PUF-Based Authentication	36
Thwarting All Logic Locking Attacks: Dishonest Oracle With Truly Random Logic Locking	36
High Frequency Meminductor Emulator Employing VDTA and its Application	36
Performance Modeling for CNN Inference Accelerators on FPGA	34
Exploring Renewable-Adaptive Computation Offloading for Hierarchical QoS Optimization in Fog Computing	34