OOIR: Observatory of International Research

Papers

(The H4-Index of IEEE Transactions on Computer-Aided Design of Integrated Circuits and is 31. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2021-03-01 to 2025-03-01.)

Article	Citations
Table of Contents	151
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems society information	103
Table of Contents	98
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems publication information	73
Bridge-NDP: Efficient Communication-Computation Overlap in Near Data Processing System	71
CMCache: An Adaptive Cross-Level Data Placement Method for Multi-Level Cache	62
MACS: A Multi-Domain Collaborative Adaptive Clock Scheme for Large-Scale Reconfigurable Dataflow Accelerators	61
GIRD: A Green IR-Drop Estimation Method	59
GNN-Based Timing Prediction in Pre-Routing Stage With Multi-Task Learning Strategy	53
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems publication information	52
Table of contents	52
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems society information	49
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems society information	48
Erratum to “Predictive Guardbanding: Program-Driven Timing Margin Reduction for GPUs” [Jan 21 171-184]	48
Reducing Transistor Count in CMOS Logic Design Through Clustering and Library-Independent Multiple-Output Logic Synthesis	47
Coexisting Hyperchaos in a Memristive Neuromorphic Oscillator	47
RoboSpike: Fully Utilizing the Heterogeneous System with Subcallback Scheduling in ROS 2	46
Table of Contents	46
VTSMOC: An Efficient Voronoi Tree Search Boosted Multiobjective Bayesian Optimization With Constraints for High-Dimensional Analog Circuit Synthesis	44
Design and Utilization of Multiskewed Multibit Flip-Flop Cells for Timing Optimization: Design and Technology Co-Optimization Approach	44
Enabling ILP-Based DSE for Multigranularity, Unified Domain Platforms With DmTSAR-ILP	42
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems society information	39
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems society information	39
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems publication information	39
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems publication information	37

Table of Contents	37
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems publication information	36
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems publication information	35
Table of Contents	32
Table of contents	31
Table of Contents	31