OOIR: Observatory of International Research

Papers

(The TQCC of Integration-The VLSI Journal is 5. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2020-11-01 to 2024-11-01.)

Article	Citations
A new multi-scroll Chua’s circuit with composite hyperbolic tangent-cubic nonlinearity: Complex dynamics, Hardware implementation and Image encryption application	87
A new adaptive selection strategy for reducing latency in networks on chip	66
Review: Machine learning techniques in analog/RF integrated circuit design, synthesis, layout, and test	64
Dynamics analysis, FPGA realization and image encryption application of a 5D memristive exponential hyperchaotic system	49
A novel dual mode configurable and tunable high-gain, high-efficient CMOS power amplifier for 5G applications	42
Vulnerable objects detection for autonomous driving: A review	39
FPGA-based Physical Unclonable Functions: A comprehensive overview of theory and architectures	36
Secure image encryption scheme using 4D-Hyperchaotic systems based reconfigurable pseudo-random number generator and S-Box	35
MOS based pseudo-resistors exhibiting Tera Ohms of Incremental Resistance for biomedical applications: Analysis and proof of concept	30
Design of hyperchaotic system based on multi-scroll and its encryption algorithm in color image	29
Constructing keyed strong S-Box with higher nonlinearity based on 2D hyper chaotic map and algebraic operation	26
A new 4D Memristor chaotic system: Analysis and implementation	25
A two-directional grid multiscroll hidden attractor based on piecewise linear system and its application in pseudo-random bit generator	23
Cryptanalysis of nonlinear confusion component based encryption algorithm	19
Experimental verification of the multi-scroll chaotic attractors synchronization in PWL arbitrary-order systems using direct coupling and passivity-based control	19
On malicious implants in PCBs throughout the supply chain	18
FPGA-based implementation of classification techniques: A survey	18
Design automation for continuous-flow microfluidic biochips: A comprehensive review	18
An efficient image encryption scheme based on double affine substitution box and chaotic system	17
On-board processing for autonomous drone racing: An overview	17
Compact and efficient structure of 8-bit S-box for lightweight cryptography	16
Real-time medical image encryption for H-IoT applications using improved sequences from chaotic maps	16
Electronically tunable third-order dual-mode quadrature sinusoidal oscillators employing VDCCs and all grounded components	15
Realizations of fractional-order PID loop-shaping controller for mechatronic applications	15
A memristive chaotic system with rich dynamical behavior and circuit implementation	15

Batch generating keyed strong S-Boxes with high nonlinearity using 2D hyper chaotic map	15
RESET: A real-time scheduler for energy and temperature aware heterogeneous multi-core systems	15
Hyperchaotic fractional Grassi–Miller map and its hardware implementation	15
A Survey of FIR Filter Design Techniques: Low-complexity, Narrow Transition-band and Variable Bandwidth	15
An efficient construction of S-box based on the fractional-order Rabinovich–Fabrikant chaotic system	15
Approximate multipliers based on a novel unbiased approximate 4-2 compressor	15
Accelerating Deep Convolutional Neural Network base on stochastic computing	14
A novel current-controlled memristor-based chaotic circuit	14
A Novel four - Wing chaotic system with multiple attractors based on hyperbolic sine: Application to image encryption*	14
VLSI mask optimization: From shallow to deep learning	13
Multi-source data fusion technique for parametric fault diagnosis in analog circuits	13
Design space exploration of low-power flip-flops in FinFET technology	13
AI/ML algorithms and applications in VLSI design and technology	13
New memristor-less, resistor-less, two-OTA based grounded and floating meminductor emulators and their applications in chaotic oscillators	13
A four-dimensional chaotic system with coexisting attractors and its backstepping control and synchronization	13
High-performance area-efficient polynomial ring processor for CRYSTALS-Kyber on FPGAs	13
High-throughput and area-efficient architectures for image encryption using PRINCE cipher	13
High-performance hardware architecture of a robust block-cipher algorithm based on different chaotic maps and DNA sequence encoding	12
Coexistence of infinite attractors in a fractional-order chaotic system with two nonlinear functions and its DSP implementation	12
A novel memristive chaotic system without any equilibrium point	12
Chaotic encryption of real-time ECG signal in embedded system for secure telemedicine	12
A new hardware Trojan detection technique using deep convolutional neural network	12
A new low-power Dynamic-GDI full adder in CNFET technology	11
Emerging monolithic 3D integration: Opportunities and challenges from the computer system perspective	11
A chaotic PRNG tested with the heuristic Differential Evolution	11
A non-autonomous chaotic system with no equilibrium	11
WDP-BNN: Efficient wafer defect pattern classification via binarized neural network	11
Reveal the correlation between randomness and Lyapunov exponent of n-dimensional non-degenerate hyper chaotic map	10
Power density aware application mapping in mesh-based network-on-chip architecture: An evolutionary multi-objective approach	10
Mixed-radix, virtually scaling-free CORDIC algorithm based rotator for DSP applications	10
Reliable and low power Negative Capacitance Junctionless FinFET based 6T SRAM cell	10
Low power chaotic oscillator employing CMOS	10
A low latency modular-level deeply integrated MFCC feature extraction architecture for speech recognition	10
An effective watermarking technique using BTC and SVD for image authentication and quality recovery	10
2.3–21 GHz broadband and high linearity distributed low noise amplifier	10
Design of novel SMS4-BSK encryption transmission system	10
Sizing of multi-stage Op Amps by combining design equations with the gm/ID method	9
Hardware implementation of a robust image cryptosystem using reversible cellular-automata rules and 3-D chaotic systems	8
The Involution Tool for Accurate Digital Timing and Power Analysis	8
Color image encryption based on discrete memristor logistic map and DNA encoding	8
Study of the dynamical behavior of an Ikeda-based map with a discrete memristor	8
Simulated annealing assisted NSGA-III-based multi-objective analog IC sizing tool	8
New lightweight Anti-SAT block design and obfuscation technique to thwart removal attack	8
Quantization aware approximate multiplier and hardware accelerator for edge computing of deep learning applications	8
Transmission synchronization of multiple memristor chaotic circuits via single input controller and its application in secure communication	7
A fast piecewise image encryption scheme combining NC1DNSM and P-Box	7
High speed VLSI architecture for improved region based active contour segmentation technique	7
Design and implementation of current mode circuit for digital modulation	7
HDLBC: A lightweight block cipher with high diffusion	7
A transformer with high coupling coefficient and small area based on TSV	7

Novel tunable current feedback instrumentation amplifier based on BBFC OP-AMP for biomedical applications with low power and high CMRR	7
A transparent virtual channel power gating method for on-chip network routers	7
Experimental study of terrain coverage of an autonomous chaotic mobile robot	7
A broadband MVDR beamforming core for ultrasound imaging	7
Machine learning classification algorithm for VLSI test cost reduction	7
A survey on machine learning-based routing for VLSI physical design	7
FPGA-based parallel implementation to classify Hyperspectral images by using a Convolutional Neural Network	7
An area and power efficient VLSI architecture for ECG feature extraction for wearable IoT healthcare applications	7
Proposal and analysis of relative stability in mixed CNT bundle for sub-threshold interconnects	7
Construction and implementation of discrete memristive hyperchaotic map with hidden attractors and self-excited attractors	6
Hot-spot aware thermoelectric array based cooling for multicore processors	6
Design and application of CMOS active inductor in bandpass filter and VCO for reconfigurable RF front-end	6
A novel tunable gain CMOS buffer amplifier for large resistive loads	6
Convex optimization of random dynamic voltage and frequency scaling against power attacks	6
An Enhanced Memetic Algorithm using SKB tree representation for fixed-outline and temperature driven non-slicing floorplanning	6
Agile-AES: Implementation of configurable AES primitive with agile design approach	6
Valid test pattern identification for VLSI adaptive test	6
Neurochaos feature transformation for Machine Learning	6
Building discrete maps with memristor and multiple nonlinear terms	6
Breaking LPA-resistant cryptographic circuits with principal component analysis	6
Dynamic analysis and FPGA implementation of a 5D multi-wing fractional-order memristive chaotic system with hidden attractors	6
Construction of algebraic complex 9-bit lookup tables using non-chain-ring and its applications in data security	6
Avoidance vs. repair: New approaches to increasing electromigration robustness in VLSI routing	6
Multicast-enabled network-on-chip routers leveraging partitioned allocation and switching	6
An improved algorithm for accelerating reconfiguration of VLSI array	6
Hw/Sw Co-Design technique for 2D fast fourier transform algorithm on Zynq SoC	6
An accelerated modulus-based matrix splitting iteration method for mixed-size cell circuits legalization	6
An efficient multiple shortest augmenting paths algorithm for constructing high performance VLSI subarray	6
VDTA and DO-CCII based incremental/decremental floating memductance/meminductance simulator: A novel realization	6
Application driven routing for mesh based Network-on-Chip architectures	6
Design and analysis of a flat gain and linear low noise amplifier using modified current reused structure with feedforward structure	5
Design of highly reliable radiation hardened 10T SRAM cell for low voltage applications	5
Real-time infrared small target detection network and accelerator design	5
Design of FIR filter ISOTA with the aid of genetic algorithm	5
READ: A fixed restoring array based accuracy-configurable approximate divider for energy efficiency	5
A new post-processing approach for improvement of nonlinearity property in substitution boxes	5
A PVT aware differential delay circuit and its performance variation due to power supply noise	5
Design and implementation of congestion aware router for network-on-chip	5
An energy-efficient single-cycle RV32I microprocessor for edge computing applications	5
DULBC: A dynamic ultra-lightweight block cipher with high-throughput	5
Low-power content addressable memory design using two-layer P-N match-line control and sensing	5
Invasive weed optimization based scheduling for digital microfluidic biochip operations	5
Four-input-C-element-based multiple-node-upset-self-recoverable latch designs	5
Statistical traffic pattern for mixed torus topology and pathfinder based traffic and thermal aware routing protocol on NoC	5
A 0.2-V 1.2 nW 1-KS/s SAR ADC with a novel comparator structure for biomedical applications	5
Integrated DC - DC converter design methodology for design cycle speed up	5
A very low output resistance and wide-swing class-AB level-shifted folded flipped voltage follower cell	5
A novel systolic array processor with dynamic dataflows	5
Design of joint reconfigurable hybrid adder and subtractor using FinFET and GnrFET technologies	5
Passivity-based non-fragile control of a class of uncertain fractional-order nonlinear systems	5
A novel filter-bank architecture of 2D-FIR symmetry filters using LUT based multipliers	5
Machine learning based fast and accurate High Level Synthesis design space exploration: From graph to synthesis	5
OTA-C signal delay compensation circuit for transimpedance-mode audio signal processing systems	5
A 1Gpixel 10FPS CMOS image sensor using pixel array high-speed readout technology	5
A DRV-based bit selection method for SRAM PUF key generation and its impact on ECCs	5
Secure access microcontroller system based on fingerprint template with hyperchaotic encryption	5
Nonlinear analysis, circuit implementation, and application in image encryption of a four-dimensional multi-scroll hyper-chaotic system	5
Efficient design of decimation filter using linear programming and its FPGA implementation	5
Low power time-domain rail-to-rail comparator with a new delay element for ADC applications	5
An improved heuristic technique for nearest neighbor realization of quantum circuits in 2D architecture	5