OOIR: Observatory of International Research

Papers

(The TQCC of Integration-The VLSI Journal is 4. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2020-04-01 to 2024-04-01.)

Article	Citations
A new multi-scroll Chua’s circuit with composite hyperbolic tangent-cubic nonlinearity: Complex dynamics, Hardware implementation and Image encryption application	78
Review: Machine learning techniques in analog/RF integrated circuit design, synthesis, layout, and test	48
Defense-in-depth: A recipe for logic locking to prevail	45
A new adaptive selection strategy for reducing latency in networks on chip	43
Dynamics analysis, FPGA realization and image encryption application of a 5D memristive exponential hyperchaotic system	38
A novel dual mode configurable and tunable high-gain, high-efficient CMOS power amplifier for 5G applications	38
Secure image encryption scheme using 4D-Hyperchaotic systems based reconfigurable pseudo-random number generator and S-Box	31
Vulnerable objects detection for autonomous driving: A review	31
FPGA-based Physical Unclonable Functions: A comprehensive overview of theory and architectures	30
MOS based pseudo-resistors exhibiting Tera Ohms of Incremental Resistance for biomedical applications: Analysis and proof of concept	28
A two-directional grid multiscroll hidden attractor based on piecewise linear system and its application in pseudo-random bit generator	20
A new 4D Memristor chaotic system: Analysis and implementation	19
Cryptanalysis of nonlinear confusion component based encryption algorithm	18
Design of hyperchaotic system based on multi-scroll and its encryption algorithm in color image	18
A fast approach for bitcoin blockchain cryptocurrency mining system	17
Experimental verification of the multi-scroll chaotic attractors synchronization in PWL arbitrary-order systems using direct coupling and passivity-based control	17
FPGA implementation of a chaotic oscillator with odd/even symmetry and its application	16
Constructing keyed strong S-Box with higher nonlinearity based on 2D hyper chaotic map and algebraic operation	16
FPGA implementation of high-performance, resource-efficient Radix-16 CORDIC rotator based FFT algorithm	16
Approximate multipliers based on a novel unbiased approximate 4-2 compressor	13
A comprehensive analysis on the resilience of adiabatic logic families against transient faults	13
RESET: A real-time scheduler for energy and temperature aware heterogeneous multi-core systems	13
An efficient image encryption scheme based on double affine substitution box and chaotic system	13
Realizations of fractional-order PID loop-shaping controller for mechatronic applications	13
FPGA-based implementation of classification techniques: A survey	13

Electronically tunable third-order dual-mode quadrature sinusoidal oscillators employing VDCCs and all grounded components	12
On malicious implants in PCBs throughout the supply chain	12
On-board processing for autonomous drone racing: An overview	12
A Survey of FIR Filter Design Techniques: Low-complexity, Narrow Transition-band and Variable Bandwidth	12
Compact and efficient structure of 8-bit S-box for lightweight cryptography	12
A Novel four - Wing chaotic system with multiple attractors based on hyperbolic sine: Application to image encryption*	12
High-performance area-efficient polynomial ring processor for CRYSTALS-Kyber on FPGAs	12
Hyperchaotic fractional Grassi–Miller map and its hardware implementation	12
Coexistence of infinite attractors in a fractional-order chaotic system with two nonlinear functions and its DSP implementation	12
Design automation for continuous-flow microfluidic biochips: A comprehensive review	11
A memristive chaotic system with rich dynamical behavior and circuit implementation	11
Accelerating Deep Convolutional Neural Network base on stochastic computing	11
High-performance hardware architecture of a robust block-cipher algorithm based on different chaotic maps and DNA sequence encoding	11
VLSI mask optimization: From shallow to deep learning	11
Flipped voltage follower based fourth order filter and its application to portable ECG acquisition system	11
A novel memristive chaotic system without any equilibrium point	11
A bulk-driven quasi-floating gate FVF current mirror for low voltage, low power applications	11
Logarithm-approximate floating-point multiplier is applicable to power-efficient neural network training	10
A non-autonomous chaotic system with no equilibrium	10
Mixed-radix, virtually scaling-free CORDIC algorithm based rotator for DSP applications	10
A novel current-controlled memristor-based chaotic circuit	10
A low latency modular-level deeply integrated MFCC feature extraction architecture for speech recognition	10
Analysis of SRAM metrics for data dependent BTI degradation and process variability	10
Machine learning and structural characteristics for reverse engineering	10
Low power chaotic oscillator employing CMOS	10
Power density aware application mapping in mesh-based network-on-chip architecture: An evolutionary multi-objective approach	10
Design of novel SMS4-BSK encryption transmission system	10
Multi-source data fusion technique for parametric fault diagnosis in analog circuits	10
Design space exploration of low-power flip-flops in FinFET technology	10
A robust and automated methodology for the analysis of Time-Dependent Variability at transistor level	9
Real-time medical image encryption for H-IoT applications using improved sequences from chaotic maps	9
Improving power analysis attack resistance using intrinsic noise in 3D ICs	9
An efficient background calibration technique for analog-to-digital converters based on neural network	9
A new hardware Trojan detection technique using deep convolutional neural network	9
Chaotic encryption of real-time ECG signal in embedded system for secure telemedicine	8
An effective watermarking technique using BTC and SVD for image authentication and quality recovery	8
High-throughput and area-efficient architectures for image encryption using PRINCE cipher	8
The Involution Tool for Accurate Digital Timing and Power Analysis	8
New lightweight Anti-SAT block design and obfuscation technique to thwart removal attack	8
Methods increasing inherent resistance of ECC designs against horizontal attacks	8
Sizing of multi-stage Op Amps by combining design equations with the gm/ID method	7
A survey on machine learning-based routing for VLSI physical design	7
A chaotic PRNG tested with the heuristic Differential Evolution	7
Proposal and analysis of relative stability in mixed CNT bundle for sub-threshold interconnects	7
Batch generating keyed strong S-Boxes with high nonlinearity using 2D hyper chaotic map	7
New memristor-less, resistor-less, two-OTA based grounded and floating meminductor emulators and their applications in chaotic oscillators	7
A new low-power Dynamic-GDI full adder in CNFET technology	7
On the superiority of modularity-based clustering for determining placement-relevant clusters	7
Design of a real-time face detection architecture for heterogeneous systems-on-chips	7
A transformer with high coupling coefficient and small area based on TSV	7

A formal model for proving hardware timing properties and identifying timing channels	7
Reliable and low power Negative Capacitance Junctionless FinFET based 6T SRAM cell	7
Emerging monolithic 3D integration: Opportunities and challenges from the computer system perspective	7
Breaking LPA-resistant cryptographic circuits with principal component analysis	6
An improved algorithm for accelerating reconfiguration of VLSI array	6
WDP-BNN: Efficient wafer defect pattern classification via binarized neural network	6
A four-dimensional chaotic system with coexisting attractors and its backstepping control and synchronization	6
An area and power efficient VLSI architecture for ECG feature extraction for wearable IoT healthcare applications	6
An efficient multiple shortest augmenting paths algorithm for constructing high performance VLSI subarray	6
Transmission synchronization of multiple memristor chaotic circuits via single input controller and its application in secure communication	6
Novel tunable current feedback instrumentation amplifier based on BBFC OP-AMP for biomedical applications with low power and high CMRR	6
Avoidance vs. repair: New approaches to increasing electromigration robustness in VLSI routing	6
Quantization aware approximate multiplier and hardware accelerator for edge computing of deep learning applications	6
Agile-AES: Implementation of configurable AES primitive with agile design approach	6
Simulated annealing assisted NSGA-III-based multi-objective analog IC sizing tool	6
A 0.3nV/√Hz input-referred-noise analog front-end for radiation-induced thermo-acoustic pulses	6
2.3–21 GHz broadband and high linearity distributed low noise amplifier	6
Study of the dynamical behavior of an Ikeda-based map with a discrete memristor	6
Application driven routing for mesh based Network-on-Chip architectures	6
Convex optimization of random dynamic voltage and frequency scaling against power attacks	6
Experimental study of terrain coverage of an autonomous chaotic mobile robot	6
Valid test pattern identification for VLSI adaptive test	5
Design of FIR filter ISOTA with the aid of genetic algorithm	5
Machine learning classification algorithm for VLSI test cost reduction	5
TRACK: An algorithm for fault-tolerant, dynamic and scalable 2D mesh network-on-chip routing reconfiguration	5
Efficient design of decimation filter using linear programming and its FPGA implementation	5
A 0.6V 44.6 ppm/ºC subthreshold CMOS voltage reference with wide temperature range and inherent leakage compensation	5
A broadband MVDR beamforming core for ultrasound imaging	5
Multicast-enabled network-on-chip routers leveraging partitioned allocation and switching	5
An efficient construction of S-box based on the fractional-order Rabinovich–Fabrikant chaotic system	5
Test patterns reordering method based on Gamma distribution	5
Neurochaos feature transformation for Machine Learning	5
An Enhanced Memetic Algorithm using SKB tree representation for fixed-outline and temperature driven non-slicing floorplanning	5
Invasive weed optimization based scheduling for digital microfluidic biochip operations	5
AI/ML algorithms and applications in VLSI design and technology	5
Novel gate-overlap tunnel FET based innovative ultra-low-power ternary flash ADC	5
Hardware implementation of a robust image cryptosystem using reversible cellular-automata rules and 3-D chaotic systems	5
High speed VLSI architecture for improved region based active contour segmentation technique	5
Passivity-based non-fragile control of a class of uncertain fractional-order nonlinear systems	5
A novel tunable gain CMOS buffer amplifier for large resistive loads	5
Monolithic 3D stacked multiply-accumulate units	4
Statistical traffic pattern for mixed torus topology and pathfinder based traffic and thermal aware routing protocol on NoC	4
Investigating the influence of adiabatic load on the 4-phase adiabatic system design	4
Secure access microcontroller system based on fingerprint template with hyperchaotic encryption	4
A fast transient response current-feedback low-dropout regulator with dynamic current-enhancement technique	4
Low-power content addressable memory design using two-layer P-N match-line control and sensing	4
Design and implementation of current mode circuit for digital modulation	4
Hw/Sw Co-Design technique for 2D fast fourier transform algorithm on Zynq SoC	4
Fluid-to-cell assignment and fluid loading on programmable microfluidic devices for bioprotocol execution	4
Radiation-aware analog circuit design via fully-automated simulation environment	4
Reveal the correlation between randomness and Lyapunov exponent of n-dimensional non-degenerate hyper chaotic map	4
PCoSA: A product error correction code for use in memory devices targeting space applications	4
Development of micro computer based mobile random number generator with an encryption application	4
Integrated DC - DC converter design methodology for design cycle speed up	4
Research progress of time-interleaved analog-to-digital converters	4
A transparent virtual channel power gating method for on-chip network routers	4
An improved heuristic technique for nearest neighbor realization of quantum circuits in 2D architecture	4
An efficient and reliable MRF-based methodology for designing low-power VLSI circuits	4
Design of highly reliable radiation hardened 10T SRAM cell for low voltage applications	4
Graph-based STA for asynchronous controllers	4
Real-time infrared small target detection network and accelerator design	4
A double-node-upset completely tolerant CMOS latch design with extremely low cost for high-performance applications	4
A DRV-based bit selection method for SRAM PUF key generation and its impact on ECCs	4
A PVT aware differential delay circuit and its performance variation due to power supply noise	4
Mathematical analysis and circuit emulator design of the three-valued memristor	4
A very low output resistance and wide-swing class-AB level-shifted folded flipped voltage follower cell	4
FPGA-based parallel implementation to classify Hyperspectral images by using a Convolutional Neural Network	4
Litho-NeuralODE 2.0: Improving hotspot detection accuracy with advanced data augmentation, DCT-based features, and neural ordinary differential equations	4
Design and analysis of a flat gain and linear low noise amplifier using modified current reused structure with feedforward structure	4
Machine learning based fast and accurate High Level Synthesis design space exploration: From graph to synthesis	4