Solid-State Electronics

Papers
(The TQCC of Solid-State Electronics is 4. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2021-05-01 to 2025-05-01.)
ArticleCitations
Accurate statistical extraction of AlGaN/GaN HEMT device parameters using the Y-function51
An enzymatic glucose biosensor using the BESOI MOSFET40
Design and verification of a hybrid electrostatic discharge model for Gate-Controlled silicon controlled rectifier39
The mechanism of the enhanced intensity for polarization Coulomb field scattering in AlN/GaN heterostructure field effect transistors with submicron gate length25
Understanding the impact of split-gate LDMOS transistors: Analysis of performance and hot-carrier-induced degradation22
Si nanowire-based micro-capacitors fabricated with metal assisted chemical etching for integrated energy storage applications20
On the asymmetry of the DC and low-frequency noise characteristics of vertical nanowire MOSFETs with bulk source contact20
Smart-CX – Method of extraction of parasitic capacitances in ICs19
Non-local transport effects in semiconductors under low-field conditions19
Tailoring the optoelectronic properties of PZT through the modulation of the thin film18
Impedance sensors based on silicon-carbon films for detection low concentrations of organic vapors18
Analog behavior of V-FET operating in forward and reverse mode18
Editorial Board18
Negative capacitance field-effect transistor with hetero-dielectric structure for suppression of reverse drain induced barrier lowering18
Electrical instabilities in amorphous Si-Zn-sn-O thin film transistors under ultra-violet irradiation depending on oxygen content17
Editorial Board16
Compact I-V model for back-gated and double-gated TMD FETs15
Engineering the contact resistance of copper/copper oxide via inserting a mediated molybdenum trioxide layer15
A polylogarithmic model for thin-film transistors used in a CMOS inverter amplifier15
Robustness of using degree of match in performing analog multiplication with spin-torque oscillators14
Experimental study of thermal coupling effects in FD-SOI MOSFET14
Editorial Board13
Analysis of a Hall-Corbino disk plate having a point current source at the center12
Detailed electrical characterization of 200 mm CMOS compatible GaN/Si HEMTs down to deep cryogenic temperatures12
An ultra low power spiking neural encoder of microwave signals12
Analytical model based estimation of line edge roughness induced V<12
Mechanisms of negative bias instability of commercial SiC MOSFETs observed by current transients12
Novel Y-function methodology parameter estimation from weak to strong inversion operation12
Electron mobility distribution in FD-SOI MOSFETs using a NEGF-Poisson approach12
Extraction of small-signal equivalent circuit for de-embedding of 3D vertical nanowire transistor11
Thermal cross-coupling effects in side-by-side UTBB-FDSOI transistors11
Electron-phonon calculations using a Wannier-based supercell approach: Applications to the monolayer MoS11
Impact of substrate resistivity on spiral inductors at mm-wave frequencies10
28 nm FD-SOI MEOL parasitic capacitance segmentation using electrical testing and semiconductor process modeling10
Smart Material Implication Using Spin-Transfer Torque Magnetic Tunnel Junctions for Logic-in-Memory Computing10
Detailed low frequency noise assessment on GAA NW n-channel FETs10
Quantum capacitance transient phenomena in high-k dielectric armchair graphene nanoribbon field-effect transistor model10
Ab initio study of electron mobility in V210
Curvature based feature detection for hierarchical grid refinement in TCAD topography simulations10
Editorial Board10
An implicit analytical surface potential based model for long channel symmetric double-gate MOSFETs accounting for oxide and interface trapped charges10
Editorial Board9
On the accuracy of the formula used to extract trap density in MOSFETs from 1/f noise9
Optimized emitter-base interface cleaning for advanced Heterojunction Bipolar Transistors9
Compact modeling of photonic devices in Verilog-A for integrated circuit design9
Recovering the carrier number conservation in SPICE simulation of PIN diodes and IGBT devices9
TCAD-Based RF performance prediction and process optimization of 3D monolithically stacked complementary FET9
Editorial Board9
In-depth static and low frequency noise assessment of p-channel gate-all-around vertically stacked silicon nanosheets9
Investigation and Modeling of Multifrequency CV characteristics for 10-nm Bulk FinFETs at Cryogenic Temperatures9
A unified 2-D model for nanowire junctionless accumulation and inversion mode MOSFET in quasi-ballistic regime9
Pragmatic OxRAM compact model ready to use for design studies9
Editorial Board9
Trap and self-heating effect based reliability analysis to reveal early aging effect in nanosheet FET9
Introducing effective temperature into Arrhenius equation with Meyer-Neldel rule for describing both Arrhenius and non-Arrhenius dependent drain current of amorphous InGaZnO TFTs8
3D (micro/nano) CdO/p-Si co-doped Zn and La heterojunctions perform as solar light photodetectors8
Modeling of the degradation of CMOS inverters under pulsed stress conditions from ‘on-the-fly’ measurements8
Design of a NMOS-triggered SCR for dual-direction low-voltage ESD protection8
C-V measurement and modeling of double-BOX Trap-Rich SOI substrate8
Vertical GaN diode BV maximization through rapid TCAD simulation and ML-enabled surrogate model8
Impact of the leakage current of an AND-type synapse array on spiking neural networks8
Self-similar reconfigurable low-pass MEMS filters using coplanar waveguide based on silicon8
Electrical characteristics of n-type vertically stacked nanowires operating up to 600 K8
Graph-based Compact Modeling (GCM) of CMOS transistors for efficient parameter extraction: A machine learning approach8
Corrigendum to “In-depth static and low frequency noise assessment of p-channel gate-all-around vertically stacked silicon nanosheets” [Solid-State Electron. 201(2023) 10859]8
TCAD-based design and verification of the components of a 200 V GaN-IC platform8
The impact of electron phonon scattering on transport properties of topological insulators: A first principles quantum transport study8
Double Reference Layer STT-MRAM Structures with Improved Performance8
Hierarchical Mixture-of-Experts approach for neural compact modeling of MOSFETs8
The core-shell junctionless MOSFET8
On the noise-sensitivity of entangling quantum logic operations implemented with a semiconductor quantum dot platform8
Equivalence of proton-induced displacement damage in InP-based HEMT8
Performance potential of transistors based on tellurium nanowire arrays: A quantum transport study8
Thermal annealing behavior of InP-based HEMT damaged by proton irradiation8
Stability and Vmin<8
Simplified electrical modeling for dye sensitized solar cells: Influences of the blocking layer and chenodeoxycholic acid additive8
Extraction of effective mobility of In Ga As/In Al As quantum well high-electron-mobility transistors on InP substrate7
Estimation of the emission characteristics of solid-state incandescent light emitting devices by linear regression of spectral radiance7
TCAD numerical modeling of negative capacitance ferroelectric devices for radiation detection applications7
Sensitivity enhancement in OCD metrology by optimizing azimuth angle based on the RCWA simulation7
An improved subthreshold swing expression accounting for back-gate bias in FDSOI FETs7
Sensitivity implications for programmable transistor based 1T-DRAM7
Effects of electrode materials on solution-processed polyvinylidene fluoride-based piezoelectric nanogenerators: Do they matter?7
Understanding negative capacitance physical mechanism in organic ferroelectric capacitor7
A wireless stimulator system-on-chip with an optically writable ID for addressable cortical microimplants7
Analysis of reverse voltage distribution of high-voltage diode stack considering effect of temperature7
Theoretical study of extreme ultraviolet pellicles with nanometer thicknesses7
Preparation and electrical characteristics of transparent thin film transistors with sputtered aluminum and phosphorus co-doped indium-zinc-oxide channel layer7
A novel SOI-LDMOS with field plate auxiliary doping layer that has improved breakdown voltage7
Suppression of de-trapping by remanent polarization in dual-mechanism flash memory7
Sensing performance of Ti/TiO2 nanosheets/Au capacitive device: Implication of resonant frequency7
An eco-friendly bandgap engineering of semiconductor graphene oxide7
Editorial Board7
Performance of flexible In0.7Ga0.3As MOSFETs by utilizing liquid polyimide (LPI) transfer with effective mobility of 3,667 cm2/V-s7
Combined effects of NH3 and NF3 post plasma treatment on the performance of spray coated ZnO thin film transistors7
Palladium selenide as cathode for dye-sensitized solar cell: Effect of palladium content7
Investigation of the anomalous effect of the AC-signal frequency on flat-band voltage of Al/HfO2/SiO2/Si structures6
Editorial Board6
Surrogate models for device design using sample-efficient Deep Learning6
Building robust machine learning force fields by composite Gaussian approximation potentials6
A compact physical expression for the static drain current in heterojunction barrier CNTFETs6
Express method of electro-physical parameters extraction for power Schottky diodes6
A multi-energy level agnostic approach for defect generation during TDDB stress6
Editorial to Letters from SISPAD-20226
Characterization of DC performance and low-frequency noise of an array of nMOS Forksheets from 300 K to 4 K6
Cryogenic temperature DC-IV measurements and compact modeling of n-channel bulk FinFETs with 3–4 nm wide fins and 20 nm gate length for quantum computing applications6
Compact modeling of Schottky barrier field-effect transistors at deep cryogenic temperatures6
Unified RTN and BTI statistical compact modeling from a defect-centric perspective6
Bias stress stabilities of PMMA-passivated indium-gallium-zinc-oxide thin-film transistors after 100 °C steam exposure6
Hydrothermally formed copper oxide (CuO) thin films for resistive switching memory devices6
Switching limits of top-gated carbon nanotube field-effect transistors6
Implementation of device-to-device and cycle-to-cycle variability of memristive devices in circuit simulations6
Demonstration of an n-ZnO/p-Si/n-Si heterojunction bipolar phototransistor for X-ray detection6
In-situ fluorine-doped ZnSnO thin film and thin-film transistor6
Synaptic array using multi-level AND flash memory cells for hardware-based neural networks6
Inversion layer electron mobility distribution in fully-depleted silicon-on-insulator MOSFETs6
Sub micro-accelerometer based on spintronic technology: A design optimization6
Improved electrical performance of InAlN/GaN high electron mobility transistors with forming gas annealing6
MoS2-based multiterminal ionic transistor with orientation-dependent STDP learning rules6
Effect of Al2O3 on the operation of SiNX-based MIS RRAMs5
Improving cell current in 3D NAND flash memory with fixed oxide charge5
Spin-orbit torque magnetic tunnel junction based on 2-D materials: Impact of bias-layer on device performance5
Avalanche breakdown and quenching in Ge SPAD using 3D Monte Carlo simulation5
Determination of source series resistances for InP HEMT under normal bias condition5
Stochastic based compact model to predict highly variable electrical characteristics of organic CBRAM devices5
Poisson-Schrödinger simulation and analytical modeling of inversion charge in FDSOI MOSFET down to 0 K – Towards compact modeling for cryo CMOS application5
Modelling of self-heating effect in FDSOI and bulk MOSFETs operated in deep cryogenic conditions5
Editorial: Letters from the 8th Joint International EUROSOI workshop and International Conference on Ultimate Integration on Silicon5
Modulation of ballistic injection velocity in phosphorene nanodevices by bias and confinement effects5
Simulation of low frequency noise in buried-channel MOSFET by a Green’s function-based numerical trap level model5
Editorial Board5
A simulation methodology for superconducting qubit readout fidelity5
Resistive Switching phenomenon in FD-SOI Ω-Gate FETs: Transistor performance recovery and back gate bias influence5
Modeling electrical resistivity of CrSi thin films5
Editorial Board5
Current annealing to improve drain output performance of β-Ga2O3 field-effect transistor5
Competition between heating and cooling during dynamic self-heating degradation of amorphous InGaZnO thin-film transistors5
Study of TiN/Ti/HfO2/W resistive switching devices: characterization and modeling of the set and reset transitions using an external capacitor discharge5
1540 V 21.8mΩ·cm2 4H-SiC lateral MOSFETs with DOUBLE RESURFs for power integration applications5
Editorial. Special issue. EUROSOI-ULIS 20235
CMOS inverter performance degradation and its correlation with BTI, HCI and OFF state MOSFETs aging5
Improving the barrier inhomogeneity of 4H-SiC Schottky diodes by inserting Al2O3 interface layer5
Preliminary results on industrial 28nm FD-SOI phase change memory at cryogenic temperature5
Influence of fin width variation on the electrical characteristics of n-type junctionless nanowire transistors at high temperatures5
A simple method for the photometric characterization of organic light-emitting diodes5
Analysis of the performance of Nb2O5-doped SiO2-based MIM devices for memory and neural computation applications5
Perovskite-based optoelectronic artificial synaptic thin-film transistor5
Analysis of back-gate bias impact on 22 nm FDSOI SRAM cell5
Improvement of electrical performance in Normally-Off GaN MOSFET with regrown AlGaN layer on the Source/Drain region5
Simulation study on physical parameters ruling unipolar resistance switching of sputter-deposited silicon oxide film on Si substrate5
Investigation and optimization of traps properties in Al2O3/SiO2 dielectric stacks using conductance method5
Impact of Gate Oxide Thickness on Flicker Noise (1/f) in PDSOI n-channel FETs5
Non-Quasi-Static modeling and methodology in fully depleted SOI MOSFET for L-UTSOI model5
Impact of series resistance on the drain current variability in inversion mode and junctionless nanowire transistors5
Impact of the channel doping on the low-frequency noise of gate-all-around silicon vertical nanowire pMOSFETs5
Precise channel temperature prediction in AlGaN/GaN HEMTs via closed-form empirical expression5
Compact charge model for Si gate-all-around nMOSCAPs with cylindrical cross-sections considering the density-gradient equation4
Interface effects in ultra-scaled MRAM cells4
Low-frequency noise characterization of positive bias stress effect on the spatial distribution of trap in β-Ga2O3 FinFET4
Analysis on effect of hot-carrier-induced degradation of NPT-IGBT4
Strong quantization of current-carrying electron states in δ-layer s4
Experimental assessment of gate-induced drain leakage in SOI stacked nanowire and nanosheet nMOSFETs at high temperatures4
Enabling medium thick gate oxide devices in 22FDX® technology for switch and high-performance amplifier application4
Fabrication and modelling of MInM diodes with low turn-on voltage4
Analysis and modeling of anomalous flicker noise in long channel halo MOSFETs4
Simulation process flow for the implementation of industry-standard FD-SOI quantum dot devices4
Impact of work function metal stacks on the performance and reliability of multi-V RMG CMOS technology4
Design of auto-store circuit for nvSRAM with SONOS access transistor4
Mechanism of polarization “Wake-Up” in ferroelectric Hafnia-Zirconia thin films4
Influence of gate-source/drain overlap on FeFETs4
Novel experimental methodologies to reconcile large- and small-signal responses of Hafnium-based Ferroelectric Tunnel Junctions4
An accurate machine learning model to study the impact of realistic metal grain granularity on Nanosheet FETs4
On the breakdown voltage temperature dependence of high-voltage power diodes passivated with diamond-like carbon4
Switching layer optimization in Co-based CBRAM for >105 memory window in sub-100 µA regime4
Addressing source to drain tunneling in extremely scaled Si-transistors using negative capacitance4
A composite model of memristors based on barrier and dopant drift mechanisms4
A simulation physics-guided neural network for predicting semiconductor structure with few experimental data4
Thickness-dependent dielectric breakdown in thick amorphous SiO2 capacitors4
Computational model for predicting structural stability and stress transfer of a new SiGe stressor technique for NMOS devices4
A novel methodology for neural compact modeling based on knowledge transfer4
Negative capacitance enables GAA scaling VDD to 0.5 V4
Opportunity for band alignment manipulation of perovskite oxide stacks by interfacial dipole layer formation4
Quantum element method for multi-dimensional nanostructures enabled by a projection-based learning algorithm4
Deep insights on new embedded resistance and gated diode on thin film silicon BIMOS device with and without external polysilicon resistance for advanced ESD protection in FD-SOI technology4
Silicon nitride resistance switching MIS cells doped with silicon atoms4
Editorial Board4
Reliable parameter extraction method applied to an enhanced GaN HEMT small-signal model4
Design methodology of a 28 nm FD-SOI capacitive feedback RF LNA based on the ACM model and look-up tables4
Electron and spin transport in semiconductor and magnetoresistive devices4
Hierarchical simulation of nanosheet field effect transistor: NESS flow4
Improved inter-device variability in graphene liquid gate sensors by laser treatment4
Deep spiking neural networks with integrate and fire neuron using steep switching device4
Comprehensive evaluation of torques in ultra-scaled MRAM devices4
Drain-bias dependence of low-frequency Y22 signals for Fe-related GaN traps in GaN HEMTs with different Fe doping concentrations4
Efficient atomistic simulations of lateral heterostructure devices with metal contacts4
Improved self-heating extraction with RF technique at cryogenic temperatures4
A differential OTP memory based highly unique and reliable PUF at 180 nm technology node4
Si/Ge1x4
About electron transport and spin control in semiconductor devices4
Evidence of trapping and electrothermal effects in vertical junctionless nanowire transistors4
Corrigendum to “Modeling and simulations of FDSOI five-gate qubit MOS devices down to deep cryogenic temperatures” [Solid State Electron. 193 (2022) 108291]4
Unveiling the mechanism behind the negative capacitance effect in Hf0.5Zr0.5O2-Based ferroelectric gate stacks and introducing a Circuit-Compatible hybrid compact model for Leakage-Aware NCFETs4
Modeling current and voltage peaks generation in complementary resistive switching devices4
Harnessing charge injection in Kelvin probe force microscopy for the evaluation of oxides4
Analog resistive switching behavior in BiCoO3 thin film4
Layout dependent hot-carrier-injection-induced pLDMOS degradation from a non-destructive characterization viewpoint4
High-densities of free holes in homoepitaxial n-GaN induced by fluorine-plasma ion implantation4
Back-gate effects on DC performance and carrier transport in 22 nm FDSOI technology down to cryogenic temperatures4
Impact of post metallization annealing (PMA) on the electrical properties of Ge nMOSFETs with ZrO2 dielectric4
A well-conditioned surface potential equation for dynamically depleted SOI MOS devices accounting for the front-depletion/back-accumulation operation mode4
Efficient circuit simulation of a memristive crossbar array with synaptic weight variability4
Editorial Board4
SPICE simulation of the time-dependent clustering model for dielectric breakdown4
Effect of SOI substrate on silicon nitride resistance switching using MIS structure4
Approximate H-transformation for numerical stabilization of a deterministic Boltzmann transport equation solver based on a spherical harmonics expansion4
GaN p-i-n ultraviolet photodetectors grown on homogenous GaN bulk substrates4
Opportunity to achieve an efficient SiC/SiO2 interface N passivation by tuning the simultaneous oxidation modes during the SiC surface nitridation in N2 + O2 annealing4
Role of temperature, MTJ size and pulse-width on STT-MRAM bit-error rate and backhopping4
Enhancing the temporal response of modified porous silicon-based CO gas sensor4
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