Solid-State Electronics

Article	Citations
Tailoring the optoelectronic properties of PZT through the modulation of the thin film	86
Smart-CX – Method of extraction of parasitic capacitances in ICs	30
An enzymatic glucose biosensor using the BESOI MOSFET	27
Negative capacitance field-effect transistor with hetero-dielectric structure for suppression of reverse drain induced barrier lowering	26
Electrical instabilities in amorphous Si-Zn-sn-O thin film transistors under ultra-violet irradiation depending on oxygen content	24
Si nanowire-based micro-capacitors fabricated with metal assisted chemical etching for integrated energy storage applications	23
Numerical investigation of effect of Si separator in bottom dielectric isolation forksheet FETs via in-house TCAD process emulator and device simulator	20
3xVDD-tolerant power-rail ESD clamp circuit for negative mixed-voltage interfaces	20
Engineering the contact resistance of copper/copper oxide via inserting a mediated molybdenum trioxide layer	19
Non-local transport effects in semiconductors under low-field conditions	18
Editorial Board	18
Design and verification of a hybrid electrostatic discharge model for Gate-Controlled silicon controlled rectifier	18
Editorial Board	18
Experimental study of thermal coupling effects in FD-SOI MOSFET	16
Low power consumption of non-volatile memory device by tunneling process engineering	15
Analog behavior of V-FET operating in forward and reverse mode	15
Nanowire behavior under the influence of Polyoxometalates: A Comparative study of depletion and enhancement modes	14
Design of high robustness DDSCR with embedded gate-controlled diodes and Schottky diodes	14
Compact I-V model for back-gated and double-gated TMD FETs	14
Impedance sensors based on silicon-carbon films for detection low concentrations of organic vapors	13
Extraction of trap densities in Al:HfO	13
Modeling of tunneling through Schottky barriers	13
Electron-phonon calculations using a Wannier-based supercell approach: Applications to the monolayer MoS13
Design, Synthesis, and Optoelectronic Characterization of a Novel Cu(II) Complex-Based Photodiode with Prof. Dr. Yakuphanoglu’s Advanced Fytronix Solar Simulator Characterization Techniques	13
On the asymmetry of the DC and low-frequency noise characteristics of vertical nanowire MOSFETs with bulk source contact	13

An ultra low power spiking neural encoder of microwave signals	12
Electron mobility distribution in FD-SOI MOSFETs using a NEGF-Poisson approach	12
Editorial Board	12
Detailed electrical characterization of 200 mm CMOS compatible GaN/Si HEMTs down to deep cryogenic temperatures	11
Analytical model based estimation of line edge roughness induced V<	11
Impact of substrate resistivity on spiral inductors at mm-wave frequencies	11
Spatially resolved ionization current measurements using an active-matrix transimpedance amplifier array	11
Extraction of small-signal equivalent circuit for de-embedding of 3D vertical nanowire transistor	11
Study of RRAM devices with PECVD silicon-oxide resistive switching layer	11
Mechanisms of negative bias instability of commercial SiC MOSFETs observed by current transients	11
Smart Material Implication Using Spin-Transfer Torque Magnetic Tunnel Junctions for Logic-in-Memory Computing	11
Self-aligned nitrogen doping via plasma treatment of NiO/β-Ga2O3 heterojunction diodes	11
Novel Y-function methodology parameter estimation from weak to strong inversion operation	11
Ab initio study of electron mobility in V2	11
Enhanced photoresponse in Cu/n-Si Schottky photodetectors via RF sputtering: A comparative study with thermal evaporation	10
Double Reference Layer STT-MRAM Structures with Improved Performance	10
C-V measurement and modeling of double-BOX Trap-Rich SOI substrate	10
Markov model describing progressive degradation of local percolation path in thin oxides	10
Electrical characteristics of n-type vertically stacked nanowires operating up to 600 K	10
28 nm FD-SOI MEOL parasitic capacitance segmentation using electrical testing and semiconductor process modeling	9
TCAD-Based RF performance prediction and process optimization of 3D monolithically stacked complementary FET	9
Thermal coupling between FD-SOI FETs at cryogenic temperatures	9
Impact of the leakage current of an AND-type synapse array on spiking neural networks	9
Thermal annealing behavior of InP-based HEMT damaged by proton irradiation	9
Investigation and Modeling of Multifrequency CV characteristics for 10-nm Bulk FinFETs at Cryogenic Temperatures	9
Performance potential of transistors based on tellurium nanowire arrays: A quantum transport study	9
Optimized emitter-base interface cleaning for advanced Heterojunction Bipolar Transistors	9
Editorial Board	9
On the noise-sensitivity of entangling quantum logic operations implemented with a semiconductor quantum dot platform	9
Editorial Board	9
The impact of electron phonon scattering on transport properties of topological insulators: A first principles quantum transport study	9
Investigation on dielectric wall variations in Forksheet FETs	9
Hierarchical Mixture-of-Experts approach for neural compact modeling of MOSFETs	9
TCAD-based design and verification of the components of a 200 V GaN-IC platform	9
On the accuracy of the formula used to extract trap density in MOSFETs from 1/f noise	9
Editorial Board	9
Curvature based feature detection for hierarchical grid refinement in TCAD topography simulations	9
Editorial Board	9
Reactive sputtering deposited α-MoO3 thin films for forming-free resistive random-access memory	9
In-depth static and low frequency noise assessment of p-channel gate-all-around vertically stacked silicon nanosheets	9
Evaluation of the effective channel length of Junctionless nanowire transistors with different drain bias through the gate capacitance	9
Trap and self-heating effect based reliability analysis to reveal early aging effect in nanosheet FET	9
Epitaxial p+pn+ vertical short diodes for microbolometers	9
3D (micro/nano) CdO/p-Si co-doped Zn and La heterojunctions perform as solar light photodetectors	8
Editorial Board	8
Pragmatic OxRAM compact model ready to use for design studies	8
Vertical GaN diode BV maximization through rapid TCAD simulation and ML-enabled surrogate model	8
Equivalence of proton-induced displacement damage in InP-based HEMT	8
Theoretical study of extreme ultraviolet pellicles with nanometer thicknesses	8
Difference in kinetics between thermal nitridation and radical nitridation processes of 4H-SiC surface considering simultaneous N-incorporation and N-desorption reactions	8

Compact modeling of photonic devices in Verilog-A for integrated circuit design	8
Evidence of out-of-equilibrium body potential in undoped EZ-FET	8
Temperature-dependence of current gain and turn-on voltages of GaAs-based HBTs with different base layers grown by MOCVD	8
Temperature influence on analog parameters of vertical nanowire transistors	8
The core-shell junctionless MOSFET	8
A unified 2-D model for nanowire junctionless accumulation and inversion mode MOSFET in quasi-ballistic regime	8
Graph-based Compact Modeling (GCM) of CMOS transistors for efficient parameter extraction: A machine learning approach	8
Estimation of the energy levels of the donor–acceptor polymers of organic solar cells using cyclic voltammetry	8
MnFe2O4 nanoparticles for VOCs sensing application at low operating temperature	8
A wireless stimulator system-on-chip with an optically writable ID for addressable cortical microimplants	8
Understanding negative capacitance physical mechanism in organic ferroelectric capacitor	7
Non-uniform matching performances in mesa-isolated SOI MOSFETs	7
Performance of flexible In0.7Ga0.3As MOSFETs by utilizing liquid polyimide (LPI) transfer with effective mobility of 3,667 cm2/V-s	7
Sensitivity enhancement in OCD metrology by optimizing azimuth angle based on the RCWA simulation	7
Enhanced linearity of AlGaN/GaN HEMTs via dual-gate configuration for RF amplifier applications	7
Corrigendum to “In-depth static and low frequency noise assessment of p-channel gate-all-around vertically stacked silicon nanosheets” [Solid-State Electron. 201(2023) 10859]	7
Hydrothermally formed copper oxide (CuO) thin films for resistive switching memory devices	7
An improved subthreshold swing expression accounting for back-gate bias in FDSOI FETs	7
Characterization of DC performance and low-frequency noise of an array of nMOS Forksheets from 300 K to 4 K	7
Sensing performance of Ti/TiO2 nanosheets/Au capacitive device: Implication of resonant frequency	7
Improved electrical performance of InAlN/GaN high electron mobility transistors with forming gas annealing	7
An eco-friendly bandgap engineering of semiconductor graphene oxide	7
Estimation of the emission characteristics of solid-state incandescent light emitting devices by linear regression of spectral radiance	7
Suppression of de-trapping by remanent polarization in dual-mechanism flash memory	7
A multi-energy level agnostic approach for defect generation during TDDB stress	7
Model of threshold voltage and drain current in core-shell junctionless transistor on FD-SOI	7
Preparation and electrical characteristics of transparent thin film transistors with sputtered aluminum and phosphorus co-doped indium-zinc-oxide channel layer	7
Behavioral SPICE model for memristive crosspoint arrays operating in the nonlinear transport regime	7
MoS2-based multiterminal ionic transistor with orientation-dependent STDP learning rules	7
Extraction of effective mobility of In Ga As/In Al As quantum well high-electron-mobility transistors on InP substrate	7
Impacts of trench angle on the performance of trench super-junction vertical double-diffused metal-oxide-semiconductor	7
Investigation of reconfigurable logic gate using integrated amorphous InGaZnO ReRAM and thin-film transistor	6
Synaptic array using multi-level AND flash memory cells for hardware-based neural networks	6
Editorial Board	6
Sensitivity implications for programmable transistor based 1T-DRAM	6
Surrogate models for device design using sample-efficient Deep Learning	6
Resistive Switching phenomenon in FD-SOI Ω-Gate FETs: Transistor performance recovery and back gate bias influence	6
Impact of series resistance on the drain current variability in inversion mode and junctionless nanowire transistors	6
Editorial. Special issue. EUROSOI-ULIS 2023	6
Editorial: Letters from the 8th Joint International EUROSOI workshop and International Conference on Ultimate Integration on Silicon	6
Investigation on the performance limits of Dirac-source FETs	6
Bias stress stabilities of PMMA-passivated indium-gallium-zinc-oxide thin-film transistors after 100 °C steam exposure	6
Building robust machine learning force fields by composite Gaussian approximation potentials	6
Influence of N-type substrate’s bias potential on electrical characteristics of 4H-SiC integrated devices for All-SiC ICs	6
A simulation methodology for superconducting qubit readout fidelity	6
Implementation of device-to-device and cycle-to-cycle variability of memristive devices in circuit simulations	6
Silicon nanowire field-effect transistor biosensors with bowtie antenna	6
Editorial to Letters from SISPAD-2022	6
Compact modeling of Schottky barrier field-effect transistors at deep cryogenic temperatures	6
Investigating random discrete dopant-induced variability in cryogenic gate-all-around nanosheet FETs: A quantum transport simulation study	6
Effect of Al2O3 on the operation of SiNX-based MIS RRAMs	6
Precise channel temperature prediction in AlGaN/GaN HEMTs via closed-form empirical expression	6
Boosting the electrical performance of solar cells by using PIN diode structure with different layout styles controlled by MOS capacitor	6
Editorial Board	6
A compact physical expression for the static drain current in heterojunction barrier CNTFETs	6
TCAD numerical modeling of negative capacitance ferroelectric devices for radiation detection applications	6
Switching limits of top-gated carbon nanotube field-effect transistors	6
Sub micro-accelerometer based on spintronic technology: A design optimization	6
Preliminary results on industrial 28nm FD-SOI phase change memory at cryogenic temperature	6
A simple method for the photometric characterization of organic light-emitting diodes	6
Editorial Board	6
Achieving long-term and short-term synaptic plasticity in adaptive ANNs: A memristor circuit design with switchable dual-mode	6
In-situ fluorine-doped ZnSnO thin film and thin-film transistor	6
Quantum simulations of MoS2 field effect transistors including contact effects	6
Non-Quasi-Static modeling and methodology in fully depleted SOI MOSFET for L-UTSOI model	5
Competition between heating and cooling during dynamic self-heating degradation of amorphous InGaZnO thin-film transistors	5
Impact of Gate Oxide Thickness on Flicker Noise (1/f) in PDSOI n-channel FETs	5
Modeling electrical resistivity of CrSi thin films	5
CMOS inverter performance degradation and its correlation with BTI, HCI and OFF state MOSFETs aging	5
Computational model for predicting structural stability and stress transfer of a new SiGe stressor technique for NMOS devices	5
Strong quantization of current-carrying electron states in δ-layer s	5
Editorial Board	5
Perovskite-based optoelectronic artificial synaptic thin-film transistor	5
Application of explainable AI on deep learning-based gate length scalable IV parameter extractor for BSIM-IMG	5
Editorial Board	5
Mobility and intrinsic performance of silicon-based nanosheet FETs at 3 nm CMOS and beyond	5
Simulation of low frequency noise in buried-channel MOSFET by a Green’s function-based numerical trap level model	5
Pursuing the FD-SOI roadmap down to 10 nm and 7 nm nodes for high energy efficient, low power and RF/mmWave applications	5
Evaluation of a single interface trap position on the low-frequency noise of junctionless nanowire transistors	5
Modelling of self-heating effect in FDSOI and bulk MOSFETs operated in deep cryogenic conditions	5

Degradation mechanisms for static and dynamic characteristics in 1.2 kV 4H-SiC MOSFETs under repetitive short-circuit tests	5
Simulation study on physical parameters ruling unipolar resistance switching of sputter-deposited silicon oxide film on Si substrate	5
Analysis of back-gate bias impact on 22 nm FDSOI SRAM cell	5
About electron transport and spin control in semiconductor devices	5
A simulation physics-guided neural network for predicting semiconductor structure with few experimental data	5
Improved self-heating extraction with RF technique at cryogenic temperatures	5
Impact of Device Layout on Self-Heating Extraction in MOSFETs	5
Effect of SOI substrate on silicon nitride resistance switching using MIS structure	5
Spin-orbit torque magnetic tunnel junction based on 2-D materials: Impact of bias-layer on device performance	5
Opportunity to achieve an efficient SiC/SiO2 interface N passivation by tuning the simultaneous oxidation modes during the SiC surface nitridation in N2 + O2 annealing	5
Nanoscale SOI strain engineering: STRASS-enabled local stress optimization	5
Impact of the channel doping on the low-frequency noise of gate-all-around silicon vertical nanowire pMOSFETs	5
Experimental assessment of gate-induced drain leakage in SOI stacked nanowire and nanosheet nMOSFETs at high temperatures	5
Mitigating LeTID-Induced performance loss through high-frequency AC carrier injection: Architecture-dependent recovery trends in crystalline silicon solar cells	5
Analog resistive switching behavior in BiCoO3 thin film	5
1540 V 21.8mΩ·cm2 4H-SiC lateral MOSFETs with DOUBLE RESURFs for power integration applications	5
Assessment of ion-sensitivity of Si3N4 based feedback field effect transistor using snap-back characteristics	5
Corrigendum to “Modeling and simulations of FDSOI five-gate qubit MOS devices down to deep cryogenic temperatures” [Solid State Electron. 193 (2022) 108291]	5
WITHDRAWN: Analysis on effect of hot-carrier-induced degradation of NPT-IGBT	5
Interface effects in ultra-scaled MRAM cells	5
Study of TiN/Ti/HfO2/W resistive switching devices: characterization and modeling of the set and reset transitions using an external capacitor discharge	5
A mathematical model for non-equilibrium body potential of SOI Pseudo-MOS and physical mechanism analysis	5
Quantum element method for multi-dimensional nanostructures enabled by a projection-based learning algorithm	5
GaN p-i-n ultraviolet photodetectors grown on homogenous GaN bulk substrates	5
Switching layer optimization in Co-based CBRAM for >105 memory window in sub-100 µA regime	5
Avalanche breakdown and quenching in Ge SPAD using 3D Monte Carlo simulation	5
Modulation of ballistic injection velocity in phosphorene nanodevices by bias and confinement effects	5
Influence of temperature inhomogeneity and trap charge on current imbalance of SiC MOSFETs	5
300 Mm sSOI engineering with ultra thin buried oxide	5
Improvement of electrical performance in Normally-Off GaN MOSFET with regrown AlGaN layer on the Source/Drain region	5
Determination of source series resistances for InP HEMT under normal bias condition	5
Investigation and optimization of traps properties in Al2O3/SiO2 dielectric stacks using conductance method	5
Geometrical and thermal effects on mobility and analog parameters of AlGaN/GaN HEMTs on silicon substrates	5
Improving cell current in 3D NAND flash memory with fixed oxide charge	5
Influence of gate-source/drain overlap on FeFETs	4
Improved inter-device variability in graphene liquid gate sensors by laser treatment	4
A dynamic current hysteresis model for IGZO-TFT	4
Approximate H-transformation for numerical stabilization of a deterministic Boltzmann transport equation solver based on a spherical harmonics expansion	4
Novel Y-function based strategy for parameter extraction in S/D asymmetric architecture devices and low frequency noise characterization in GAA Si VNW pMOSFETs	4
Drain-bias dependence of low-frequency Y22 signals for Fe-related GaN traps in GaN HEMTs with different Fe doping concentrations	4
Multi-state tunnel field effect transistor based on face tunneling with gate-source overlap	4
Device and circuit-level evaluation of a zero-cost transistor architecture developed via process optimization	4
Low-frequency noise characterization of positive bias stress effect on the spatial distribution of trap in β-Ga2O3 FinFET	4
A novel method used to prepare PN junction by plasmon generated under pulsed laser irradiation on silicon chip	4
A well-conditioned surface potential equation for dynamically depleted SOI MOS devices accounting for the front-depletion/back-accumulation operation mode	4
Thickness-dependent dielectric breakdown in thick amorphous SiO2 capacitors	4
On the breakdown voltage temperature dependence of high-voltage power diodes passivated with diamond-like carbon	4
Application of forksheet transistor in operational transconductance amplifier	4
An understanding of fracture kinetics during the layer transfer of InP	4
Hierarchical simulation of nanosheet field effect transistor: NESS flow	4
Methodology for parameters extraction with undoped junctionless EZ-FETs	4
Mechanism of polarization “Wake-Up” in ferroelectric Hafnia-Zirconia thin films	4
Model and parameter extraction strategy impact on the estimated values of MOSFET parameters in ohmic operation	4
Deep spiking neural networks with integrate and fire neuron using steep switching device	4
An All-GaN cascode device with integrated plane-parallel capacitor with high dynamic breakdown voltage and high switching performance	4
Silicon nitride resistance switching MIS cells doped with silicon atoms	4
The study on influence factors of contact properties of metal-MoS2 interfaces	4
Evidence of trapping and electrothermal effects in vertical junctionless nanowire transistors	4
Evidence of Transport Degradation in 22 nm FD-SOI Charge Trapping Transistors for Neural Network Applications	4
Performance of FDSOI double-gate dual-doped reconfigurable FETs	4
Monte Carlo analysis of hot electron injection in the passivation layer of GaN HEMTs	4
Impact of the W etching process on the resistive switching properties of TiN/Ti/HfO2/W memristors	4
Effect of PN passivation on MOSFETs performance in 28 nm FD-SOI	4
Si/Ge1−x	4
One-step variation included compact modeling with conditional variational autoencoder	4
A composite model of memristors based on barrier and dopant drift mechanisms	4
On the role of power dissipation in the Post-BD behavior of FDSOI NanoWire FETs	4
SPICE simulation of the time-dependent clustering model for dielectric breakdown	4
An accurate machine learning model to study the impact of realistic metal grain granularity on Nanosheet FETs	4
Efficient atomistic simulations of lateral heterostructure devices with metal contacts	4
Design methodology of a 28 nm FD-SOI capacitive feedback RF LNA based on the ACM model and look-up tables	4
Efficient circuit simulation of a memristive crossbar array with synaptic weight variability	4
Simulation process flow for the implementation of industry-standard FD-SOI quantum dot devices	4
Editorial Board	4
Semi-classical transport in MoS2 and MoS2 transistors by a Monte Carlo approach	4
Editorial Board	4
Novel crossbar array of silicon nitride resistive memories on SOI enables memristor rationed logic	4
Enabling medium thick gate oxide devices in 22FDX® technology for switch and high-performance amplifier application	4
Editorial Board	4
Analysis of 1/f and G–R noise in Phosphorene FETs	4
An efficient temperature dependent compact model for nanosheet FET for neuromorphic computing circuit	4
Stress management in freestanding membranes obtained by ion implantation induced delamination	4
Design and modeling of resonant tunneling transport-controlled voltage-induced double quantum dot channel nanowire field-effect-transistor (DQD-FET) for multi-threshold current levels	4
A novel methodology for neural compact modeling based on knowledge transfer	4
Back-gate effects on DC performance and carrier transport in 22 nm FDSOI technology down to cryogenic temperatures	4
Unveiling the mechanism behind the negative capacitance effect in Hf0.5Zr0.5O2-Based ferroelectric gate stacks and introducing a Circuit-Compatible hybrid compact model for Leakage-Aware NCFETs	4
Design of auto-store circuit for nvSRAM with SONOS access transistor	4
Novel experimental methodologies to reconcile large- and small-signal responses of Hafnium-based Ferroelectric Tunnel Junctions	4
Comparison of impact of channel length- and width-directional taper angle in nanosheet and forksheet FETs for 2 nm node and beyond	4
Comprehensive evaluation of torques in ultra-scaled MRAM devices	4
Electron and spin transport in semiconductor and magnetoresistive devices	4
Operation of junctionless nanowire transistors down to 4.2 Kelvin	3
Impact of back-biasing on the series resistance in ultrathin SOI devices	3
Analogies for Dirac fermions physics in graphene	3
Investigation of compliance current effect on resistive switching properties in Ag/SiOx/Cr RRAM devices	3