Microelectronics Journal

Papers
(The TQCC of Microelectronics Journal is 6. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2021-02-01 to 2025-02-01.)
ArticleCitations
Performance investigation of different low power SRAM cell topologies using stacked-channel tri-gate junctionless FinFET62
Performance prediction of random variable-width microfluidic chips by convolutional neural networks49
An energy-efficient crypto-extension design for RISC-V44
Photoluminescence and time resolved photoluminescence properties in as grown ZnO thin films prepared by DC reactive sputtering for optoelectronic devices40
Simulation and reliability testing of leadless package high-temperature pressure sensor34
Magnetoelectric memory cell based on 0.5Ba(Zr0.2Ti0.8)O3-0.5Ba0.7Ca0·3TiO3/Fe65Co35 thin films30
A high reliability physically unclonable function based on multiple tunable ring oscillator28
An integrated thermal and RF energy harvesting system with rectifying combination and storage controller for IoT devices27
A low-overhead PUF for anti-clone attack of RFID tags27
Design of 0–15 GHz flat-bandwidth programmable gain amplifier based on transconductance switching technique26
Inverter-based noise-shaping SAR ADC for low-power applications25
Trenched diamond PN junction diode with enhanced conductance modulation effect designed by simulation24
A 24 ​GHz PLL with low phase noise for 60 ​GHz Sliding-IF transceiver in a 65-nm CMOS23
A mirrored 5T1C OLED pixel circuit for compensating characteristics variations and voltage drop22
A reconfigurable millimeter-wave wideband low-noise amplifier in 55-nm CMOS22
A low power and jitter delay cell with pulse width modulation for wide range delay lock loops22
Dynamic self-test scheme and authentication protocol for improving robustness of strong PUF21
Design and simulation of continuous tuning band stop filter by2-D periodic defected ground structure20
Threshold voltage modeling of Gaussian-doped Dual work function Material Cylindrical Gate-all-around (CGAA) MOSFET considering the effect of temperature and fixed interface trapped charges19
Hybrid small-signal modeling of GaN HEMTs based on improved genetic algorithm19
Crosstalk analysis of dielectric inserted side contact multilayer graphene nanoribbon interconnects for ternary logic system using unconditionally stable FDTD model18
A 120 MHz fast automatic tuning CMOS active-RC lowpass filter17
Editorial Board17
Simulation study on quantum dot formation of double-qubit-Si-MOS device17
GaN-based wide-band high-efficiency power amplifier with multi harmonic resonance16
Editorial Board15
An intensive approach to optimize capacitive type RF MEMS shunt switch15
PCB mounted sensor with high sensitivity SWNT-Based devices for gas sensing applications15
Electric-field-drive single photon avalanche diode with barrier enhancement for fluorescence detection14
BISH–QVCO: A Low–Power, Low–Phase noise Bulk–Injected Super–Harmonic coupling QVCO14
Recurrent neural networks models for analyzing single and multiple transient faults in combinational circuits14
A Nested Miller Compensation with a large feed-forward transconductor for capacitor-less flipped voltage follower low dropout regulator14
High-throughput, area-efficient hardware architecture of CABAC-Binarization for UHD applications14
Editorial Board14
Analytical modeling and numerical simulation of graded JAM Split Gate-All-Around (GJAM-SGAA) Bio-FET for label free Avian Influenza antibody and DNA detection13
Effect of lateral straggle parameter on Hetero Junction Dual Gate Vertical TFET13
Study of coupling-of-modes for wavelet transform processors using surface acoustic wave devices13
Achievements, challenges, and developing directions of bio-inspired self-repairing technology13
Design of energy efficient approximate subtractors and restoring dividers for error tolerant applications13
Design of efficient approximate 1-bit Full Adder cells using CNFET technology applicable in motion detector systems13
A low complexity bit parallel polynomial basis systolic multiplier for general irreducible polynomials and trinomials13
Investigation of Ge-Based P-Channel Planar-Doped Barrier FETs integrated on Si13
Disconnected N-doped zigzag ZnO nanoribbon for potential Negative Differential Resistance (NDR) applications12
Modeling of single/multiple-bit upset effects on logic circuits applying Recurrent Neural Network12
A configurable detection chip with ±0.6% Inaccuracy for liquid conductivity using dual-frequency sinusoidal signal technique in 65 nm CMOS12
A 200 Hz-to-10 kHz bandwidth 11.83-ENOB level-crossing ADC with single continuous-time comparator12
MESO-ADC: The ADC design using MESO device12
Editorial Board12
Two sextuple cross-coupled SRAM cells with double-node-upset protection and cost optimization for aerospace applications12
Editorial Board12
A time-interleaved ADC calibration technique for spectrum monitoring applications12
An accurate ISF-based analysis and simulation method for phase noise in LC/Ring oscillators12
Editorial Board12
Carry look-ahead and ripple carry method based 4-bit carry generator circuit for implementing wide-word length adder12
Memory-less discrete Gaussian sampler on FPGA11
Back-gate bias effect on the linearity of pocket doped FDSOI MOSFET11
A hardware accelerator for IEEE 802.15.4 Time-Slotted Channel Hopping transceiver11
High-performance polymer top-contact thin-film transistor with orthogonal photolithographic process11
Channel modeling of wireless 3D-chip based on ray-tracing11
A 2.44μs row conversion time 12-bit high-speed differential single-slope ADC with TDC applied to CMOS image sensor11
A novel wide bandwidth FBSSIR integrated low noise amplifier for satellite navigational receiver system11
Impact of biomolecules position and filling area on the sensitivity of hetero stack gate MOSFET11
Accurate method to calculate noise figure in a low noise amplifier: Quantum theory analysis11
Editorial Board11
Low power current comparator circuit using a cascode transistor structure for bias generation11
A hardware-efficient dual-source data replication and local broadcast mechanism in distributed shared caches11
Logarithm-approximate floating-point multiplier11
A GPGPU microarchitecture supports multi-path execution and branch compaction11
A self-powered extensible P–SSHI array interface circuit with thermoelectric energy assistance for piezoelectric energy harvesting10
A compact model of DC I–V characteristics for depleted Ga2O3 MOSFETs10
Ammonia optical gas sensing based on graphene-covered silicon microring resonators: A design space exploration10
A low-power mm-wave reduced-noise active balun with low-phase and low-gain error using common-gate shorting and DeQ inductor technique10
A 50 Gb/s PAM-4 EAM driver in 28-nm CMOS technology10
A ku-band common-leg transceiver with built-in configurable register in 130-nm CMOS technology for phased-array systems10
Study of multi-domain switching dynamics in negative capacitance FET using SPICE model10
Comprehensive probability method of buffer insertion based on Gaussian fitting under process variation condition10
Editorial Board10
A 64 ​dBΩ, 25 ​Gb/s GFET based transimpedance amplifier with UWB resonator for optical radar detection in medical applications10
Editorial Board9
An efficient methodology for hardware Trojan detection based on canonical correlation analysis9
An ultra-low-power bulk-driven subthreshold super class-AB rail-to-rail CMOS OTA with enhanced small and large signal performance suitable for large capacitive loads9
Input-resistance reduced g-boosted common-gate transimpedance amplifier for 100 Gb/s optical communication9
Low mismatch high-speed charge pump for high bandwidth phase locked loops9
Modeling crosstalk effects of hybrid copper carbon nanotube interconnects using a novel accurate FDTD based method9
Exact and approximate multiplications for signal processing applications9
Novel SenseFET structure for VDMOS with adopting body reverse bias technique to adjust the reference current ratio9
Clock Aligned Input Adiabatic Logic9
An artificial bridge circuit approach between two biological neurons using nanoscale topologies towards paralytic disorders9
Placement-guided pin layout substitution for routability optimization9
A robust and write bit-line free sub-threshold 12T-SRAM for ultra low power applications in 14 nm FinFET technology9
Micromachined W-band dual-band quasi-elliptic waveguide filter9
Broadband linearity enhancement method for a 1.3 GHz–2.5 GHz digitally-assisted oscillator in a 55-nm CMOS technology9
Negative capacitance FET based energy efficient and DPA attack resilient ultra-light weight block cipher design9
Design and investigation of a high integrated reliable ceramic package for surface mount technology9
Enabling on-device classification of ECG with compressed learning for health IoT9
Junctionless-accumulation-mode stacked gate GAA FinFET with dual-k spacer for reliable RFIC design8
Design of a V-band low noise amplifier for passive millimeter wave imaging application8
Design of photonic crystal based compact all-optical 2 × 1 multiplexer for optical processing devices8
Impact of thermally -aware environmental conditions on double gate carbon nanotube FET8
X-parameter modeling investigation for microwave power devices8
0.18-μm CMOS process 40 MHz–4.41 GHz frequency synthesizer with high linearity low phase noise varactor-reconstruction LC-VCO8
A dual-output switched-capacitor regulator with a self-controlled ripple reduction technique for self-powered EEG acquisition8
A 1T2M memristor-based logic circuit and its applications8
A high-performance fully adaptive routing based on software defined network-on-chip8
Impact of temperature and interface trapped charges variation on the Analog/RF and linearity of vertically extended drain double gate Si0.5Ge0.5 source tunnel FET8
Voltage and temperature dependence of Random Telegraph Noise and their impacts on random number generator8
A general and efficient clocking scheme for majority logic in quantum-dot cellular automata8
Modeling threshold voltage and drain-induced barrier lowering effect of opposite doping core–shell channel surrounding-gate junctionless MOSFET8
Modeling of Dual- Metal Junctionless Accumulation-Mode cylindrical surrounding gate (DM-JAM-CSG) MOSFET for cryogenic temperature applications8
Analytical model of subthreshold drain current for nanoscale negative capacitance junctionless FinFET8
A design method of bipolar junction transistor for high-precision remote temperature sensing8
Effect of curie temperature on electrical parameters of NC-FinFET and digital switching application of NC-FinFET8
Pair-Wise Urdhava-Tiryagbhyam (UT) Vedic Ternary multiplier8
SPUF design based on Camellia encryption algorithm8
Total ionizing dose hardness analysis of transistors in commercial 180 nm CMOS technology8
Improved modeling of flicker noise including velocity saturation effect in FinFETs and experimental validation8
Design of integrated laser diode driver for 3D-depth sensing applications7
A hardware-efficient computing engine for FPGA-based deep convolutional neural network accelerator7
Analysis of nanoscale digital circuits using novel drain-gate underlap DMG hetero-dielectric TFET7
Filter-free color pixel sensor using gated PIN photodiodes and machine learning techniques7
A prominent unified crosstalk model for linear and sub-threshold regions in mixed CNT bundle interconnects7
Chaotic analysis and entropy estimation of the entropy source based on semiconductor superlattice chaos7
Frequency-scaled thermal-aware test scheduling for 3D ICs using machine learning based temperature estimation7
A low jitter 50 Gb/s PAM4 optical receiver in 130 nm SiGe BiCMOS7
A strip line technique based 1 Gb/s, 70-dB linear dynamic range transimpedance amplifier towards LiDAR unmanned vehicle application7
A 4H–SiC double trench MOSFET with split gate and integrated MPS diode7
A 27–35 GHz wideband PIN-diode limiter low noise amplifier MMIC with sub-2.4 dB noise figure7
Application of improved ACM model to the design by hand of CMOS analog circuits7
A foreground digital calibration algorithm for time-interleaved ADCs with low computational complexity7
Study of ambipolar and linearity behavior of the misaligned double gate-drain dopant-free Nano-TFET: Design and performance enhancement7
Behavioral-level modeling of GaN HEMT small-signal intrinsic noise based on DE-SVR algorithm7
A broad band energy harvesting rectenna based on metamaterial complementary split ring resonator broadband antenna and BALUN rectifier7
A 2.4 GHz sub 1-mW highly linear differential LNA using balun transformer gm-boosting technique7
Advances in neuromorphic devices for the hardware implementation of neuromorphic computing systems for future artificial intelligence applications: A critical review7
A Ka-band fourth-order SIW filter power divider with wide out-of-band suppression7
Design and implementation of true random number generators based on semiconductor superlattice chaos7
A fully integrated multiphase switched-capacitor DC-DC converter with PFM control and charge sharing loss reduction7
Analytical equivalent circuit modeling and analysis of complex BGA for 3D silicon-interposer packaging7
Dielectric surface roughness scattering induced crosstalk performance of coupled MCB interconnects6
Low to high-frequency noise behavior investigation of steeper sub-threshold swing NC-GeFinFET6
A stable voltage island-driven floorplanning with fixed-outline constraint for low power SoC6
Free fall drop impact analysis of board level electronic packages6
Design of wideband phase shifter with edge-coupled semi-elliptical lines6
Local bit-line shared pass-gate 8T SRAM based energy efficient and reliable In-Memory Computing architecture6
Design of a 24×28 gbaud tunable channel attenuator IC for PCB backplane transmission6
Editorial Board6
Instrumentation of Twin-MCMs based mutual-test6
A configurable area-efficient LCoS chip design with centrosymmetric pixel array6
A CMOS balun with common ground and artificial dielectric compensations applied in a wideband RF front-end6
CharTM: The dynamic stability characterization for memory based on tail distribution modeling6
Implementation of highly optimized optical all logic gates on a single chip using Ti-diffused lithium-niobate for high-speed processing in combinational circuits6
A 5T1C pixel circuit compensating mobility and threshold voltage variation6
A self-compensated approach for ramp kickback noise in CMOS image sensor column parallel single slope ADC6
Investigation and optimization of electro-thermal performance of Double Gate-All-Around MOSFET6
Optimization design of high-speed data acquisition system based on DMA double cache mechanism6
An offset cancellation technique for SRAM sense amplifier based on relation of the delay and offset6
Design of area-efficient modified decoder-based imprecise multiplier for error-resilient applications6
A comparative study on performance of junctionless Bulk SiGe and Si FinFET6
Effect of ITC on Boolean functionality of n-type heterojunction vertical TFETs6
Editorial Board6
D-wash – A dynamic workload aware adaptive cache coherance protocol for multi-core processor system6
High voltage GaN vertical FinFET with a compatible integrated fin diode for low reverse conduction loss6
Comparative analysis of radiation tolerant analog circuit layout in 180 nm CMOS technology for space application6
Structure design and optimization of SOI high-temperature pressure sensor chip6
A 12-bit single slope ADC with multi-step structure and ramp calibration technique for image sensors6
Multi-dimensional accumulation gate LDMOS with ultra-low specific on-resistance6
Column amplification stages in CMOS image sensors based on incremental sigma-delta ADCs6
A silicon carbide high gain differential amplifier for extreme temperature applications6
Versatile DAC-less successive approximation ADC architecture for medium speed data acquisition6
Reducing the power consumption of level-crossing analog-to-digital converters by using a signal activity monitoring circuit6
Editorial Board6
Editorial Board6
Design of radiation-hardened memory cell by polar design for space applications6
A 12-bit 10 MS/s SAR ADC using the extended C–2C capacitor array6
Scalable modeling of grounded coplanar waveguide for MMICs design using neural network with an effective sampling strategy6
A numerical calibration of structure-function transient thermal measurement based on Cauer RC network6
Impact on performance of dual stack hetero- gated dielectric modulated TFET biosensor due to Si1-xGex pocket variation6
An energy-efficient switching scheme based on a splitting structure6
A Sub-GHz multimode digital polar transmitter for 802.11ah and NB-IoT applications6
0.074334859848022