IEEE Transactions on Electron Devices

Papers
(The H4-Index of IEEE Transactions on Electron Devices is 43. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2022-06-01 to 2026-06-01.)
ArticleCitations
Compact Numerical Modeling of Indirect Time-of-Flight CMOS Image Sensors370
Improved Performance of MoS2 Negative-Capacitance Field-Effect Transistors by Optimizing Gate-Stack of Al-Doped HfO2/Al2O3124
Mobility Enhancement Induced by Oxygen Gettering of TiAl for Metal Gated NMOSFETs115
The Reliability and Noise Investigation of Boron Diffusion Under Positive Bias Temperature Instability in 16 nm Node High Voltage FinFETs110
Corrections to “Diamond-on-Si IGBT With Ultrahigh Breakdown Voltage and On-State Current”104
Low-Frequency Noise of 4H-SiC CMOS Technology for Analog ICs93
Demonstration of Reconfigurable FET and Logic Gates on Epitaxial Lateral Overgrowth Silicon Platform92
The Regime of the Efficiency Increase by Use of Long Circuits in the THz Cherenkov Oscillator84
Effect of Biaxial Bending Strains on the Electrical Characteristics of Flexible Low-Temperature Polysilicon Thin-Film Transistors71
Synaptic Transistors Based on Electrospun Aligned Nanowire for Neuromorphic Computing69
Changes in the Editorial Board69
Table of Contents66
Call for Nominations for Editor-in-Chief: IEEE Transactions on Semiconductor Manufacturing64
Analysis of the Avalanche Operation of a GaN Photoconductive Semiconductor Switch61
Mode-Locking Operation of a Ka-Band Helical Gyro-BWO Equipped With a Saturable-Absorber Feedback Loop58
A Method to Isolate Intrinsic HCD and NBTI Contributions Under Self Heating During Varying VG/VD Stress in GAA Nanosheet PFETs57
Pinned Photodiode Imaging Pixel With Floating Gate Readout and Dual Gain57
Investigating Thermionic Emission Properties of Polycrystalline Perovskite BaMoO354
Stack Optimization of TiO x -Based Resistive Switching Devices Through Interface Engineering54
IEEE Transactions on Electron Devices Publication Information54
Exploring the Effect of Dy Doping on the Performance of Solution-Processed Indium Oxide Thin Films and Thin-Film Transistors53
Intrinsic Gate Capacitance of Ultrathin Body Nanosheets Considering Quantum Effects53
Opposing Mean Error Compensation for Accuracy Enhancement in Analog Compute-in-Memory With Resistive Switching Devices53
Monolithic 3-D Integration of 2T0C DRAM and 1T1R RRAM for Accelerating Dynamic/Static Matrix Computation in Transformer Network52
Roles of Trap States in the Dynamic Degradation of Polycrystalline Silicon Thin-Film Transistors Under AC Gate Bias Stress51
A Physics-Based Compact Model for Silicon Cold-Source Transistors49
Investigation of Bending-Induced Degradation of Flexible AlGaN/GaN HEMTs49
Performance Boost of Si TFETs by Insertion of III–V Dipole Formation Layer: A First Principle Study48
Preliminary Analysis of the Coaxial Double Staggered Grating Structure for a Hollow Beam Backward Wave Oscillator48
Compensation Method for Displacement Caused by CTE Mismatch in Micro-LED Bonding Process47
Performance Regulation of Near-Field Electroluminescent Cooling Device Based on 2-D Material47
Suppression of Circularly Polarized Microwave Dielectric Multipactor by Normal Gyromagnetic Field46
HEMT With Ultralow Contact Resistance by Room Temperature Process With One-Step EBL T-Shape Gates for Subterahertz Applications: Design, Fabrication, and Characterization46
Defect-Engineered Resistive Switching in van der Waal Metals46
The Investigation of Reduced Variation Effect in FinFETs With Ultrathin 3-nm Ferroelectric Hf₀.₅Zr₀.₅O₂45
TiO2 Nanofibers Doped With NiS as Photoanode to Improve the Photovoltaic Conversion Efficiency of Dye-Sensitized Solar Cells45
Modeling and Analysis of Terminal Capacitances in High-Power Devices: Application to p-GaN Gate HEMTs45
Investigation of Peak-to-Valley Current Ratio of GaN/AlN Resonant Tunneling Diodes45
Design and Experimental Demonstration of 4H-SiC Lateral High-Voltage MOSFETs With Double-RESURFs Technology for Power ICs44
Application of Pulsed Green Laser Activation to Top-Tier MOSFET Fabrication for Monolithic 3-D Integration44
Analysis of Thermal Disturbance in Vertically Stacked Phase-Change Memory Using Multiphysics Simulation44
A High Voltage Gain Inverter Integrated With Enhancement- and Depletion-Mode a-InGaZnO Thin-Film Transistors44
Study on Scalable Model of Multifinger Structure for GaN p-i-n Diode44
IEEE Transactions on Electron Devices Publication Information43
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