IEEE Transactions on Computers

Papers
(The median citation count of IEEE Transactions on Computers is 3. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2020-11-01 to 2024-11-01.)
ArticleCitations
SAFA: A Semi-Asynchronous Protocol for Fast Federated Learning With Low Overhead187
EIHDP: Edge-Intelligent Hierarchical Dynamic Pricing Based on Cloud-Edge-Client Collaboration for IoT Systems105
EnGN: A High-Throughput and Energy-Efficient Accelerator for Large Graph Neural Networks89
Dependent Task Offloading for Edge Computing based on Deep Reinforcement Learning84
Efficient CP-ABE Scheme With Shared Decryption in Cloud Storage84
ZigZag: Enlarging Joint Architecture-Mapping Design Space Exploration for DNN Accelerators74
BAFL: A Blockchain-Based Asynchronous Federated Learning Framework73
DORY: Automatic End-to-End Deployment of Real-World DNNs on Low-Cost IoT MCUs71
Adaptive Federated Learning on Non-IID Data With Resource Constraint61
An Improved Logarithmic Multiplier for Energy-Efficient Neural Computing60
MTHAEL: Cross-Architecture IoT Malware Detection Based on Neural Network Advanced Ensemble Learning60
Credit Risk Analysis Using Quantum Computers59
Voltage Over-Scaling-Based Lightweight Authentication for IoT Security58
A3C-DO: A Regional Resource Scheduling Framework Based on Deep Reinforcement Learning in Edge Scenario58
A Blockchain-Based Decentralized, Fair and Authenticated Information Sharing Scheme in Zero Trust Internet-of-Things56
The Graph Structure of the Generalized Discrete Arnold's Cat Map56
Lime: Low-Cost and Incremental Learning for Dynamic Heterogeneous Information Networks51
Deep Learning for HDD Health Assessment: An Application Based on LSTM48
Optimality Study of Existing Quantum Computing Layout Synthesis Tools46
Area-Optimized Accurate and Approximate Softcore Signed Multiplier Architectures44
Vector-Indistinguishability: Location Dependency Based Privacy Protection for Successive Location Data44
Device-Circuit-Architecture Co-Exploration for Computing-in-Memory Neural Accelerators42
Hardware Private Circuits: From Trivial Composition to Full Verification41
An Extensive Study of Flexible Design Methods for the Number Theoretic Transform40
Malware Analysis By Combining Multiple Detectors and Observation Windows39
An Energy-Aware High Performance Task Allocation Strategy in Heterogeneous Fog Computing Environments39
PyQUBO: Python Library for Mapping Combinatorial Optimization Problems to QUBO Form39
Evaluations on Deep Neural Networks Training Using Posit Number System38
Elliptic Curve Cryptography Point Multiplication Core for Hardware Security Module38
Magnifying Side-Channel Leakage of Lattice-Based Cryptosystems With Chosen Ciphertexts: The Case Study of Kyber36
High-Speed Hardware Architectures and FPGA Benchmarking of CRYSTALS-Kyber, NTRU, and Saber34
A Hybrid Quantum-Classical Approach to Mitigating Measurement Errors in Quantum Algorithms34
SPDL: A Blockchain-Enabled Secure and Privacy-Preserving Decentralized Learning System34
SCAUL: Power Side-Channel Analysis With Unsupervised Learning32
Design and Simulation of a Hybrid Architecture for Edge Computing in 5G and Beyond32
VecQ: Minimal Loss DNN Model Compression With Vectorized Weight Quantization31
Real-Time Detection of Hogweed: UAV Platform Empowered by Deep Learning31
Evaluation and Optimization of Distributed Machine Learning Techniques for Internet of Things30
Practical Resilience Analysis of GPGPU Applications in the Presence of Single- and Multi-Bit Faults30
λDNN: Achieving Predictable Distributed DNN Training With Serverless Architectures30
Distributed Deep Convolutional Neural Networks for the Internet-of-Things30
Fairness-Aware Energy Efficient Scheduling on Heterogeneous Multi-Core Processors29
Learning-Based Modeling and Optimization for Real-Time System Availability28
Soft Error Effects on Arm Microprocessors: Early Estimations versus Chip Measurements28
Snitch: A Tiny Pseudo Dual-Issue Processor for Area and Energy Efficient Execution of Floating-Point Intensive Workloads28
Supersingular Isogeny Key Encapsulation (SIKE) Round 2 on ARM Cortex-M428
Endogenous Trusted DRL-Based Service Function Chain Orchestration for IoT28
Practical and Secure SVM Classification for Cloud-Based Remote Clinical Decision Services27
LUTNet: Learning FPGA Configurations for Highly Efficient Neural Network Inference26
Falcon: Addressing Stragglers in Heterogeneous Parameter Server Via Multiple Parallelism26
Circuit-Based Quantum Random Access Memory for Classical Data With Continuous Amplitudes26
Revocable Blockchain-Aided Attribute-Based Encryption With Escrow-Free in Cloud Storage25
Blockchain-Cloud Transparent Data Marketing: Consortium Management and Fairness23
2.5D Root of Trust: Secure System-Level Integration of Untrusted Chiplets23
Plasticity-on-Chip Design: Exploiting Self-Similarity for Data Communications23
Qubit Mapping Based on Subgraph Isomorphism and Filtered Depth-Limited Search22
Shuhai: A Tool for Benchmarking High Bandwidth Memory on FPGAs22
In-Storage Computing for Hadoop MapReduce Framework: Challenges and Possibilities21
VISE: Combining Intel SGX and Homomorphic Encryption for Cloud Industrial Control Systems21
Scalable Concolic Testing of RTL Models21
FeFET Multi-Bit Content-Addressable Memories for In-Memory Nearest Neighbor Search21
Extending On-chain Trust to Off-chain -- Trustworthy Blockchain Data Collection using Trusted Execution Environment (TEE)20
On the Reliability of FeFET On-Chip Memory20
Folding BIKE: Scalable Hardware Implementation for Reconfigurable Devices20
Detecting Outlier Machine Instances Through Gaussian Mixture Variational Autoencoder With One Dimensional CNN20
SSD In-Storage Computing for Search Engines20
Stream Semantic Registers: A Lightweight RISC-V ISA Extension Achieving Full Compute Utilization in Single-Issue Cores20
Elastic Bloom Filter: Deletable and Expandable Filter Using Elastic Fingerprints20
Enabling Secure NVM-Based in-Memory Neural Network Computing by Sparse Fast Gradient Encryption20
Flow-Based Microfluidic Biochips With Distributed Channel Storage: Synthesis, Physical Design, and Wash Optimization19
Brain-Inspired Computing for Circuit Reliability Characterization19
MGARD+: Optimizing Multilevel Methods for Error-Bounded Scientific Data Reduction19
A RISC-V ISA Extension for Ultra-Low Power IoT Wireless Signal Processing19
Tensor Recurrent Neural Network With Differential Privacy19
A Comprehensive Methodology to Optimize FPGA Designs via the Roofline Model18
QoS Prediction and Adversarial Attack Protection for Distributed Services Under DLaaS18
Real-Time Task Scheduling for Machine Perception in In Intelligent Cyber-Physical Systems18
Detecting Spectre Attacks Using Hardware Performance Counters18
PermCNN: Energy-Efficient Convolutional Neural Network Hardware Architecture With Permuted Diagonal Structure17
SLA-Based Scheduling of Spark Jobs in Hybrid Cloud Computing Environments17
An Occlusion and Noise-Aware Stereo Framework Based on Light Field Imaging for Robust Disparity Estimation17
DMRlib: Easy-Coding and Efficient Resource Management for Job Malleability17
Toward QoS-Awareness and Improved Utilization of Spatial Multitasking GPUs17
CloudChain: A Cloud Blockchain Using Shared Memory Consensus and RDMA17
A Decentralized Mechanism Based on Differential Privacy for Privacy-Preserving Computation in Smart Grid17
Blockchain-Based Distributed Multiagent Reinforcement Learning for Collaborative Multiobject Tracking Framework17
GRIP: A Graph Neural Network Accelerator Architecture16
Malware-on-the-Brain: Illuminating Malware Byte Codes With Images for Malware Classification16
Inverse Queuing Model-Based Feedback Control for Elastic Container Provisioning of Web Systems in Kubernetes16
Ameliorate Performance of Memristor-Based ANNs in Edge Computing16
Remote Control: A Simple Deadlock Avoidance Scheme for Modular Systems-on-Chip16
Hardware-Assisted Malware Detection and Localization using Explainable Machine Learning16
Hardware Design of an Advanced-Feature Cryptographic Tile within the European Processor Initiative16
Secure Lightweight Key Exchange Using ECC for User-Gateway Paradigm16
PAM: A Piecewise-Linearly-Approximated Floating-Point Multiplier With Unbiasedness and Configurability15
Lightweight Neural Architecture Search for Temporal Convolutional Networks at the Edge15
An Efficient Preprocessing-Based Approach to Mitigate Advanced Adversarial Attacks15
A First Look at RISC-V Virtualization from an Embedded Systems Perspective15
Enabling Homomorphically Encrypted Inference for Large DNN Models15
Generating Robust DNN With Resistance to Bit-Flip Based Adversarial Weight Attack15
L4L: Experience-Driven Computational Resource Control in Federated Learning15
Svelto: High-Level Synthesis of Multi-Threaded Accelerators for Graph Analytics14
DeepWare: Imaging Performance Counters with Deep Learning to Detect Ransomware14
Software-Defined Design Space Exploration for an Efficient DNN Accelerator Architecture14
PyLog: An Algorithm-Centric Python-Based FPGA Programming and Synthesis Flow14
Improved Basic Block Reordering14
BM-RCGL: Benchmarking Approach for Localization of Reliability-Critical Gates in Combinational Logic Blocks14
How to Reduce the Bit-Width of an Ising Model by Adding Auxiliary Spins14
Reliability Enhanced Heterogeneous Phase Change Memory Architecture for Performance and Energy Efficiency14
DAG-Fluid: A Real-Time Scheduling Algorithm for DAGs14
Towards Thermal-Aware Workload Distribution in Cloud Data Centers Based on Failure Models14
E2CNNs: Ensembles of Convolutional Neural Networks to Improve Robustness Against Memory Errors in Edge-Computing Devices14
Silent Data Corruptions: Microarchitectural Perspectives13
An FPGA Based Accelerator for Clustering Algorithms With Custom Instructions13
A Change-Detection-Based Thompson Sampling Framework for Non-Stationary Bandits13
An Open-Source Platform for High-Performance Non-Coherent On-Chip Communication13
Blockchain-Based Fair and Fine-Grained Data Trading With Privacy Preservation13
Stateful Serverless Application Placement in MEC With Function and State Dependencies13
Reduced Precision DWC: An Efficient Hardening Strategy for Mixed-Precision Architectures13
Spatio-Temporal Optimization of Deep Neural Networks for Reconfigurable FPGA SoCs13
Scenario-based AI Benchmark Evaluation of Distributed Cloud/Edge Computing Systems12
S2Engine: A Novel Systolic Architecture for Sparse Convolutional Neural Networks12
Spiking Generative Adversarial Networks With a Neural Network Discriminator: Local Training, Bayesian Models, and Continual Meta-Learning12
OmpSs@FPGA framework for high performance FPGA computing12
R-HTDetector: Robust Hardware-Trojan Detection Based on Adversarial Training12
High-Radix Design of a Scalable Montgomery Modular Multiplier With Low Latency12
S-FLASH: A NAND Flash-based Deep Neural Network Accelerator Exploiting Bit-level Sparsity12
STR: Secure Computation on Additive Shares Using the Share-Transform-Reveal Strategy12
Fast and Accurate Error Simulation for CNNs Against Soft Errors12
Polynomial Computation Using Unipolar Stochastic Logic and Correlation Technique12
TrackLace: Data Management for Interlaced Magnetic Recording12
A Unified Cryptoprocessor for Lattice-Based Signature and Key-Exchange12
FeFET-Based Binarized Neural Networks Under Temperature-Dependent Bit Errors12
Online Service Function Chain Placement for Cost-Effectiveness and Network Congestion Control12
Generalized Mixed-Criticality Static Scheduling for Periodic Directed Acyclic Graphs on Multi-Core Processors11
Efficient Hardware Malware Detectors That are Resilient to Adversarial Evasion11
Accelerating Large-Scale Graph-Based Nearest Neighbor Search on a Computational Storage Platform11
New Low-Area Designs for the AES Forward, Inverse and Combined S-Boxes11
Analyzing Arm's MPAM From the Perspective of Time Predictability11
MUSE: A Multi-Tierd and SLA-Driven Deduplication Framework for Cloud Storage Systems11
Designing Predictable Cache Coherence Protocols for Multi-Core Real-Time Systems11
Real-Time Full-Chip Thermal Tracking: A Post-Silicon, Machine Learning Perspective11
HW/SW Co-Design for Reliable TCAM- Based In-Memory Brain-Inspired Hyperdimensional Computing11
Alternative Tower Field Construction for Quantum Implementation of the AES S-Box11
Leaking Secrets through Modern Branch Predictor in the Speculative World11
AutoDiagn: An Automated Real-Time Diagnosis Framework for Big Data Systems11
Side-Channel Analysis and Countermeasure Design on ARM-Based Quantum-Resistant SIKE11
Scalability in Computing and Robotics11
ECC-United Cache: Maximizing Efficiency of Error Detection/Correction Codes in Associative Cache Memories11
VRBC: A Verifiable Redactable Blockchain with Efficient Query and Integrity Auditing11
Sandbox Computing: A Data Privacy Trusted Sharing Paradigm via Blockchain and Federated Learning11
SOT-MRAM Digital PIM Architecture With Extended Parallelism in Matrix Multiplication11
SAFLA: Scheduling Multiple Real-Time Periodic Task Graphs on Heterogeneous Systems11
3RSeT: Read Disturbance Rate Reduction in STT-MRAM Caches by Selective Tag Comparison10
Tapping into NFV Environment for Opportunistic Serverless Edge Function Deployment10
Fast En/Decoding of Reed-Solomon Codes for Failure Recovery10
Incentive Assignment in Hybrid Consensus Blockchain Systems in Pervasive Edge Environments10
Truth Discovery With Multi-Modal Data in Social Sensing10
Polymorphic Accelerators for Deep Neural Networks10
OsmoticGate: Adaptive Edge-Based Real-Time Video Analytics for the Internet of Things10
OpenHD: A GPU-Powered Framework for Hyperdimensional Computing10
Triangle Counting Accelerations: From Algorithm to In-Memory Computing Architecture10
DVREI: Dynamic Verifiable Retrieval over Encrypted Images10
Improving Log-Based Anomaly Detection by Pre-Training Hierarchical Transformers10
Adaptive Page Migration Policy With Huge Pages in Tiered Memory Systems10
Efficient Pipelined Execution of CNNs Based on In-Memory Computing and Graph Homomorphism Verification10
OPTIMUS: A Security-Centric Dynamic Hardware Partitioning Scheme for Processors that Prevent Microarchitecture State Attacks10
Understanding Selective Delay as a Method for Efficient Secure Speculative Execution10
Leaking Information Through Cache LRU States in Commercial Processors and Secure Caches10
STT-MRAM-Based Reliable Weak PUF10
An Exhaustive Approach to Detecting Transient Execution Side Channels in RTL Designs of Processors9
Memory-Aware Denial-of-Service Attacks on Shared Cache in Multicore Real-Time Systems9
Constructing Completely Independent Spanning Trees in a Family of Line-Graph-Based Data Center Networks9
Longevity Framework: Leveraging Online Integrated Aging-Aware Hierarchical Mapping and VF-Selection for Lifetime Reliability Optimization in Manycore Processors9
Revisiting Fault Adversary Models – Hardware Faults in Theory and Practice9
Improving Write Performance on Cross-Point RRAM Arrays by Leveraging Multidimensional Non-Uniformity of Cell Effective Voltage9
GenoDedup: Similarity-Based Deduplication and Delta-Encoding for Genome Sequencing Data9
High-Performance Constant-Time Discrete Gaussian Sampling9
High-Performance FPGA Accelerator for SIKE9
Stochastic SOT device based SNN architecture for On-chip Unsupervised STDP Learning9
Adaptive Memory-Enhanced Time Delay Reservoir and its Memristive Implementation9
Quantum Secret Permutating Protocol9
On the Analysis of Parallel Real-Time Tasks With Spin Locks9
Hybrid Annealing Method Based on subQUBO Model Extraction With Multiple Solution Instances9
Fast and Predictable Non-Volatile Data Memory for Real-Time Embedded Systems9
Privacy-Enhanced Decentralized Federated Learning at Dynamic Edge9
PrivAim: A Dual-Privacy Preserving and Quality-Aware Incentive Mechanism for Federated Learning9
OPTWEB: A Lightweight Fully Connected Inter-FPGA Network for Efficient Collectives9
Lightweight Authentication Scheme for Data Dissemination in Cloud-Assisted Healthcare IoT9
Control Performance Optimization for Application Integration on Automotive Architectures9
Secure Deep Learning in Defense in Deep-Learning-as-a-Service Computing Systems in Digital Twins9
Efficient and scalable FPGA design of GF(2m) inversion for post-quantum cryptosystems9
Thermal-Aware Design for Approximate DNN Accelerators9
Online Machine Learning for Energy-Aware Multicore Real-Time Embedded Systems9
Efficient Fault-Tolerant Consensus for Collaborative Services in Edge Computing9
HePREM: A Predictable Execution Model for GPU-based Heterogeneous SoCs9
Reinforcement Learning-Based Resource Partitioning for Improving Responsiveness in Cloud Gaming9
AILC: Accelerate On-Chip Incremental Learning With Compute-in-Memory Technology9
ComPreEND: Computation Pruning through Predictive Early Negative Detection for ReLU in a Deep Neural Network Accelerator9
PRESTO: A Penalty-Aware Real-Time Scheduler for Task Graphs on Heterogeneous Platforms9
Lightweight, Effective Detection and Characterization of Mobile Malware Families9
Byzantine-Resilient Federated Learning at Edge8
The Butterfly Effect in Primary Visual Cortex8
STFL-DDR: Improving the Energy-Efficiency of Memory Interface8
A Voting Approach for Adaptive Network-on-Chip Power-Gating8
Colony: A Privileged Trusted Execution Environment With Extensibility8
ALPINE: Analog In-Memory Acceleration with Tight Processor Integration for Deep Learning8
Operating System Noise in the Linux Kernel8
Modularized Morphing of Deep Convolutional Neural Networks: A Graph Approach8
A Reputation-Based Mechanism for Transaction Processing in Blockchain Systems8
FlexBlock: A Flexible DNN Training Accelerator With Multi-Mode Block Floating Point Support8
Energy-Efficient 3D Data Collection for Multi-UAV Assisted Mobile Crowdsensing8
Idempotence-Based Preemptive GPU Kernel Scheduling for Embedded Systems8
PStream: A Popularity-Aware Differentiated Distributed Stream Processing System8
Modeling Data Reuse in Deep Neural Networks by Taking Data-Types into Cognizance8
Enabling Secure and Space-Efficient Metadata Management in Encrypted Deduplication8
DML: Dynamic Partial Reconfiguration With Scalable Task Scheduling for Multi-Applications on FPGAs8
Constructing Multiple CISTs on BCube-Based Data Center Networks in the Occurrence of Switch Failures8
Analysis and Efficient Implementations of a Class of Composited de Bruijn Sequences8
Quantum Dimension Reduction for Pattern Recognition in High-Resolution Spatio-Spectral Data8
General Bootstrapping Approach for RLWE-Based Homomorphic Encryption8
Learned FBF: Learning-Based Functional Bloom Filter for Key-Value Storage7
Revisiting Higher-Order Masked Comparison for Lattice-Based Cryptography: Algorithms and Bit-Sliced Implementations7
Efficient Repair Analysis Algorithm Exploration for Memory With Redundancy and In-Memory ECC7
High-Accuracy Multiply-Accumulate (MAC) Technique for Unary Stochastic Computing7
Implementing the Residue Logarithmic Number System Using Interpolation and Cotransformation7
NOSTalgy: Near-Optimum Run-Time STT-MRAM Quality-Energy Knob Management for Approximate Computing Applications7
Priority Assignment on Partitioned Multiprocessor Systems With Shared Resources7
Detection of SLA Violation for Big Data Analytics Applications in Cloud7
Power-Efficient Heterogeneous Many-Core Design With NCFET Technology7
Efficient Integrity Auditing Mechanism With Secure Deduplication for Blockchain Storage7
Exploiting Buffered Updates for Fast Streaming Graph Analysis7
Reed-Solomon Coding Algorithms Based on Reed-Muller Transform for Any Number of Parities7
Precise Dynamic Symbolic Execution for Nonuniform Data Access in Smart Contracts7
LNS-Madam: Low-Precision Training in Logarithmic Number System Using Multiplicative Weight Update7
Disjoint Paths Construction and Fault-Tolerant Routing in BCube of Data Center Networks7
High Performance Hierarchical Tucker Tensor Learning Using GPU Tensor Cores7
Cluster-Aware Scattered Repair in Erasure-Coded Storage: Design and Analysis7
Towards Globally Optimal Design of Multipliers for FPGAs7
AEML: An Acceleration Engine for Multi-GPU Load-balancing in Distributed Heterogeneous Environment7
General Reuse-Centric CNN Accelerator7
OctCNN: A High Throughput FPGA Accelerator for CNNs using Octave Convolution Algorithm7
Benchmarking Quantum(-Inspired) Annealing Hardware on Practical Use Cases7
Adapt Burstable Containers to Variable CPU Resources7
Lightweight Blockchain-Empowered Secure and Efficient Federated Edge Learning7
Affinity-Aware VNF Placement in Mobile Edge Clouds via Leveraging GPUs7
HPKA: A High-Performance CRYSTALS-Kyber Accelerator Exploring Efficient Pipelining7
RISC-V Galois Field ISA Extension for Non-Binary Error-Correction Codes and Classical and Post-Quantum Cryptography7
Enabling Highly Efficient Capsule Networks Processing Through Software-Hardware Co-Design7
Cross-Channel: Scalable Off-Chain Channels Supporting Fair and Atomic Cross-Chain Operations7
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