OOIR: Observatory of International Research

Papers

(The H4-Index of IEEE Transactions on Computers is 35. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2021-05-01 to 2025-05-01.)

Article	Citations
Extending Performance-Energy Trade-offs Via Dynamic Core Scaling	240
Analytical Model for Memory-Centric High Level Synthesis-Generated Applications	123
SSD In-Storage Computing for Search Engines	119
Meta-Block: Exploiting Cross-Layer and Direct Storage Access for Decentralized Blockchain Storage Systems	107
How to Launch a Powerful Side-Channel Collision Attack?	102
A High-Resilience Imprecise Computing Architecture for Mixed-Criticality Systems	92
WaWoT: Towards Flexible and Efficient Web of Things Services via WebAssembly on Resource-Constrained IoT Devices	90
An Edge-Side Real-Time Video Analytics System With Dual Computing Resource Control	87
A Data-Centric Software-Hardware Co-Designed Architecture for Large-Scale Graph Processing	84
Redactable Blockchain From Decentralized Chameleon Hash Functions, Revisited	83
Online Scheduling of Distributed Machine Learning Jobs for Incentivizing Sharing in Multi-Tenant Systems	81
Energy-Delay-Aware Joint Microservice Deployment and Request Routing With DVFS in Edge: A Reinforcement Learning Approach	75
ZigZag: Enlarging Joint Architecture-Mapping Design Space Exploration for DNN Accelerators	66
DORY: Automatic End-to-End Deployment of Real-World DNNs on Low-Cost IoT MCUs	63
ParBFT: An Optimized Byzantine Consensus Parallelism Scheme	62
RSQC: Recursive Sparse QUBO Construction for Quantum Annealing Machines	62
MMDataLoader: Reusing Preprocessed Data Among Concurrent Model Training Tasks	58
Efficient CP-ABE Scheme With Shared Decryption in Cloud Storage	57
Adaptive Page Migration Policy With Huge Pages in Tiered Memory Systems	56
Analysis & Design of Convolution Operator for High Speed and High Accuracy Convolutional Neural Network-Based Inference Engines	56
EIHDP: Edge-Intelligent Hierarchical Dynamic Pricing Based on Cloud-Edge-Client Collaboration for IoT Systems	53
An Area-Efficient In-Memory Implementation Method of Arbitrary Boolean Function Based on SRAM Array	48
Soft Error Effects on Arm Microprocessors: Early Estimations versus Chip Measurements	48
Improving Interference Analysis for Real-Time DAG Tasks Under Partitioned Scheduling	48
Elastic Bloom Filter: Deletable and Expandable Filter Using Elastic Fingerprints	47

SmartZone: Runtime Support for Secure and Efficient On-device Inference on ARM TrustZone	45
Tensor Recurrent Neural Network With Differential Privacy	41
RTSA: A Run-Through Sparse Attention Framework for Video Transformer	41
LUNA-CiM: A Programmable Compute-in-Memory Fabric for Neural Network Acceleration	40
Karatsuba Matrix Multiplication and Its Efficient Custom Hardware Implementations	40
Tolerance of Siamese Networks (SNs) to Memory Errors: Analysis and Design	39
A Low-Cost Burn-In Tester Architecture to Supply Effective Electrical Stress	39
Unsupervised Spiking Instance Segmentation on Event Data Using STDP Features	39
A Provably Secure Strong PUF Based on LWE: Construction and Implementation	37
PCB Hardware Trojan Run-Time Detection Through Machine Learning	35