IEEE Transactions on Computers

Papers
(The H4-Index of IEEE Transactions on Computers is 33. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2020-11-01 to 2024-11-01.)
ArticleCitations
SAFA: A Semi-Asynchronous Protocol for Fast Federated Learning With Low Overhead187
EIHDP: Edge-Intelligent Hierarchical Dynamic Pricing Based on Cloud-Edge-Client Collaboration for IoT Systems105
EnGN: A High-Throughput and Energy-Efficient Accelerator for Large Graph Neural Networks89
Dependent Task Offloading for Edge Computing based on Deep Reinforcement Learning84
Efficient CP-ABE Scheme With Shared Decryption in Cloud Storage84
ZigZag: Enlarging Joint Architecture-Mapping Design Space Exploration for DNN Accelerators74
BAFL: A Blockchain-Based Asynchronous Federated Learning Framework73
DORY: Automatic End-to-End Deployment of Real-World DNNs on Low-Cost IoT MCUs71
Adaptive Federated Learning on Non-IID Data With Resource Constraint61
An Improved Logarithmic Multiplier for Energy-Efficient Neural Computing60
MTHAEL: Cross-Architecture IoT Malware Detection Based on Neural Network Advanced Ensemble Learning60
Credit Risk Analysis Using Quantum Computers59
A3C-DO: A Regional Resource Scheduling Framework Based on Deep Reinforcement Learning in Edge Scenario58
Voltage Over-Scaling-Based Lightweight Authentication for IoT Security58
The Graph Structure of the Generalized Discrete Arnold's Cat Map56
A Blockchain-Based Decentralized, Fair and Authenticated Information Sharing Scheme in Zero Trust Internet-of-Things56
Lime: Low-Cost and Incremental Learning for Dynamic Heterogeneous Information Networks51
Deep Learning for HDD Health Assessment: An Application Based on LSTM48
Optimality Study of Existing Quantum Computing Layout Synthesis Tools46
Area-Optimized Accurate and Approximate Softcore Signed Multiplier Architectures44
Vector-Indistinguishability: Location Dependency Based Privacy Protection for Successive Location Data44
Device-Circuit-Architecture Co-Exploration for Computing-in-Memory Neural Accelerators42
Hardware Private Circuits: From Trivial Composition to Full Verification41
An Extensive Study of Flexible Design Methods for the Number Theoretic Transform40
An Energy-Aware High Performance Task Allocation Strategy in Heterogeneous Fog Computing Environments39
PyQUBO: Python Library for Mapping Combinatorial Optimization Problems to QUBO Form39
Malware Analysis By Combining Multiple Detectors and Observation Windows39
Elliptic Curve Cryptography Point Multiplication Core for Hardware Security Module38
Evaluations on Deep Neural Networks Training Using Posit Number System38
Magnifying Side-Channel Leakage of Lattice-Based Cryptosystems With Chosen Ciphertexts: The Case Study of Kyber36
A Hybrid Quantum-Classical Approach to Mitigating Measurement Errors in Quantum Algorithms34
SPDL: A Blockchain-Enabled Secure and Privacy-Preserving Decentralized Learning System34
High-Speed Hardware Architectures and FPGA Benchmarking of CRYSTALS-Kyber, NTRU, and Saber34
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